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Re: Inline Assembly Register Allocation Bug? (Was: Possible bug withgcc 2.95.2 on Hitachi h8)


>   asm volatile ("movl\t(%1),%0\n\t"
> 		"movl\t(%1),%0"
> 		: "=r" (temp) : "r" (p));

This is not a bug.  You need to tell gcc that operand 0 is earlyclobbered:

  asm volatile ("movl\t(%1),%0\n\t"
		"movl\t(%1),%0"
		: "=&r" (temp) : "r" (p));

Bernd


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