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Re: A bug in GCC 2.95.2 for SPARC
- To: davem at redhat dot com
- Subject: Re: A bug in GCC 2.95.2 for SPARC
- From: James Cheng <James dot Cheng at eng dot sun dot com>
- Date: Wed, 10 May 2000 15:46:57 -0700 (PDT)
- Cc: gcc-bugs at gcc dot gnu dot org, james dot cheng at eng dot sun dot com
- Reply-To: James Cheng <James dot Cheng at eng dot sun dot com>
David,
> For performance reason. UltraSPARC is a 64-bit processor, where one
> 64-bit store (std) is faster than two 32-bit stores (st). We are
> building a performance library for media applications.
>
> Integer 'std' is deprecated in V9 and runs slower on UltraSparc than
> two 'st' stores. Perhaps you really mean 'stx' integer stores, or
> 'stdf' double float stores? The latter you can get with -mv8.
You are right that I was referring to 'stdf' which has a suggested asm
syntax of 'std freg, [address]'. The bug I encountered is that some gcc
generated 'stdf's are dealing with non-8-byte-aligned addresses, which
cause bus errors... Wait a minute. On page 222 of "The SPARC Architecture
Manual, Version 9", it reads:
The store double floating-point instruction (STDF) copies
a doubleword from a double floating-point register into a
word-aligned doubleword in memory.
^^^^^^^^^^^^
But it seems to me that 'stdf' requires a doubleword-aligned address.
This might be the reason of this bug.
I am going to find the answer for this discrepancy.
Thanks,
-James