RISC-V: Adjust floating point code gen for LTGT compare

RISC-V: Adjust floating point code gen for LTGT compare

 - Using gcc.dg/torture/pr91323.c as testcase, so no new testcase
   introduced.

 - We use 3 eq compare for LTGT compare before, in order to prevent exception
   flags setting when any input is NaN.

 - According latest GCC document LTGT and discussion on pr91323
   LTGT should signals on NaNs, like GE/GT/LE/LT.

 - So we expand (LTGT a b) to ((LT a b) | (GT a b)) for fit the document.

 - Tested rv64gc/rv32gc bare-metal/linux on qemu and
   rv64gc on HiFive unleashed board with linux.

ChangeLog

gcc/

Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
	for LTGT.
	(riscv_rtx_costs): Update cost model for LTGT.