i386: Fix up *concat*_{5,6,7} patterns [PR108044]

i386: Fix up *concat*_{5,6,7} patterns [PR108044]

The following patch fixes 2 issues with the *concat<half><mode>3_5 and
*concat<mode><dwi>3_{6,7} patterns.
One is that if the destination is memory rather than register, then
we can't use movabsq and so can't support all the possible immediates.
I see 3 possibilities to fix that.  One would be to use
x86_64_hilo_int_operand predicate instead of const_scalar_int_operand
and thus not match it at all during combine in such cases, but that
unnecessarily pessimizes also the case when it is loaded into register
where we can use movabsq.
Another one is what is implemented in the patch, use Wd constraint
for the integer on 64-bit if destination is memory and n otherwise.
Yet another option would be to add match_scratch to the pattern and use
it with =X constraints except for the =o case for 64-bit non-Wd where it
would give a single DImode register (rather than 2).

Another thing is that if one half of the constant is
ix86_endbr_immediate_operand, then for -fcf-protection=branch we
force those constants into memory and that might not work properly
with -fpic.  So we should refuse to match with such constants.
OT, seems for movabsq we don't check that and happily allow the endbr
pattern in the immediate.

2022-12-13  Jakub Jelinek  <jakub@redhat.com>

	PR target/108044
	* config/i386/i386.md (*concat<half><mode>3_5, *concat<mode><dwi>3_6,
	*concat<mode><dwi>3_7): Split alternative with =ro output constraint
	into =r,o,o and use Wd input constraint for the last alternative which
	is enabled for TARGET_64BIT.  Reject ix86_endbr_immediate_operand
	in the input constant.

	* gcc.target/i386/pr108044-1.c: New test.
	* gcc.target/i386/pr108044-2.c: New test.
	* gcc.target/i386/pr108044-3.c: New test.
	* gcc.target/i386/pr108044-4.c: New test.