Revert patches

[gcc.git] / gcc / config / rs6000 / mma.md

diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md
index dc42731e4cf8c02e433ce3eaf620555dddb61397..0233c7b304af1c657488825bb8baed4ae1909906 100644 (file)
--- a/gcc/config/rs6000/mma.md
+++ b/gcc/config/rs6000/mma.md
@@ -879,22 +879,22 @@
    (set_attr "isa" "dm,not_dm,not_dm")])
 
 \f
-;; V8TImode (i.e. __dmr).
-(define_expand "movv8ti"
-  [(set (match_operand:V8TI 0 "nonimmediate_operand")
-       (match_operand:V8TI 1 "input_operand"))]
+;; TDOmode (i.e. __dmr).
+(define_expand "movtdo"
+  [(set (match_operand:TDO 0 "nonimmediate_operand")
+       (match_operand:TDO 1 "input_operand"))]
   "TARGET_DENSE_MATH"
 {
-  rs6000_emit_move (operands[0], operands[1], V8TImode);
+  rs6000_emit_move (operands[0], operands[1], TDOmode);
   DONE;
 })
 
-(define_insn_and_split "*movv8ti"
-  [(set (match_operand:V8TI 0 "nonimmediate_operand" "=wa,m,wa,wD,wD,wa")
-       (match_operand:V8TI 1 "input_operand" "m,wa,wa,wa,wD,wD"))]
+(define_insn_and_split "*movtdo"
+  [(set (match_operand:TDO 0 "nonimmediate_operand" "=wa,m,wa,wD,wD,wa")
+       (match_operand:TDO 1 "input_operand" "m,wa,wa,wa,wD,wD"))]
   "TARGET_DENSE_MATH
-   && (gpc_reg_operand (operands[0], V8TImode)
-       || gpc_reg_operand (operands[1], V8TImode))"
+   && (gpc_reg_operand (operands[0], TDOmode)
+       || gpc_reg_operand (operands[1], TDOmode))"
   "@
    #
    #
@@ -903,7 +903,7 @@
    dmmr %0,%1
    #"
   "&& reload_completed
-   && (!dmr_operand (operands[0], V8TImode) || !dmr_operand (operands[1], V8TImode))"
+   && (!dmr_operand (operands[0], TDOmode) || !dmr_operand (operands[1], TDOmode))"
   [(const_int 0)]
 {
   rtx op0 = operands[0];
@@ -918,8 +918,8 @@
        {
          rtx op1_upper = gen_rtx_REG (XOmode, regno1);
          rtx op1_lower = gen_rtx_REG (XOmode, regno1 + 4);
-         emit_insn (gen_movv8ti_insert512_upper (op0, op1_upper));
-         emit_insn (gen_movv8ti_insert512_lower (op0, op0, op1_lower));
+         emit_insn (gen_movtdo_insert512_upper (op0, op1_upper));
+         emit_insn (gen_movtdo_insert512_lower (op0, op0, op1_lower));
          DONE;
        }
 
@@ -927,8 +927,8 @@
        {
          rtx op0_upper = gen_rtx_REG (XOmode, regno0);
          rtx op0_lower = gen_rtx_REG (XOmode, regno0 + 4);
-         emit_insn (gen_movv8ti_extract512 (op0_upper, op1, const0_rtx));
-         emit_insn (gen_movv8ti_extract512 (op0_lower, op1, const1_rtx));
+         emit_insn (gen_movtdo_extract512 (op0_upper, op1, const0_rtx));
+         emit_insn (gen_movtdo_extract512 (op0_lower, op1, const1_rtx));
          DONE;
        }
     }
@@ -942,28 +942,28 @@
 
 ;; Move from VSX registers to DMR registers via two insert 512 bit
 ;; instructions.
-(define_insn "movv8ti_insert512_upper"
-  [(set (match_operand:V8TI 0 "dmr_operand" "=wD")
-       (unspec:V8TI [(match_operand:XO 1 "vsx_register_operand" "wa")]
-                    UNSPEC_DM_INSERT512_UPPER))]
+(define_insn "movtdo_insert512_upper"
+  [(set (match_operand:TDO 0 "dmr_operand" "=wD")
+       (unspec:TDO [(match_operand:XO 1 "vsx_register_operand" "wa")]
+                   UNSPEC_DM_INSERT512_UPPER))]
   "TARGET_DENSE_MATH"
   "dmxxinstdmr512 %0,%1,%Y1,0"
   [(set_attr "type" "mma")])
 
-(define_insn "movv8ti_insert512_lower"
-  [(set (match_operand:V8TI 0 "dmr_operand" "=wD")
-       (unspec:V8TI [(match_operand:V8TI 1 "dmr_operand" "0")
-                     (match_operand:XO 2 "vsx_register_operand" "wa")]
-                    UNSPEC_DM_INSERT512_LOWER))]
+(define_insn "movtdo_insert512_lower"
+  [(set (match_operand:TDO 0 "dmr_operand" "=wD")
+       (unspec:TDO [(match_operand:TDO 1 "dmr_operand" "0")
+                    (match_operand:XO 2 "vsx_register_operand" "wa")]
+                   UNSPEC_DM_INSERT512_LOWER))]
   "TARGET_DENSE_MATH"
   "dmxxinstdmr512 %0,%2,%Y2,1"
   [(set_attr "type" "mma")])
 
 ;; Move from DMR registers to VSX registers via two extract 512 bit
 ;; instructions.
-(define_insn "movv8ti_extract512"
+(define_insn "movtdo_extract512"
   [(set (match_operand:XO 0 "vsx_register_operand" "=wa")
-       (unspec:XO [(match_operand:V8TI 1 "dmr_operand" "wD")
+       (unspec:XO [(match_operand:TDO 1 "dmr_operand" "wD")
                    (match_operand 2 "const_0_to_1_operand" "n")]
                   UNSPEC_DM_EXTRACT512))]
   "TARGET_DENSE_MATH"
@@ -972,9 +972,9 @@
 
 ;; Reload DMR registers from memory
 (define_insn_and_split "reload_dmr_from_memory"
-  [(set (match_operand:V8TI 0 "dmr_operand" "=wD")
-       (unspec:V8TI [(match_operand:V8TI 1 "memory_operand" "m")]
-                    UNSPEC_DMR_RELOAD_FROM_MEMORY))
+  [(set (match_operand:TDO 0 "dmr_operand" "=wD")
+       (unspec:TDO [(match_operand:TDO 1 "memory_operand" "m")]
+                   UNSPEC_DMR_RELOAD_FROM_MEMORY))
    (clobber (match_operand:XO 2 "vsx_register_operand" "=wa"))]
   "TARGET_DENSE_MATH"
   "#"
@@ -988,10 +988,10 @@
   rtx mem_lower = adjust_address (src, XOmode, BYTES_BIG_ENDIAN ? 32 : 0);
 
   emit_move_insn (tmp, mem_upper);
-  emit_insn (gen_movv8ti_insert512_upper (dest, tmp));
+  emit_insn (gen_movtdo_insert512_upper (dest, tmp));
 
   emit_move_insn (tmp, mem_lower);
-  emit_insn (gen_movv8ti_insert512_lower (dest, dest, tmp));
+  emit_insn (gen_movtdo_insert512_lower (dest, dest, tmp));
   DONE;
 }
   [(set_attr "length" "16")
@@ -1000,9 +1000,9 @@
 
 ;; Reload dense math registers to memory
 (define_insn_and_split "reload_dmr_to_memory"
-  [(set (match_operand:V8TI 0 "memory_operand" "=m")
-       (unspec:V8TI [(match_operand:V8TI 1 "dmr_operand" "wD")]
-                    UNSPEC_DMR_RELOAD_TO_MEMORY))
+  [(set (match_operand:TDO 0 "memory_operand" "=m")
+       (unspec:TDO [(match_operand:TDO 1 "dmr_operand" "wD")]
+                   UNSPEC_DMR_RELOAD_TO_MEMORY))
    (clobber (match_operand:XO 2 "vsx_register_operand" "=wa"))]
   "TARGET_DENSE_MATH"
   "#"
@@ -1015,10 +1015,10 @@
   rtx mem_upper = adjust_address (dest, XOmode, BYTES_BIG_ENDIAN ? 0 : 32);
   rtx mem_lower = adjust_address (dest, XOmode, BYTES_BIG_ENDIAN ? 32 : 0);
 
-  emit_insn (gen_movv8ti_extract512 (tmp, src, const0_rtx));
+  emit_insn (gen_movtdo_extract512 (tmp, src, const0_rtx));
   emit_move_insn (mem_upper, tmp);
 
-  emit_insn (gen_movv8ti_extract512 (tmp, src, const1_rtx));
+  emit_insn (gen_movtdo_extract512 (tmp, src, const1_rtx));
   emit_move_insn (mem_lower, tmp);
   DONE;
 }