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2023-09-26 Juzhe-ZhongRISC-V: Support VLS unary floating-point patterns
2023-09-26 Juzhe-ZhongRISC-V: Support VLS floating-point FMA/FNMA/FMS auto...
2023-09-26 Juzhe-ZhongRISC-V: Support integer FMA/FNMA VLS modes autovectoriz...
2023-09-26 Lehua DingRISC-V: Refactor and cleanup fma patterns
2023-09-26 Tsukasa OIRISC-V: Fix typos on comments (SVE -> RVV)
2023-09-26 Tsukasa OIRISC-V: Add builtin .def file dependencies
2023-09-26 Pan LiRISC-V: Support VLS mode for vec_set
2023-09-26 Pan LiRISC-V: Bugfix for scalar move with merged operand
2023-09-18 Juzhe-ZhongRISC-V: Remove redundant vec_duplicate pattern
2023-09-18 Juzhe-ZhongRISC-V: Fix bogus FAILs of vsetvl testcases
2023-09-18 Lehua DingRISC-V: Removed misleading comments in testcases
2023-09-18 Lehua DingRISC-V: Add fixed PR111255 testcase by other patch
2023-09-18 Juzhe-ZhongRISC-V: Support VLS reduction
2023-09-18 Juzhe-ZhongRISC-V: Fix VSETVL PASS fusion bug
2023-09-18 Juzhe-ZhongRISC-V: Support VLS modes vec_init auto-vectorization
2023-09-18 Juzhe-ZhongRISC-V: Remove autovec-vls.md file and clean up VLS...
2023-09-18 Juzhe-ZhongRISC-V: Support VLS modes reduction[PR111153]
2023-09-18 Juzhe-ZhongRISC-V: Remove redundant codes of VLS patterns[NFC]
2023-09-18 Juzhe-ZhongRISC-V: Expand VLS mode to scalar mode move[PR111391]
2023-09-18 Tsukasa OIRISC-V: Make SHA-256, SM3 and SM4 builtins operate...
2023-09-18 Tsukasa OIRISC-V: Make bit manipulation value / round number...
2023-09-18 Pan LiRISC-V: Support FP SGNJX autovec for VLS mode
2023-09-18 Fei Gaofix PR 111259 invalid zcmp mov predicate.
2023-09-18 Lehua DingRISC-V: Fix using wrong mode to get reduction insn...
2023-09-18 Juzhe-Zhongtest: Block SLP check of slp-35.c for vect_strided5
2023-09-18 Juzhe-Zhongtest: Block SLP check of slp-34.c for vect_strided5
2023-09-18 Juzhe-Zhongtest: Block vect_strided5 for slp-34-big-array.c SLP...
2023-09-18 Juzhe-Zhongtest: Block slp-16.c check for target support vect_strided6
2023-09-18 Juzhe-Zhongtest: Isolate slp-1.c check of target supports vect_str...
2023-09-18 Juzhe-Zhongtest: Remove XPASS for RISCV
2023-09-18 Lehua DingRISC-V: Refactor expand_reduction and cleanup enum...
2023-09-18 Lehua DingRISC-V: Support combine extend and reduce sum to widen...
2023-09-18 Vladimir N... [RA]: Improve cost calculation of pseudos with equivalences
2023-09-18 Lehua DingRISC-V: Refactor vector reduction patterns
2023-09-18 Lehua DingRISC-V: Cleanup redundant reduction patterns after...
2023-09-18 Juzhe-ZhongRISC-V: Support VLS modes mask operations
2023-09-18 Juzhe-ZhongRISC-V: Fix ICE in get_avl_or_vl_reg
2023-09-18 Juzhe-ZhongRISC-V: Format VSETVL PASS code
2023-09-18 Juzhe-ZhongRISC-V: Support VLS modes VEC_EXTRACT auto-vectorization
2023-09-18 Lehua DingRISC-V: Support cond vmulh.vv and vmulu.vv autovec...
2023-09-18 Lehua DingRISC-V: Support cond vnsrl/vnsra autovec patterns
2023-09-18 Lehua DingRISC-V: Support cond vfsgnj.vv autovec patterns
2023-09-18 Pan LiRISC-V: Bugfix PR111362 for incorrect frm emit
2023-09-18 Juzhe-ZhongRISC-V: Remove redundant ABI test
2023-09-18 Juzhe-ZhongRISC-V: Enable vec_int testsuite for RVV VLA vectorization
2023-09-18 Juzhe-ZhongRISC-V: Support VECTOR BOOL vcond_mask optab[PR111337]
2023-09-18 Edwin LuRISC-V: Finish Typing Un-Typed Instructions and Turn...
2023-09-18 Pan LiRISC-V: Remove unused structure in cost model
2023-09-18 Juzhe-ZhongRISC-V: Support Dynamic LMUL Cost model
2023-09-18 Christoph Müllnerriscv: Add support for str(n)cmp inline expansion
2023-09-18 Christoph Müllnerriscv: Add support for strlen inline expansion
2023-09-18 Lehua DingRISC-V: Add missed cond autovec testcases
2023-09-18 xuliRISC-V: Elimilate warning in class vcreate
2023-09-18 xuliRISC-V: Add vcreate intrinsics for RVV tuple types
2023-09-18 Fei GaoRISC-V: enable muti push and pop for Zcmp when shrink...
2023-09-18 Fei GaoAllow targets to check shrink-wrap-separate enabled...
2023-09-18 Edwin LuRISC-V: Add Types to Un-Typed Thead Instructions
2023-09-18 Edwin LuRISC-V: Update Types for RISC-V Instructions
2023-09-18 Edwin LuRISC-V: Add Types to Un-Typed Zicond Instructions
2023-09-18 Edwin LuRISC-V: Add Types for Un-Typed zc Instructions
2023-09-18 Edwin LuRISC-V: Update Types for Vector Instructions
2023-09-18 Juzhe-ZhongRISC-V: Enable RVV scalable vectorization by default...
2023-09-11 Juzhe-ZhongRISC-V: Remove redundant functions
2023-09-11 Juzhe-ZhongRISC-V: Use dominance analysis in global vsetvl elimination
2023-09-11 Juzhe-ZhongRISC-V: Add VLS modes VEC_PERM support[PR111311]
2023-09-11 Juzhe-ZhongRISC-V: Add missing VLS mask bool mode reg -> reg patterns
2023-09-11 Juzhe-ZhongRISC-V: Expand fixed-vlmax/vls vector permutation in...
2023-09-11 Juzhe-ZhongRISC-V: Avoid unnecessary slideup in compress pattern...
2023-09-11 Juzhe-ZhongRISC-V: Fix dump FILE of VSETVL PASS[PR111311]
2023-09-11 Juzhe-ZhongRISC-V: Fix VLS floating-point operations predicate
2023-09-11 Lehua DingSupport folding min(poly,poly) to const
2023-09-11 Christoph Müllnerriscv: xtheadbb: Fix extendqi<SUPERQI> insn
2023-09-11 Christoph Müllnerriscv: thead: Fix mode attribute for extension patterns
2023-09-11 Christoph Müllnerriscv: bitmanip: Remove duplicate zero_extendhi<GPR...
2023-09-11 Juzhe-ZhongRISC-V: Suppress bogus warning for VLS types
2023-09-11 Juzhe-ZhongRISC-V: Fix incorrect nregs calculation for VLS modes
2023-09-11 Juzhe-ZhongRISC-V: Add VLS mask modes mov patterns
2023-09-11 Juzhe-ZhongRISC-V: Remove incorrect earliest vsetvl post optimizat...
2023-09-11 Tsukasa OIRISC-V: Add support for 'XVentanaCondOps' reusing ...
2023-09-11 Juzhe-ZhongRISC-V: Fix incorrect mode tieable which cause ICE...
2023-09-11 Juzhe-ZhongRISC-V: Fix VSETVL PASS AVL/VL fetch bug[111295]
2023-09-11 Juzhe-ZhongRISC-V: Remove unreasonable TARGET_64BIT for VLS modes...
2023-09-11 Pan LiRISC-V: Fix incorrect folder for VRGATHERI16 test case
2023-09-11 Christoph Müllnerriscv: xtheadbb: Fix xtheadbb-li-rotr test for rv32
2023-09-11 Lehua DingRISC-V: Keep vlmax vector operators in simple form...
2023-09-11 Lehua DingRISC-V: Part-3: Output .variant_cc directive for vector...
2023-09-11 Lehua DingRISC-V: Part-2: Save/Restore vector registers which...
2023-09-11 Lehua DingRISC-V: Part-1: Select suitable vector registers for...
2023-09-11 Lehua DingRISC-V: Add conditional sqrt autovec pattern
2023-09-11 Tsukasa OIRISC-V: typo: add closing paren to a comment
2023-09-11 Tsukasa OIRISC-V: Fix Zicond ICE on large constants
2023-09-11 Christoph Müllnerriscv: Synthesize all 11-bit-rotate constants with...
2023-09-05 Jeff LawRISC-V: Expose bswapsi for TARGET_64BIT
2023-09-05 Edwin LuRISC-V: Add Types to Un-Typed Risc-v Instructions
2023-09-05 Edwin LuRISC-V: Add Types to Un-Typed Pic Instructions
2023-09-05 Christoph Müllnerriscv: xtheadbb: Enable constant synthesis with th...
2023-09-05 Vineet GuptaRISC-V: zicond: Fix opt2 pattern
2023-09-05 Kito ChengRISC-V: Emit .note.GNU-stack for non-linux target as...
2023-09-05 Pan LiRISC-V: Support FP SGNJ autovec for VLS mode
2023-09-05 Juzhe-ZhongRISC-V: Export functions as global extern preparing...
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