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2023-11-22	Maciej W. Rozycki	RISC-V/testsuite: Add branched cases for GEU and LEU...	commit \| commitdiff \| tree
2023-11-22	Maciej W. Rozycki	RISC-V: Also invert the cond-move condition for GEU...	commit \| commitdiff \| tree
2023-11-22	Maciej W. Rozycki	RISC-V/testsuite: Add branchless cases for FP cond...	commit \| commitdiff \| tree
2023-11-22	Maciej W. Rozycki	RISC-V/testsuite: Add branched cases for FP cond-move...	commit \| commitdiff \| tree
2023-11-22	Maciej W. Rozycki	RISC-V/testsuite: Add branchless cases for integer...	commit \| commitdiff \| tree
2023-11-22	Maciej W. Rozycki	RISC-V/testsuite: Add branched cases for integer cond...	commit \| commitdiff \| tree
2023-11-22	Maciej W. Rozycki	RISC-V: Rework branch costing model for if-conversion	commit \| commitdiff \| tree
2023-11-22	Maciej W. Rozycki	RISC-V: Simplify EQ vs NE selection in `riscv_expand_conditi...	commit \| commitdiff \| tree
2023-11-22	Maciej W. Rozycki	RISC-V: Use `nullptr' in `riscv_expand_conditional_move'	commit \| commitdiff \| tree
2023-11-22	Maciej W. Rozycki	RISC-V: Avoid repeated GET_MODE calls in `riscv_expand_condi...	commit \| commitdiff \| tree
2023-11-22	Maciej W. Rozycki	RISC-V: Fix `mode' usage in `riscv_expand_conditional_move'	commit \| commitdiff \| tree
2023-11-22	Maciej W. Rozycki	RISC-V: Sanitise NEED_EQ_NE_P case with `riscv_emit_int_compare'	commit \| commitdiff \| tree
2023-11-22	Maciej W. Rozycki	RISC-V: Reorder comment on SFB patterns	commit \| commitdiff \| tree
2023-11-22	Maciej W. Rozycki	RISC-V/testsuite: Add cases for integer SFB cond-move...	commit \| commitdiff \| tree
2023-11-22	Maciej W. Rozycki	testsuite: Add cases for conditional-move and conditional...	commit \| commitdiff \| tree
2023-11-22	Robin Dapp	RISC-V: testsuite: Fix popcount test.	commit \| commitdiff \| tree
2023-11-22	Robin Dapp	RISC-V: testsuite: Add rv64 requirement for bug-9 and...	commit \| commitdiff \| tree
2023-11-22	Robin Dapp	RISC-V: testsuite: Do not set default arch for RVV.	commit \| commitdiff \| tree
2023-11-22	Patrick O'Neill	gfortran: Rely on dg-do-what-default to avoid running...	commit \| commitdiff \| tree
2023-11-22	Juzhe-Zhong	RISC-V: Disallow COSNT_VECTOR for DI on RV32	commit \| commitdiff \| tree
2023-11-22	Juzhe-Zhong	RISC-V: Add missing dump check of pr112438.c	commit \| commitdiff \| tree
2023-11-22	Juzhe-Zhong	RISC-V: Fix reduc_run-9.c test value check bug	commit \| commitdiff \| tree
2023-11-21	Jeff Law	Revert "VECT: Support SLP MASK_LEN_GATHER_LOAD with...	commit \| commitdiff \| tree
2023-11-21	Andrew Pinski	Add support for vector conitional not	commit \| commitdiff \| tree
2023-11-21	Richard Sandiford	Allow md iterators to include other iterators	commit \| commitdiff \| tree
2023-11-21	Juzhe-Zhong	RISC-V: Fix intermediate mode on slide1 instruction...	commit \| commitdiff \| tree
2023-11-21	Robin Dapp	RISC-V: Disallow 64-bit indexed loads and stores for...	commit \| commitdiff \| tree
2023-11-21	Richard Sandiford	mode-switching: Add a backprop hook	commit \| commitdiff \| tree
2023-11-21	Richard Sandiford	mode-switching: Add a target-configurable confluence...	commit \| commitdiff \| tree
2023-11-21	Richard Sandiford	mode-switching: Use 1-based edge aux fields	commit \| commitdiff \| tree
2023-11-21	Richard Sandiford	mode-switching: Pass the set of live registers to the...	commit \| commitdiff \| tree
2023-11-21	Richard Sandiford	mode-switching: Pass set of live registers to the needed...	commit \| commitdiff \| tree
2023-11-21	Richard Sandiford	mode-switching: Allow targets to set the mode for EH...	commit \| commitdiff \| tree
2023-11-21	Richard Sandiford	mode-switching: Tweak entry/exit handling	commit \| commitdiff \| tree
2023-11-21	Richard Sandiford	mode-switching: Simplify recording of transparency	commit \| commitdiff \| tree
2023-11-21	Richard Sandiford	mode-switching: Fix the mode passed to the emit hook	commit \| commitdiff \| tree
2023-11-21	Richard Sandiford	mode-switching: Avoid quadractic list operation	commit \| commitdiff \| tree
2023-11-21	Richard Sandiford	mode-switching: Add note problem	commit \| commitdiff \| tree
2023-11-21	Richard Sandiford	mode-switching: Tweak the macro/hook documentation	commit \| commitdiff \| tree
2023-11-21	Richard Sandiford	mode-switching: Remove unused bbnum field	commit \| commitdiff \| tree
2023-11-21	Robin Dapp	internal-fn: Add VCOND_MASK_LEN.	commit \| commitdiff \| tree
2023-11-21	Juzhe-Zhong	RISC-V Regression: Remove scalable compile option	commit \| commitdiff \| tree
2023-11-21	xuli	RISC-V: Implement -mmemcpy-strategy= options[PR112537]	commit \| commitdiff \| tree
2023-11-21	Juzhe-Zhong	RISC-V: Optimize constant AVL for LRA pattern	commit \| commitdiff \| tree
2023-11-21	Philipp Tomsich	[committed] RISC-V: Infrastructure for instruction... Co-authored-by: Jeff Law <jlaw@ventanamicro.com>	commit \| commitdiff \| tree
2023-11-21	Jeff Law	[committed] Fix missing mode on a few unspec/unspec_volatile...	commit \| commitdiff \| tree
2023-11-21	Juzhe-Zhong	RISC-V: Fix bug of tuple move splitter	commit \| commitdiff \| tree
2023-11-21	Kito Cheng	RISC-V: Fix mismatched new delete for unique_ptr	commit \| commitdiff \| tree
2023-11-21	Juzhe-Zhong	RISC-V: Refactor RVV iterators[NFC]	commit \| commitdiff \| tree
2023-11-21	Edwin Lu	RISC-V: Change unaligned fast/slow/avoid macros to...	commit \| commitdiff \| tree
2023-11-21	Kito Cheng	RISC-V: Implement target attribute	commit \| commitdiff \| tree
2023-11-21	Kito Cheng	RISC-V: Save/restore ra register correctly [PR112478]	commit \| commitdiff \| tree
2023-11-21	Juzhe-Zhong	VECT: Clear LOOP_VINFO_USING_SELECT_VL_P when loop...	commit \| commitdiff \| tree
2023-11-21	Patrick O'Neill	RISC-V: Fix ICE in non-canonical march parsing	commit \| commitdiff \| tree
2023-11-21	Juzhe-Zhong	RISC-V: fix vsetvli pass testsuite failure [PR/112447]	commit \| commitdiff \| tree
2023-11-21	Vineet Gupta	RISC-V: elide unnecessary sign extend when expanding...	commit \| commitdiff \| tree
2023-11-21	Juzhe-Zhong	RISC-V: Support trailing vec_init optimization	commit \| commitdiff \| tree
2023-11-21	Pan Li	RISC-V: Refine the mask generation for vec_init case 2	commit \| commitdiff \| tree
2023-11-21	Juzhe-Zhong	RISC-V: Disallow RVV mode address for any load/store...	commit \| commitdiff \| tree
2023-11-21	Juzhe-Zhong	RISC-V: Fix init-2.c assembly check	commit \| commitdiff \| tree
2023-11-21	Robin Dapp	RISC-V: vsetvl: Refine REG_EQUAL equality.	commit \| commitdiff \| tree
2023-11-21	Juzhe-Zhong	RISC-V: Adapt VLS init tests	commit \| commitdiff \| tree
2023-11-21	Juzhe-Zhong	RISC-V: Optimize combine sequence by merge approach	commit \| commitdiff \| tree
2023-11-21	Pan Li	RISC-V: Fix RVV dynamic frm tests failure	commit \| commitdiff \| tree
2023-11-21	Pan Li	RISC-V: Support FP l/ll round and rint HF mode autovec	commit \| commitdiff \| tree
2023-11-21	Jeff Law	Revert "[PATCH v2] In the pipeline, USE or CLOBBER...	commit \| commitdiff \| tree
2023-11-21	Jin Ma	[PATCH v2] In the pipeline, USE or CLOBBER should delay...	commit \| commitdiff \| tree
2023-11-20	Juzhe-Zhong	RISC-V: Add test for PR112469	commit \| commitdiff \| tree
2023-11-20	Maciej W. Rozycki	RISC-V: Fix indentation of "length" attribute for branches...	commit \| commitdiff \| tree
2023-11-20	Patrick O'Neill	g++: Rely on dg-do-what-default to avoid running pr102788...	commit \| commitdiff \| tree
2023-11-20	Vladimir N. Makarov	[IRA]: Check autoinc and memory address after temporary...	commit \| commitdiff \| tree
2023-11-20	Juzhe-Zhong	Middle-end: Fix bug of induction variable vectorization...	commit \| commitdiff \| tree
2023-11-20	Juzhe-Zhong	RISC-V: Add combine optimization by slideup for vec_init...	commit \| commitdiff \| tree
2023-11-20	Robin Dapp	RISC-V: testsuite: Fix 32-bit FAILs.	commit \| commitdiff \| tree
2023-11-20	Jin Ma	RISC-V: XTheadMemPair: Fix missing fcsr handling in...	commit \| commitdiff \| tree
2023-11-20	Juzhe-Zhong	RISC-V: Robustify vec_init pattern[NFC]	commit \| commitdiff \| tree
2023-11-20	Pan Li	Revert "RISC-V: Support vec_init for trailing same...	commit \| commitdiff \| tree
2023-11-20	Pan Li	RISC-V: Support vec_init for trailing same element	commit \| commitdiff \| tree
2023-11-20	Juzhe-Zhong	test: Fix FAIL of pr97428.c for RVV	commit \| commitdiff \| tree
2023-11-20	Juzhe-Zhong	RISC-V: Move cond_copysign from combine pattern to...	commit \| commitdiff \| tree
2023-11-20	Pan Li	Internal-fn: Add FLOATN support for l/ll round and...	commit \| commitdiff \| tree
2023-11-20	Robin Dapp	RISC-V/testsuite: Fix several zvfh tests.	commit \| commitdiff \| tree
2023-11-20	Pan Li	RISC-V: Refine frm emit after bb end in succ edges	commit \| commitdiff \| tree
2023-11-20	Juzhe-Zhong	RISC-V: Add PR112450 test to avoid regression	commit \| commitdiff \| tree
2023-11-20	Jin Ma	RISC-V: Fix the illegal operands for the XTheadMemidx...	commit \| commitdiff \| tree
2023-11-20	Juzhe-Zhong	RISC-V: Fix dynamic LMUL cost model ICE	commit \| commitdiff \| tree
2023-11-20	Juzhe-Zhong	RISC-V: Fix dynamic tests [NFC]	commit \| commitdiff \| tree
2023-11-20	Lehua Ding	RISC-V: Removed unnecessary sign-extend for vsetvl	commit \| commitdiff \| tree
2023-11-20	Juzhe-Zhong	RISC-V: Fix VSETVL VL check condition bug	commit \| commitdiff \| tree
2023-11-20	xuli	RISC-V: Eliminate unused parameter warning.	commit \| commitdiff \| tree
2023-11-20	Juzhe-Zhong	test: Fix bb-slp-33.c for RVV	commit \| commitdiff \| tree
2023-11-20	Juzhe-Zhong	RISC-V: Normalize user vsetvl intrinsics[PR112092]	commit \| commitdiff \| tree
2023-11-08	Pan Li	RISC-V: Support FP floor to i/l/ll diff size autovec	commit \| commitdiff \| tree
2023-11-08	Juzhe-Zhong	test: Recover sdiv_pow2 check and remove test of RISC-V	commit \| commitdiff \| tree
2023-11-08	Juzhe-Zhong	test: Fix FAIL of pr65518.c for RVV[PR112420]	commit \| commitdiff \| tree
2023-11-08	Robin Dapp	testsuite/vect: Make check more accurate.	commit \| commitdiff \| tree
2023-11-08	Robin Dapp	testsuite: Change expectation for bb-slp-over-widen-n.c	commit \| commitdiff \| tree
2023-11-08	Juzhe-Zhong	RISC-V: Add RISC-V into vect_cmdline_needed	commit \| commitdiff \| tree
2023-11-08	Christoph Müllner	RISC-V: Use stdint-gcc.h in xtheadmemidx-helpers.h	commit \| commitdiff \| tree
2023-11-08	Christoph Müllner	RISC-V: Add ABI requirement for XTheadFMemIdx tests	commit \| commitdiff \| tree
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