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| 2023-11-22 | Patrick O'Neill | gfortran: Rely on dg-do-what-default to avoid running... Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-11-21 | Patrick O'Neill | RISC-V: Fix ICE in non-canonical march parsing Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-11-20 | Patrick O'Neill | g++: Rely on dg-do-what-default to avoid running pr102788... Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-11-08 | Patrick O'Neill | RISC-V: Use riscv_subword_address for atomic_test_and_set Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-11-08 | Patrick O'Neill | RISC-V: Enable ztso tests on rv32 Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-11-08 | Patrick O'Neill | RISC-V: Require a extension for testcases with atomic... Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-11-08 | Patrick O'Neill | RISC-V: Let non-atomic targets use optimized amo loads... Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-10-30 | Patrick O'Neill | RISC-V: Make rv32i_zcmp testcase more robust Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-10-30 | Patrick O'Neill | RISC-V: Make stack_save_restore_2 more robust Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-10-30 | Patrick O'Neill | RISC-V: Pass abi to g++ rvv testsuite Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-10-09 | Patrick O'Neill | RISC-V: Use stdint-gcc.h in rvv testsuite Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-10-09 | Patrick O'Neill | RISC-V: Test memcpy inlined on riscv_v Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-10-09 | Patrick O'Neill | RISC-V: Unescape chars in pr111566.f90 test Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-10-03 | Patrick O'Neill | RISC-V: Use safe_grow_cleared for vector info [PR111649] |
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| 2023-10-03 | Patrick O'Neill | RISC-V: Specify -mabi=lp64d in wredsum_vlmax.c testcase Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-09-26 | Patrick O'Neill | RISC-V: Remove math.h import to resolve missing stubs... Tested-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-09-26 | Patrick O'Neill | RISC-V: Fix --enable-checking=rtl ICE on rv32gc bootstrap Tested-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-08-28 | Patrick O'Neill | RISC-V: Move vector-abi testcases into rvv/base folder Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-08-21 | Patrick O'Neill | RISCV: Add rotate immediate regression test Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-08-17 | Patrick O'Neill | RISC-V: Specify -mabi for ztso testcases 2023-08-11 Patrick O'Neill <patrick@rivosinc.com> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-08-17 | Patrick O'Neill | RISC-V: Add Ztso atomic mappings 2023-08-08 Patrick O'Neill <patrick@rivosinc.com> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-08-07 | Patrick O'Neill | RISC-V: Specify -mabi in rv64 autovec testcase Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-07-13 | Patrick O'Neill | RISC-V: Table A.6 conformance tests 2023-04-27 Patrick O'Neill <patrick@rivosinc.com> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-07-13 | Patrick O'Neill | RISC-V: Weaken atomic loads 2023-04-27 Patrick O'Neill <patrick@rivosinc.com> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-07-13 | Patrick O'Neill | RISC-V: Weaken mem_thread_fence 2023-04-27 Patrick O'Neill <patrick@rivosinc.com> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-07-13 | Patrick O'Neill | RISC-V: Weaken LR/SC pairs 2023-04-27 Patrick O'Neill <patrick@rivosinc.com> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-07-13 | Patrick O'Neill | RISC-V: Eliminate AMO op fences 2023-04-27 Patrick O'Neill <patrick@rivosinc.com> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-07-13 | Patrick O'Neill | RISC-V: Strengthen atomic stores 2023-04-27 Patrick O'Neill <patrick@rivosinc.com> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-07-13 | Patrick O'Neill | RISC-V: Add AMO release bits 2023-04-27 Patrick O'Neill <patrick@rivosinc.com> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-07-13 | Patrick O'Neill | RISC-V: Enforce atomic compare_exchange SEQ_CST 2023-04-27 Patrick O'Neill <patrick@rivosinc.com> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-07-13 | Patrick O'Neill | RISC-V: Enforce subword atomic LR/SC SEQ_CST 2023-04-27 Patrick O'Neill <patrick@rivosinc.com> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-07-13 | Patrick O'Neill | RISC-V: Enforce Libatomic LR/SC SEQ_CST 2023-04-27 Patrick O'Neill <patrick@rivosinc.com> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-07-13 | Patrick O'Neill | RISC-V: Eliminate SYNC memory models 2023-04-27 Patrick O'Neill <patrick@rivosinc.com> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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| 2023-05-16 | Patrick O'Neill | RISCV: Inline subword atomic ops 2023-05-03 Patrick O'Neill <patrick@rivosinc.com> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> |
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