From e6269bb69c0734a5af716bfbded3621de6ca351d Mon Sep 17 00:00:00 2001 From: xuli Date: Fri, 17 Nov 2023 04:48:47 +0000 Subject: [PATCH] RISC-V: Implement -mmemcpy-strategy= options[PR112537] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112537 -mmemcpy-strategy=[auto|libcall|scalar|vector] auto: Current status, use scalar or vector instructions. libcall: Always use a library call. scalar: Only use scalar instructions. vector: Only use vector instructions. PR target/112537 gcc/ChangeLog: * config/riscv/riscv-opts.h (enum riscv_stringop_strategy_enum): Strategy enum. * config/riscv/riscv-string.cc (riscv_expand_block_move): Disabled based on options. (expand_block_move): Ditto. * config/riscv/riscv.opt: Add -mmemcpy-strategy=. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/cpymem-strategy-1.c: New test. * gcc.target/riscv/rvv/base/cpymem-strategy-2.c: New test. * gcc.target/riscv/rvv/base/cpymem-strategy-3.c: New test. * gcc.target/riscv/rvv/base/cpymem-strategy-4.c: New test. * gcc.target/riscv/rvv/base/cpymem-strategy-5.c: New test. * gcc.target/riscv/rvv/base/cpymem-strategy.h: New test. --- gcc/config/riscv/riscv-opts.h | 12 +++++++++++ gcc/config/riscv/riscv-string.cc | 7 ++++++- gcc/config/riscv/riscv.opt | 20 +++++++++++++++++++ .../riscv/rvv/base/cpymem-strategy-1.c | 6 ++++++ .../riscv/rvv/base/cpymem-strategy-2.c | 6 ++++++ .../riscv/rvv/base/cpymem-strategy-3.c | 6 ++++++ .../riscv/rvv/base/cpymem-strategy-4.c | 6 ++++++ .../riscv/rvv/base/cpymem-strategy-5.c | 6 ++++++ .../riscv/rvv/base/cpymem-strategy.h | 12 +++++++++++ 9 files changed, 80 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy.h diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h index 532b1b6b84a0..0b242f068e18 100644 --- a/gcc/config/riscv/riscv-opts.h +++ b/gcc/config/riscv/riscv-opts.h @@ -102,6 +102,18 @@ enum riscv_entity MAX_RISCV_ENTITIES }; +/* RISC-V stringop strategy. */ +enum riscv_stringop_strategy_enum { + /* Use scalar or vector instructions. */ + USE_AUTO, + /* Always use a library call. */ + USE_LIBCALL, + /* Only use scalar instructions. */ + USE_SCALAR, + /* Only use vector instructions. */ + USE_VECTOR +}; + #define TARGET_ZICOND_LIKE (TARGET_ZICOND || (TARGET_XVENTANACONDOPS && TARGET_64BIT)) /* Bit of riscv_zvl_flags will set contintuly, N-1 bit will set if N-bit is diff --git a/gcc/config/riscv/riscv-string.cc b/gcc/config/riscv/riscv-string.cc index 57e8ad698d72..3b5e05e2c449 100644 --- a/gcc/config/riscv/riscv-string.cc +++ b/gcc/config/riscv/riscv-string.cc @@ -710,6 +710,10 @@ riscv_block_move_loop (rtx dest, rtx src, unsigned HOST_WIDE_INT length, bool riscv_expand_block_move (rtx dest, rtx src, rtx length) { + if (riscv_memcpy_strategy == USE_LIBCALL + || riscv_memcpy_strategy == USE_VECTOR) + return false; + if (CONST_INT_P (length)) { unsigned HOST_WIDE_INT hwi_length = UINTVAL (length); @@ -773,7 +777,8 @@ expand_block_move (rtx dst_in, rtx src_in, rtx length_in) bnez a2, loop # Any more? ret # Return */ - if (!TARGET_VECTOR) + if (!TARGET_VECTOR || riscv_memcpy_strategy == USE_LIBCALL + || riscv_memcpy_strategy == USE_SCALAR) return false; HOST_WIDE_INT potential_ew = (MIN (MIN (MEM_ALIGN (src_in), MEM_ALIGN (dst_in)), BITS_PER_WORD) diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt index 1bd661a3fe49..555288e682a9 100644 --- a/gcc/config/riscv/riscv.opt +++ b/gcc/config/riscv/riscv.opt @@ -527,3 +527,23 @@ Target Var(TARGET_ADJUST_LMUL_COST) Init(0) Target Undocumented Bool Var(riscv_vector_abi) Init(0) Enable the use of vector registers for function arguments and return value. This is an experimental switch and may be subject to change in the future. + +Enum +Name(riscv_stringop_strategy) Type(enum riscv_stringop_strategy_enum) +Valid arguments to -mmemcpy-strategy=: + +EnumValue +Enum(riscv_stringop_strategy) String(auto) Value(USE_AUTO) + +EnumValue +Enum(riscv_stringop_strategy) String(libcall) Value(USE_LIBCALL) + +EnumValue +Enum(riscv_stringop_strategy) String(scalar) Value(USE_SCALAR) + +EnumValue +Enum(riscv_stringop_strategy) String(vector) Value(USE_VECTOR) + +mmemcpy-strategy= +Target RejectNegative Joined Enum(riscv_stringop_strategy) Var(riscv_memcpy_strategy) Init(USE_AUTO) +Specify memcpy expansion strategy. diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-1.c new file mode 100644 index 000000000000..ae49706dca56 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-1.c @@ -0,0 +1,6 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32d -mmemcpy-strategy=libcall" } */ + +#include "cpymem-strategy.h" + +/* { dg-final { scan-assembler-times {call\tmemcpy} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-2.c new file mode 100644 index 000000000000..73ffc5783d06 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-2.c @@ -0,0 +1,6 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=rv32gcv -mabi=ilp32d -mmemcpy-strategy=scalar" } */ + +#include "cpymem-strategy.h" + +/* { dg-final { scan-assembler-times {call\tmemcpy} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-3.c b/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-3.c new file mode 100644 index 000000000000..44f5f7839629 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-3.c @@ -0,0 +1,6 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32d -mmemcpy-strategy=vector" } */ + +#include "cpymem-strategy.h" + +/* { dg-final { scan-assembler-times {v[ls]+e[0-9]+\.v\tv[0-9]+\,0\([a-z0-9]+\)} 4 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-4.c b/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-4.c new file mode 100644 index 000000000000..8056895334a0 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-4.c @@ -0,0 +1,6 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32d -mmemcpy-strategy=auto" } */ + +#include "cpymem-strategy.h" + +/* { dg-final { scan-assembler-times {v[ls]+e[0-9]+\.v\tv[0-9]+\,0\([a-z0-9]+\)} 4 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-5.c b/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-5.c new file mode 100644 index 000000000000..82ecab04a403 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-5.c @@ -0,0 +1,6 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gc -mabi=ilp32d -mmemcpy-strategy=vector" } */ + +#include "cpymem-strategy.h" + +/* { dg-final { scan-assembler-times {call\tmemcpy} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy.h b/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy.h new file mode 100644 index 000000000000..700d224c01fe --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy.h @@ -0,0 +1,12 @@ +typedef struct { unsigned char a[56]; } a56; +typedef struct { int b[32]; } b32; + +void f1 (a56 *v1, a56 *v2) +{ + *v1 = *v2; +} + +void f2 (b32 *v1, b32 *v2) +{ + *v1 = *v2; +} -- 2.43.5