From b9fa227db9c8f21061285823768b73adb07cc395 Mon Sep 17 00:00:00 2001 From: Andreas Jaeger Date: Thu, 26 May 2005 21:10:52 +0200 Subject: [PATCH] re PR testsuite/20772 (x86 tests should run on both i?86 and x86_64) PR testsuite/20772 * gfortran.dg/promotion.f90, gcc.misc-tests/i386-pf-3dnow-1.c, gcc.misc-tests/i386-pf-athlon-1.c, gcc.misc-tests/i386-pf-none-1.c, gcc.misc-tests/i386-pf-sse-1.c, g++.dg/opt/mmx1.C, g++.dg/other/big-struct.C, g++.dg/abi/bitfield3.C, g++.dg/abi/bitfield8.C, g++.dg/abi/bitfield9.C, g++.dg/abi/empty7.C, g++.dg/abi/empty9.C, g++.dg/abi/layout4.C, g++.dg/abi/thunk1.C, g++.dg/abi/thunk2.C, g++.dg/abi/vbase11.C, g++.dg/abi/vthunk2.C, g++.dg/abi/vthunk3.C, g++.dg/ext/attrib8.C: Run also on x86_64 compiling 32-bit x86 programs. * g++.dg/opt/reg-stack4.C, g++.dg/eh/simd-1.C, g++.dg/eh/simd-1.C, gcc.dg/setjmp-2.c, gcc.dg/short-compare-1.c, gcc.dg/short-compare-2.c, gcc.target/i386/asm-1.c: Handle 32-bit x86-64 compilation. * g++.dg/warn/register-var-1.C, g++.dg/charset/asm2.c: Run also on x86_64. * gcc.dg/i386-pentium4-not-mull.c: Change option handling to use effective-target ilp32. From-SVN: r100220 --- gcc/testsuite/ChangeLog | 27 ++++++++++++++++++- gcc/testsuite/g++.dg/abi/bitfield3.C | 4 +-- gcc/testsuite/g++.dg/abi/bitfield8.C | 5 ++-- gcc/testsuite/g++.dg/abi/bitfield9.C | 3 ++- gcc/testsuite/g++.dg/abi/empty7.C | 4 +-- gcc/testsuite/g++.dg/abi/empty9.C | 4 +-- gcc/testsuite/g++.dg/abi/layout4.C | 4 +-- gcc/testsuite/g++.dg/abi/thunk1.C | 5 ++-- gcc/testsuite/g++.dg/abi/thunk2.C | 4 +-- gcc/testsuite/g++.dg/abi/vbase11.C | 4 +-- gcc/testsuite/g++.dg/abi/vthunk2.C | 4 +-- gcc/testsuite/g++.dg/abi/vthunk3.C | 4 +-- gcc/testsuite/g++.dg/charset/asm2.c | 2 +- gcc/testsuite/g++.dg/eh/simd-1.C | 1 + gcc/testsuite/g++.dg/ext/attrib8.C | 4 +-- gcc/testsuite/g++.dg/opt/mmx1.C | 3 ++- gcc/testsuite/g++.dg/opt/reg-stack4.C | 4 +-- gcc/testsuite/g++.dg/other/big-struct.C | 3 ++- gcc/testsuite/g++.dg/warn/register-var-1.C | 2 +- gcc/testsuite/gcc.dg/i386-pentium4-not-mull.c | 5 ++-- gcc/testsuite/gcc.dg/setjmp-2.c | 4 +-- gcc/testsuite/gcc.dg/short-compare-1.c | 2 +- gcc/testsuite/gcc.dg/short-compare-2.c | 2 +- .../gcc.misc-tests/i386-pf-3dnow-1.c | 4 +-- .../gcc.misc-tests/i386-pf-athlon-1.c | 4 +-- gcc/testsuite/gcc.misc-tests/i386-pf-none-1.c | 4 +-- gcc/testsuite/gcc.misc-tests/i386-pf-sse-1.c | 4 +-- gcc/testsuite/gfortran.dg/promotion.f90 | 3 ++- 28 files changed, 77 insertions(+), 46 deletions(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 545b1b1658f3..620ae211c388 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,8 +1,33 @@ +2005-05-26 Andreas Jaeger + + PR testsuite/20772 + * gfortran.dg/promotion.f90, gcc.misc-tests/i386-pf-3dnow-1.c, + gcc.misc-tests/i386-pf-athlon-1.c, + gcc.misc-tests/i386-pf-none-1.c, gcc.misc-tests/i386-pf-sse-1.c, + g++.dg/opt/mmx1.C, g++.dg/other/big-struct.C, + g++.dg/abi/bitfield3.C, g++.dg/abi/bitfield8.C, + g++.dg/abi/bitfield9.C, g++.dg/abi/empty7.C, g++.dg/abi/empty9.C, + g++.dg/abi/layout4.C, g++.dg/abi/thunk1.C, g++.dg/abi/thunk2.C, + g++.dg/abi/vbase11.C, g++.dg/abi/vthunk2.C, g++.dg/abi/vthunk3.C, + g++.dg/ext/attrib8.C: Run also on x86_64 compiling 32-bit x86 + programs. + + * g++.dg/opt/reg-stack4.C, g++.dg/eh/simd-1.C, g++.dg/eh/simd-1.C, + gcc.dg/setjmp-2.c, gcc.dg/short-compare-1.c, + gcc.dg/short-compare-2.c, gcc.target/i386/asm-1.c: Handle 32-bit + x86-64 compilation. + + * g++.dg/warn/register-var-1.C, g++.dg/charset/asm2.c: Run also on + x86_64. + + * gcc.dg/i386-pentium4-not-mull.c: Change option handling to use + effective-target ilp32. + 2005-05-26 David Ung * gcc.target/mips/ext_ins.c: New test for testing the generation of MIPS32/64 rev 2 ext/ins instructions. - + 2005-05-26 Andreas Jaeger * treelang/compile/unsigned.tree: Use gimple instead of diff --git a/gcc/testsuite/g++.dg/abi/bitfield3.C b/gcc/testsuite/g++.dg/abi/bitfield3.C index 864abc33b8db..b96c9ed8d932 100644 --- a/gcc/testsuite/g++.dg/abi/bitfield3.C +++ b/gcc/testsuite/g++.dg/abi/bitfield3.C @@ -1,10 +1,10 @@ // Test for oversized bitfield alignment in structs on IA-32 -// { dg-do run { target i?86-*-* } } +// { dg-do run { target i?86-*-* x86_64-*-* } } // { dg-options "-O2" } // Cygwin and mingw32 default to MASK_ALIGN_DOUBLE. Override to ensure // 4-byte alignment. // { dg-options "-mno-align-double" { target i?86-*-cygwin* i?86-*-mingw* } } -// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } +// { dg-require-effective-target ilp32 } struct A { diff --git a/gcc/testsuite/g++.dg/abi/bitfield8.C b/gcc/testsuite/g++.dg/abi/bitfield8.C index 6130ae45739b..58e74be08fb5 100644 --- a/gcc/testsuite/g++.dg/abi/bitfield8.C +++ b/gcc/testsuite/g++.dg/abi/bitfield8.C @@ -1,6 +1,7 @@ -// { dg-do run { target i?86-*-* } } +// { dg-do run { target i?86-*-* x86_64-*-* } } // { dg-options "-fabi-version=0" } -// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } +// { dg-require-effective-target ilp32 } + struct A { virtual void f() {} diff --git a/gcc/testsuite/g++.dg/abi/bitfield9.C b/gcc/testsuite/g++.dg/abi/bitfield9.C index 0d744c7318f6..0d3a8bf89858 100644 --- a/gcc/testsuite/g++.dg/abi/bitfield9.C +++ b/gcc/testsuite/g++.dg/abi/bitfield9.C @@ -1,4 +1,5 @@ -// { dg-do run { target i?86-*-* } } +// { dg-do run { target i?86-*-* x86_64-*-* } } +// { dg-require-effective-target ilp32 } // { dg-options -w } struct X { diff --git a/gcc/testsuite/g++.dg/abi/empty7.C b/gcc/testsuite/g++.dg/abi/empty7.C index 5ff75e65d974..0a665a845317 100644 --- a/gcc/testsuite/g++.dg/abi/empty7.C +++ b/gcc/testsuite/g++.dg/abi/empty7.C @@ -1,5 +1,5 @@ -// { dg-do run { target i?86-*-* } } -// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } +// { dg-do run { target i?86-*-* x86_64-*-* } } +// { dg-require-effective-target ilp32 } // { dg-options "-fabi-version=0" } struct S1 {}; diff --git a/gcc/testsuite/g++.dg/abi/empty9.C b/gcc/testsuite/g++.dg/abi/empty9.C index 3c4b71f100fb..06e616adb30d 100644 --- a/gcc/testsuite/g++.dg/abi/empty9.C +++ b/gcc/testsuite/g++.dg/abi/empty9.C @@ -1,5 +1,5 @@ -// { dg-do run { target i?86-*-* } } -// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } +// { dg-do run { target i?86-*-* x86_64-*-* } } +// { dg-require-effective-target ilp32 } // { dg-options "-w -fabi-version=0" } struct E1 {}; diff --git a/gcc/testsuite/g++.dg/abi/layout4.C b/gcc/testsuite/g++.dg/abi/layout4.C index 13d3648d6f5d..da3c2f5d8c77 100644 --- a/gcc/testsuite/g++.dg/abi/layout4.C +++ b/gcc/testsuite/g++.dg/abi/layout4.C @@ -1,5 +1,5 @@ -// { dg-do run { target i?86-*-* } } -// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } +// { dg-do run { target i?86-*-* x86_64-*-* } } +// { dg-require-effective-target ilp32 } // { dg-options "-fabi-version=1" } struct C4 diff --git a/gcc/testsuite/g++.dg/abi/thunk1.C b/gcc/testsuite/g++.dg/abi/thunk1.C index 5508882359f4..343a2aa6e276 100644 --- a/gcc/testsuite/g++.dg/abi/thunk1.C +++ b/gcc/testsuite/g++.dg/abi/thunk1.C @@ -1,5 +1,6 @@ -// { dg-do compile { target i?86-*-* } } -// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } +// { dg-do compile { target i?86-*-* x86_64-*-* } } +// { dg-require-effective-target ilp32 } + struct A { virtual void f (); diff --git a/gcc/testsuite/g++.dg/abi/thunk2.C b/gcc/testsuite/g++.dg/abi/thunk2.C index c1f88682df93..e6b2924cfdba 100644 --- a/gcc/testsuite/g++.dg/abi/thunk2.C +++ b/gcc/testsuite/g++.dg/abi/thunk2.C @@ -1,5 +1,5 @@ -// { dg-do compile { target i?86-*-* } } -// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } +// { dg-do compile { target i?86-*-* x86_64-*-* } } +// { dg-require-effective-target ilp32 } // { dg-options -w } struct A { diff --git a/gcc/testsuite/g++.dg/abi/vbase11.C b/gcc/testsuite/g++.dg/abi/vbase11.C index 1dcc75647ca2..8c854b9c13e6 100644 --- a/gcc/testsuite/g++.dg/abi/vbase11.C +++ b/gcc/testsuite/g++.dg/abi/vbase11.C @@ -1,5 +1,5 @@ -// { dg-do run { target i?86-*-* } } -// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } +// { dg-do run { target i?86-*-* x86_64-*-* } } +// { dg-require-effective-target ilp32 } // { dg-options "-fabi-version=0" } struct A { virtual void f(); char c1; }; diff --git a/gcc/testsuite/g++.dg/abi/vthunk2.C b/gcc/testsuite/g++.dg/abi/vthunk2.C index 698c691cc0a7..9b6f14c50e2c 100644 --- a/gcc/testsuite/g++.dg/abi/vthunk2.C +++ b/gcc/testsuite/g++.dg/abi/vthunk2.C @@ -1,5 +1,5 @@ -// { dg-do compile { target i?86-*-* } } -// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } +// { dg-do compile { target i?86-*-* x86_64-*-*} } +// { dg-require-effective-target ilp32 } struct c0 { virtual void f (); diff --git a/gcc/testsuite/g++.dg/abi/vthunk3.C b/gcc/testsuite/g++.dg/abi/vthunk3.C index 969cd2da84c1..59fbbdc4be30 100644 --- a/gcc/testsuite/g++.dg/abi/vthunk3.C +++ b/gcc/testsuite/g++.dg/abi/vthunk3.C @@ -1,5 +1,5 @@ -// { dg-do compile { target i?86-*-* } } -// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } +// { dg-do compile { target i?86-*-* x86_64-*-* } } +// { dg-require-effective-target ilp32 } // { dg-options "-fabi-version=0" } struct A { diff --git a/gcc/testsuite/g++.dg/charset/asm2.c b/gcc/testsuite/g++.dg/charset/asm2.c index 8ae2212fd260..7fb1959d260f 100644 --- a/gcc/testsuite/g++.dg/charset/asm2.c +++ b/gcc/testsuite/g++.dg/charset/asm2.c @@ -1,6 +1,6 @@ /* Test for complex asm statements. Make sure it compiles then test for some of the asm statements not being translated. */ -/* { dg-do compile { target i?86-*-* } } +/* { dg-do compile { target i?86-*-* x86_64-*-* } } { dg-require-iconv "IBM1047" } { dg-final { scan-assembler "std" } } { dg-final { scan-assembler "cld" } } diff --git a/gcc/testsuite/g++.dg/eh/simd-1.C b/gcc/testsuite/g++.dg/eh/simd-1.C index fe71b78043f3..e7c30dbf3bda 100644 --- a/gcc/testsuite/g++.dg/eh/simd-1.C +++ b/gcc/testsuite/g++.dg/eh/simd-1.C @@ -2,6 +2,7 @@ // Contributed by Aldy Hernandez (aldy@quesejoda.com). // { dg-options "-O" } // { dg-options "-O -w" { target i?86-*-* } } +// { dg-options "-O -w" { target { x86_64-*-* && ilp32 } } } // { dg-do run } typedef int __attribute__((vector_size (8))) vecint; diff --git a/gcc/testsuite/g++.dg/ext/attrib8.C b/gcc/testsuite/g++.dg/ext/attrib8.C index df2d48fecf46..7d99132c1751 100644 --- a/gcc/testsuite/g++.dg/ext/attrib8.C +++ b/gcc/testsuite/g++.dg/ext/attrib8.C @@ -1,6 +1,6 @@ // PR 8656 -// { dg-do compile { target i?86-*-* } } -// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } +// { dg-do compile { target i?86-*-* x86_64-*-* } } +// { dg-require-effective-target ilp32 } extern int * (__attribute__((stdcall)) *fooPtr)( void); int * __attribute__((stdcall)) myFn01( void) { return 0; } diff --git a/gcc/testsuite/g++.dg/opt/mmx1.C b/gcc/testsuite/g++.dg/opt/mmx1.C index e433d554aea5..f13b2f844af6 100644 --- a/gcc/testsuite/g++.dg/opt/mmx1.C +++ b/gcc/testsuite/g++.dg/opt/mmx1.C @@ -3,7 +3,8 @@ // mmx -> mmx register moves. // { dg-do compile } // { dg-options "-O2" } -// { dg-options "-fno-exceptions -O2 -mmmx -fPIC" { target i?86-*-* } } +// { dg-options "-fno-exceptions -O2 -mmmx -fPIC" { target { i?86-*-* && ilp32 } } } +// { dg-options "-fno-exceptions -O2 -mmmx -fPIC" { target { x86_64-*-* && ilp32 } } } struct A { unsigned a0; diff --git a/gcc/testsuite/g++.dg/opt/reg-stack4.C b/gcc/testsuite/g++.dg/opt/reg-stack4.C index 9ea77c232303..9d52845db646 100644 --- a/gcc/testsuite/g++.dg/opt/reg-stack4.C +++ b/gcc/testsuite/g++.dg/opt/reg-stack4.C @@ -5,8 +5,8 @@ // deleted a valid edge. // { dg-do compile } -// { dg-options "-mtune=i586 -O2" { target i?86-*-* } } -// { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } +// { dg-options "-mtune=i586 -O2" { target { i?86-*-* && ilp32 } } } +// { dg-options "-mtune=i586 -O2" { target { x86_64-*-* && ilp32 } } } struct array { double data; diff --git a/gcc/testsuite/g++.dg/other/big-struct.C b/gcc/testsuite/g++.dg/other/big-struct.C index b00683135f3c..dcf230dd69cf 100644 --- a/gcc/testsuite/g++.dg/other/big-struct.C +++ b/gcc/testsuite/g++.dg/other/big-struct.C @@ -1,4 +1,5 @@ -// { dg-do compile { target i?86-*-* } } +// { dg-do compile { target i?86-*-* x86_64-*-* } } +// { dg-require-effective-target ilp32 } struct A { diff --git a/gcc/testsuite/g++.dg/warn/register-var-1.C b/gcc/testsuite/g++.dg/warn/register-var-1.C index 88e4a6419a09..3396d211385a 100644 --- a/gcc/testsuite/g++.dg/warn/register-var-1.C +++ b/gcc/testsuite/g++.dg/warn/register-var-1.C @@ -1,6 +1,6 @@ /* PR/18160 */ -/* { dg-do compile { target i?86-*-* } } */ +/* { dg-do compile { target i?86-*-* x86_64-*-* } } */ /* This should yield an error even without -pedantic. */ /* { dg-options "-ansi" } */ diff --git a/gcc/testsuite/gcc.dg/i386-pentium4-not-mull.c b/gcc/testsuite/gcc.dg/i386-pentium4-not-mull.c index 2df07822ded5..2ae7512cb48b 100644 --- a/gcc/testsuite/gcc.dg/i386-pentium4-not-mull.c +++ b/gcc/testsuite/gcc.dg/i386-pentium4-not-mull.c @@ -1,7 +1,6 @@ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ -/* { dg-options "-O2 -march=pentium4" { target i?86-*-* } } */ -/* { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } */ -/* { dg-options "-O2 -march=pentium4 -m32" { target x86_64-*-* } } */ +/* { dg-require-effective-target ilp32 } */ +/* { dg-options "-O2 -march=pentium4" } */ /* { dg-final { scan-assembler-not "imull" } } */ /* Should be done not using imull. */ diff --git a/gcc/testsuite/gcc.dg/setjmp-2.c b/gcc/testsuite/gcc.dg/setjmp-2.c index 6c89f8e96970..14c27ddc12e8 100644 --- a/gcc/testsuite/gcc.dg/setjmp-2.c +++ b/gcc/testsuite/gcc.dg/setjmp-2.c @@ -1,8 +1,8 @@ /* PR middle-end/17813 */ /* Origin: Tom Hughes */ /* { dg-do run { target i?86-*-linux* x86_64-*-linux* } } */ -/* { dg-options "-O -fomit-frame-pointer -march=i386" { target i?86-*-linux* } } */ -/* { dg-options "-O -fomit-frame-pointer -m32 -march=i386" { target x86_64-*-linux* } } */ +/* { dg-options "-O -fomit-frame-pointer -march=i386" { target { i?86-*-linux* && ilp32 } } } */ +/* { dg-options "-O -fomit-frame-pointer -march=i386" { target { x86_64-*-linux* && ilp32 } } } */ #include #include diff --git a/gcc/testsuite/gcc.dg/short-compare-1.c b/gcc/testsuite/gcc.dg/short-compare-1.c index 7ecca243a7ce..8c02a893347b 100644 --- a/gcc/testsuite/gcc.dg/short-compare-1.c +++ b/gcc/testsuite/gcc.dg/short-compare-1.c @@ -4,7 +4,7 @@ /* { dg-do run } */ /* { dg-options "-O" } */ /* { dg-options "-O -mtune=i686" { target { i?86-*-* && ilp32 } } } */ -/* { dg-options "-O -m32 -mtune=i686" { target x86_64-*-* } } */ +/* { dg-options "-O -mtune=i686" { target { x86_64-*-* && ilp32 } } } */ extern void abort(void); diff --git a/gcc/testsuite/gcc.dg/short-compare-2.c b/gcc/testsuite/gcc.dg/short-compare-2.c index 736e1510e8d3..1c2192e821a8 100644 --- a/gcc/testsuite/gcc.dg/short-compare-2.c +++ b/gcc/testsuite/gcc.dg/short-compare-2.c @@ -5,7 +5,7 @@ /* { dg-do run } */ /* { dg-options "-O" } */ /* { dg-options "-O -mtune=i686" { target { i?86-*-* && ilp32 } } } */ -/* { dg-options "-O -m32 -mtune=i686" { target x86_64-*-* } } */ +/* { dg-options "-O -mtune=i686" { target { x86_64-*-* && ilp32 } } } */ extern void abort(); diff --git a/gcc/testsuite/gcc.misc-tests/i386-pf-3dnow-1.c b/gcc/testsuite/gcc.misc-tests/i386-pf-3dnow-1.c index e4961cf6c51a..ffb2e79530b9 100644 --- a/gcc/testsuite/gcc.misc-tests/i386-pf-3dnow-1.c +++ b/gcc/testsuite/gcc.misc-tests/i386-pf-3dnow-1.c @@ -1,8 +1,8 @@ /* Test that the correct data prefetch instructions are generated for i386 variants that use 3DNow! prefetch instructions. */ -/* { dg-do compile { target i?86-*-* } } */ -/* { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } */ +/* { dg-do compile { target i?86-*-* x86_64-*-*} } */ +/* { dg-require-effective-target ilp32 } */ extern void exit (int); diff --git a/gcc/testsuite/gcc.misc-tests/i386-pf-athlon-1.c b/gcc/testsuite/gcc.misc-tests/i386-pf-athlon-1.c index 08d046bf1c85..8d5ad1efe7d6 100644 --- a/gcc/testsuite/gcc.misc-tests/i386-pf-athlon-1.c +++ b/gcc/testsuite/gcc.misc-tests/i386-pf-athlon-1.c @@ -2,8 +2,8 @@ variants that use 3DNow! prefetchw or SSE prefetch instructions with locality hints. */ -/* { dg-do compile { target i?86-*-* } } */ -/* { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } */ +/* { dg-do compile { target i?86-*-* x86_64-*-* } } */ +/* { dg-require-effective-target ilp32 } */ extern void exit (int); diff --git a/gcc/testsuite/gcc.misc-tests/i386-pf-none-1.c b/gcc/testsuite/gcc.misc-tests/i386-pf-none-1.c index 155e0f4ac021..d87a2100dda8 100644 --- a/gcc/testsuite/gcc.misc-tests/i386-pf-none-1.c +++ b/gcc/testsuite/gcc.misc-tests/i386-pf-none-1.c @@ -1,8 +1,8 @@ /* Test that data prefetch instructions are not generated for i386 variants that do not support those instructions. */ -/* { dg-do compile { target i?86-*-* } } */ -/* { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } */ +/* { dg-do compile { target i?86-*-* x86_64-*-* } } */ +/* { dg-require-effective-target ilp32 } */ extern void exit (int); diff --git a/gcc/testsuite/gcc.misc-tests/i386-pf-sse-1.c b/gcc/testsuite/gcc.misc-tests/i386-pf-sse-1.c index 7d1ed99ecbc6..fb47c9dfc539 100644 --- a/gcc/testsuite/gcc.misc-tests/i386-pf-sse-1.c +++ b/gcc/testsuite/gcc.misc-tests/i386-pf-sse-1.c @@ -1,8 +1,8 @@ /* Test that the correct data prefetch instructions are generated for i386 variants that use SSE prefetch instructions. */ -/* { dg-do compile { target i?86-*-* } } */ -/* { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } */ +/* { dg-do compile { target i?86-*-* x86_64-*-* } } */ +/* { dg-require-effective-target ilp32 } */ extern void exit (int); diff --git a/gcc/testsuite/gfortran.dg/promotion.f90 b/gcc/testsuite/gfortran.dg/promotion.f90 index d1b9b686e589..80716093136b 100644 --- a/gcc/testsuite/gfortran.dg/promotion.f90 +++ b/gcc/testsuite/gfortran.dg/promotion.f90 @@ -1,4 +1,5 @@ -! { dg-do run { target i?86-*-* } } +! { dg-do run { target i?86-*-* x86_64-*-* } } +! { dg-require-effective-target ilp32 } ! { dg-options "-fdefault-integer-8 -fdefault-real-8" } program a logical l -- 2.43.5