RISC-V: Also invert the cond-move condition for GEU and LEU

RISC-V: Also invert the cond-move condition for GEU and LEU

Update `riscv_expand_conditional_move' and handle the missing GEU and
LEU operators there, avoiding an extraneous conditional set operation,
such as with this output:

	sgtu	a0,a0,a1
	seqz	a1,a0
	czero.eqz	a3,a3,a1
	czero.nez	a1,a2,a1
	or	a0,a1,a3

produced when optimizing for Zicond targets from:

int
movsigtu (int w, int x, int y, int z)
{
  return w > x ? y : z;
}

These operators can be inverted producing optimal code such as this:

	sgtu	a1,a0,a1
	czero.nez	a3,a3,a1
	czero.eqz	a1,a2,a1
	or	a0,a1,a3

which this change causes to happen.

	gcc/
	* config/riscv/riscv.cc (riscv_expand_conditional_move): Also
	invert the condition for GEU and LEU.