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9 months agoarc: Remove unused/incomplete alignment assembly annotation.
Claudiu Zissulescu [Thu, 5 Oct 2023 11:30:52 +0000 (14:30 +0300)]
arc: Remove unused/incomplete alignment assembly annotation.

Removes '&' print operant punct character, disable -mannotate-align
option and clean up the port.

gcc/

* config/arc/arc-protos.h (arc_clear_unalign): Remove.
(arc_toggle_unalign): Likewise.
* config/arc/arc.cc (machine_function) Remove unalign.
(arc_init): Remove `&` punct character.
(arc_print_operand): Remove `&` related functions.
(arc_verify_short): Update function's number of parameters.
(output_short_suffix): Update function.
(arc_short_long): Likewise.
(arc_clear_unalign): Remove.
(arc_toggle_unalign): Likewise.
* config/arc/arc.h (ASM_OUTPUT_CASE_END): Remove.
(ASM_OUTPUT_ALIGN): Update.
* config/arc/arc.md: Remove all `%&` references.
* config/arc/arc.opt (mannotate-align): Ignore option.
* doc/invoke.texi (mannotate-align): Update description.

Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
9 months agoFix SIMD call SLP discovery
Richard Biener [Thu, 5 Oct 2023 08:26:34 +0000 (10:26 +0200)]
Fix SIMD call SLP discovery

When we do SLP discovery of SIMD calls we run into the issue that
when the call is neither builtin nor internal function we have
cfn == CFN_LAST but internal_fn_p of that returns true.  Since
IFN_LAST isn't vectorizable we fail spuriously.

Fixed by checking for cfn != CFN_LAST && internal_fn_p (cfn)
instead.

* tree-vect-slp.cc (vect_build_slp_tree_1): Do not
ask for internal_fn_p (CFN_LAST).

9 months agoAvoid left around copies when value-numbering BBs
Richard Biener [Wed, 4 Oct 2023 13:25:33 +0000 (15:25 +0200)]
Avoid left around copies when value-numbering BBs

The following makes sure to treat values whose definition we didn't
visit as available since those by definition must dominate the entry
of the region.  That avoids unpropagated copies after if-conversion
and resulting SLP discovery fails (which doesn't handle plain copies).

* tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): Not
visited value numbers are available itself.

9 months agoipa/111643 - clarify flatten attribute documentation
Richard Biener [Wed, 4 Oct 2023 09:19:10 +0000 (11:19 +0200)]
ipa/111643 - clarify flatten attribute documentation

The following clarifies the flatten attribute documentation to mention
the inlining applies also to calls formed as part of inlining earlier
calls but not calls to the function itself.

PR ipa/111643
* doc/extend.texi (attribute flatten): Clarify.

9 months agoDaily bump.
GCC Administrator [Thu, 5 Oct 2023 00:18:18 +0000 (00:18 +0000)]
Daily bump.

9 months agoAdd a GCC Security policy
Siddhesh Poyarekar [Wed, 4 Oct 2023 18:48:56 +0000 (14:48 -0400)]
Add a GCC Security policy

Define a security process and exclusions to security issues for GCC and
all components it ships.

Signed-off-by: Siddhesh Poyarekar <siddhesh@gotplt.org>
ChangeLog:

* SECURITY.txt: New file.

9 months agolibstdc++: Correctly call _string_types function
Tom Tromey [Wed, 4 Oct 2023 14:59:47 +0000 (08:59 -0600)]
libstdc++: Correctly call _string_types function

flake8 points out that the new call to _string_types from
StdExpAnyPrinter.__init__ is not correct -- it needs to be qualified.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py
(StdExpAnyPrinter.__init__): Qualify call to
_string_types.

9 months agoARC: Split SImode shifts pre-reload on !TARGET_BARREL_SHIFTER.
Roger Sayle [Wed, 4 Oct 2023 16:17:03 +0000 (17:17 +0100)]
ARC: Split SImode shifts pre-reload on !TARGET_BARREL_SHIFTER.

This patch splits SImode shifts, for !TARGET_BARREL_SHIFTER targets,
after combine and before reload, in the split1 pass, as suggested by
the FIXME comment above output_shift in arc.cc.  To do this I've
copied the implementation of the x86_pre_reload_split function from
the i386 backend, and renamed it arc_pre_reload_split.

Although the actual implementations of shifts remain the same
(as in output_shift), having them as explicit instructions in
the RTL stream allows better scheduling and use of compact forms
when available.  The benefits can be seen in two short examples
below.

For the function:
unsigned int foo(unsigned int x, unsigned int y) {
  return y << 2;
}

GCC with -O2 -mcpu=em would previously generate:
foo:    add r1,r1,r1
        add r1,r1,r1
        j_s.d   [blink]
        mov_s   r0,r1   ;4
and with this patch now generates:
foo:    asl_s r0,r1
        j_s.d   [blink]
        asl_s r0,r0

Notice the original (from shift_si3's output_shift) requires the
shift sequence to be monolithic with the same destination register
as the source (requiring an extra mov_s).  The new version can
eliminate this move, and schedule the second asl in the branch
delay slot of the return.

For the function:
int x,y,z;

void bar()
{
  x <<= 3;
  y <<= 3;
  z <<= 3;
}

GCC -O2 -mcpu=em currently generates:
bar: push_s  r13
        ld.as   r12,[gp,@x@sda] ;23
        ld.as   r3,[gp,@y@sda]  ;23
        mov r2,0
        add3 r12,r2,r12
        mov r2,0
        add3 r3,r2,r3
        ld.as   r2,[gp,@z@sda]  ;23
        st.as   r12,[gp,@x@sda] ;26
        mov r13,0
        add3 r2,r13,r2
        st.as   r3,[gp,@y@sda]  ;26
        st.as   r2,[gp,@z@sda]  ;26
        j_s.d   [blink]
        pop_s   r13

where each shift by 3, uses ARC's add3 instruction, which is similar
to x86's lea implementing x = (y<<3) + z, but requires the value zero
to be placed in a temporary register "z".  Splitting this before reload
allows these pseudos to be shared/reused.  With this patch, we get

bar: ld.as   r2,[gp,@x@sda]  ;23
        mov_s   r3,0    ;3
        add3    r2,r3,r2
        ld.as   r3,[gp,@y@sda]  ;23
        st.as   r2,[gp,@x@sda]  ;26
        ld.as   r2,[gp,@z@sda]  ;23
        mov_s   r12,0   ;3
        add3    r3,r12,r3
        add3    r2,r12,r2
        st.as   r3,[gp,@y@sda]  ;26
        st.as   r2,[gp,@z@sda]  ;26
        j_s     [blink]

Unfortunately, register allocation means that we only share two of the
three "mov_s z,0", but this is sufficient to reduce register pressure
enough to avoid spilling r13 in the prologue/epilogue.

2023-10-04  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
* config/arc/arc-protos.h (emit_shift): Delete prototype.
(arc_pre_reload_split): New function prototype.
* config/arc/arc.cc (emit_shift): Delete function.
(arc_pre_reload_split): New predicate function, copied from i386,
to schedule define_insn_and_split splitters to the split1 pass.
* config/arc/arc.md (ashlsi3): Expand RTL template unconditionally.
(ashrsi3): Likewise.
(lshrsi3): Likewise.
(shift_si3): Move after other shift patterns, and disable when
operands[2] is one (which is handled by its own define_insn).
Use shiftr4_operator, instead of shift4_operator, as this is no
longer used for left shifts.
(shift_si3_loop): Likewise.  Additionally remove match_scratch.
(*ashlsi3_nobs): New pre-reload define_insn_and_split.
(*ashrsi3_nobs): Likewise.
(*lshrsi3_nobs): Likewise.
(rotrsi3_cnt1): Rename define_insn from *rotrsi3_cnt1.
(add_shift): Rename define_insn from *add_shift.
* config/arc/predicates.md (shiftl4_operator): Delete.
(shift4_operator): Delete.

gcc/testsuite/ChangeLog
* gcc.target/arc/ashrsi-1.c: New TARGET_BARREL_SHIFTER test case.
* gcc.target/arc/ashrsi-2.c: New !TARGET_BARREL_SHIFTER test case.
* gcc.target/arc/ashrsi-3.c: Likewise.
* gcc.target/arc/ashrsi-4.c: Likewise.
* gcc.target/arc/ashrsi-5.c: Likewise.
* gcc.target/arc/lshrsi-1.c: New TARGET_BARREL_SHIFTER test case.
* gcc.target/arc/lshrsi-2.c: New !TARGET_BARREL_SHIFTER test case.
* gcc.target/arc/lshrsi-3.c: Likewise.
* gcc.target/arc/lshrsi-4.c: Likewise.
* gcc.target/arc/lshrsi-5.c: Likewise.
* gcc.target/arc/shlsi-1.c: New TARGET_BARREL_SHIFTER test case.
* gcc.target/arc/shlsi-2.c: New !TARGET_BARREL_SHIFTER test case.
* gcc.target/arc/shlsi-3.c: Likewise.
* gcc.target/arc/shlsi-4.c: Likewise.
* gcc.target/arc/shlsi-5.c: Likewise.

9 months agoARC: Correct instruction length attributes.
Roger Sayle [Wed, 4 Oct 2023 16:13:35 +0000 (17:13 +0100)]
ARC: Correct instruction length attributes.

This patch changes/corrects the "type" insn attribute on the SImode shift
by one bit instructions in arc.md: {ashl,lshr,ashr}si2_cnt1.  These insns
can use a compact representation, but the default method to determine the
"length" attribute of ARC instruction assumes that instructions of type
"shift" have two input operands, and therefore accesses operands[2].
For the shift by constant templates, a type attribute of "unary" is more
appropriate (when an explicit length isn't specified) to avoid an ICE.

2023-10-04  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
* config/arc/arc.md (ashlsi3_cnt1): Rename define_insn *ashlsi2_cnt1.
Change type attribute to "unary", as this doesn't have operands[2].
Change length attribute to "*,4" to allow compact representation.
(lshrsi3_cnt1): Rename define_insn from *lshrsi3_cnt1.  Change
insn type attribute to "unary", as this doesn't have operands[2].
(ashrsi3_cnt1): Rename define_insn from *ashrsi3_cnt1.  Change
insn type attribute to "unary", as this doesn't have operands[2].

9 months agoPR rtl-optimization/110701: Fix SUBREG SET_DEST handling in combine.
Roger Sayle [Wed, 4 Oct 2023 16:11:23 +0000 (17:11 +0100)]
PR rtl-optimization/110701: Fix SUBREG SET_DEST handling in combine.

This patch is my proposed fix to PR rtl-optimization 110701, a latent bug
in combine's record_dead_and_set_regs_1 exposed by recent improvements to
simplify_subreg.

The issue involves the handling of (normal) SUBREG SET_DESTs as in the
instruction:

(set (subreg:HI (reg:SI x) 0) (expr:HI y))

The semantics of this are that the bits specified by the SUBREG are set
to the SET_SRC, y, and that the other bits of the SET_DEST are left/become
undefined.  To simplify explanation, we'll only consider lowpart SUBREGs
(though in theory non-lowpart SUBREGS could be handled), and the fact that
bits outside of the lowpart WORD retain their original values (treating
these as undefined is a missed optimization rather than incorrect code
bug, that only affects targets with less than 64-bit words).

The bug is that combine simulates the behaviour of the above instruction,
for calculating nonzero_bits and set_sign_bit_copies, in the function
record_value_for_reg, by using the equivalent of:

(set (reg:SI x) (subreg:SI (expr:HI y))

by calling gen_lowpart on the SET_SRC.  Alas, the semantics of this
revised instruction aren't always equivalent to the original.

In the test case for PR110701, the original instruction

(set (subreg:HI (reg:SI x), 0)
             (and:HI (subreg:HI (reg:SI y) 0)
     (const_int 340)))

which (by definition) leaves the top bits of x undefined, is mistakenly
considered to be equivalent to

(set (reg:SI x) (and:SI (reg:SI y) (const_int 340)))

where gen_lowpart's freedom to do anything with paradoxical SUBREG bits,
has now cleared the high bits.  The same bug also triggers when the
SET_SRC is say (subreg:HI (reg:DI z)), where gen_lowpart transforms
this into (subreg:SI (reg:DI z)) which defines bits 16-31 to be the
same as bits 16-31 of z.

The fix is that after calling record_value_for_reg, we need to mark
the bits that should be undefined as undefined, in case gen_lowpart,
which performs transforms appropriate for r-values, has changed the
interpretation of the SUBREG when used as an l-value.

2023-10-04  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
PR rtl-optimization/110701
* combine.cc (record_dead_and_set_regs_1): Split comment into
pieces placed before the relevant clauses.  When the SET_DEST
is a partial_subreg_p, mark the bits outside of the updated
portion of the destination as undefined.

gcc/testsuite/ChangeLog
PR rtl-optimization/110701
* gcc.target/i386/pr110701.c: New test case.

9 months agolibstdc++: _versioned_namespace is always non-None
Tom Tromey [Tue, 3 Oct 2023 17:14:45 +0000 (11:14 -0600)]
libstdc++: _versioned_namespace is always non-None

Some code in the pretty-printers seems to assume that the
_versioned_namespace global might be None (or the empty string).
However, doesn't occur, as the variable is never reassigned.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py: Assume that
_versioned_namespace is non-None.
* python/libstdcxx/v6/xmethods.py (is_specialization_of):
Assume that _versioned_namespace is non-None.

9 months agolibstdc++: Define _versioned_namespace in xmethods.py
Tom Tromey [Tue, 3 Oct 2023 17:08:02 +0000 (11:08 -0600)]
libstdc++: Define _versioned_namespace in xmethods.py

flake8 pointed out that is_specialization_of in xmethods.py looks at a
global that wasn't added to the file.  This patch correct the
oversight.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/xmethods.py (_versioned_namespace):
Define.

9 months agooptions: Prevent multidimensional arrays [PR111664]
Kito Cheng [Mon, 2 Oct 2023 02:50:42 +0000 (10:50 +0800)]
options: Prevent multidimensional arrays [PR111664]

Multidimensional arrary is gawk extension, and we accidentally
introduced that in recent commit[1].

[1] https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=e4a4b8e983bac865eb435b11798e38d633b98942

gcc/ChangeLog:

PR bootstrap/111664
* opt-read.awk: Drop multidimensional arrays.
* opth-gen.awk: Ditto.

9 months agolibgomp.texi: Clarify that no other OpenMP context selectors are implemented
Tobias Burnus [Wed, 4 Oct 2023 12:52:34 +0000 (14:52 +0200)]
libgomp.texi: Clarify that no other OpenMP context selectors are implemented

libgomp/ChangeLog:

* libgomp.texi (OpenMP Context Selectors): Clarify 'kind' trait
and that other target archs have no 'arch'/'isa' traits implemented.

9 months agoLoongArch: Replace UNSPEC_FCOPYSIGN with copysign RTL
Xi Ruoyao [Mon, 2 Oct 2023 10:51:00 +0000 (18:51 +0800)]
LoongArch: Replace UNSPEC_FCOPYSIGN with copysign RTL

When I added copysign support for LoongArch (r13-3702), we did not have
a copysign RTL insn, so I had to use UNSPEC to represent the copysign
instruction. Now the copysign RTX code has been added in r14-1586, so
this patch removes those UNSPECs, and it uses the native RTL copysign
insn.

Inspired by rs6000 patch "Cleanup: Replace UNSPEC_COPYSIGN with copysign
RTL" [1] from Michael Meissner.

[1]: https://gcc.gnu.org/pipermail/gcc-patches/2023-September/631701.html

gcc/ChangeLog:

* config/loongarch/loongarch.md (UNSPEC_FCOPYSIGN): Delete.
(copysign<mode>3): Use copysign RTL instead of UNSPEC.

9 months agomatch.pd: Avoid other build_nonstandard_integer_type calls [PR111369]
Jakub Jelinek [Wed, 4 Oct 2023 07:30:15 +0000 (09:30 +0200)]
match.pd: Avoid other build_nonstandard_integer_type calls [PR111369]

In the light of the PR111668 patch which shows that
build_nonstandard_integer_type is needed (at least for some signed prec > 1
BOOLEAN_TYPEs if we use e.g. negation), I've reworked this patch and handled
the last problematic build_nonstandard_integer_type call in there as well.

In the x == cstN ? cst4 : cst3 optimization it uses
build_nonstandard_integer_type solely for BOOLEAN_TYPEs (I really don't see
why ENUMERAL_TYPEs would be a problem, we treat them in GIMPLE as uselessly
convertible to same precision/sign INTEGER_TYPEs), for INTEGER_TYPEs it is
really a no-op (might return a different type, but always INTEGER_TYPE
with same TYPE_PRECISION same TYPE_UNSIGNED) and for BITINT_TYPE with larger
precisions really harmful (we shouldn't create large precision
INTEGER_TYPEs).

The a?~t:t optimization just omits the negation of a in type for 1-bit
precision types or any BOOLEAN_TYPEs.  I think that is correct, because
for both signed and unsigned 1-bit precision type, cast to type of a bool
value yields already 0, -1 or 0, 1 values and for 1-bit precision negation
of that is still 0, -1 or 0, 1 (except for invoking sometimes UB).
And for signed larger precision BOOLEAN_TYPEs I think it is correct as well,
cast of [0, 1] to type yields 0, -1 and those can be xored with 0 or -1
to yield the proper result, any other values would be UB.

This fixes PR111369, where one of the bitint*.c tests FAILs with
GCC_TEST_RUN_EXPENSIVE=1.

2023-10-04  Jakub Jelinek  <jakub@redhat.com>

PR middle-end/111369
* match.pd (x == cstN ? cst4 : cst3): Use
build_nonstandard_integer_type only if type1 is BOOLEAN_TYPE.
Fix comment typo.  Formatting fix.
(a?~t:t -> (-(a))^t): Always convert to type rather
than using build_nonstandard_integer_type.  Perform negation
only if type has precision > 1 and is not signed BOOLEAN_TYPE.

9 months agomatch.pd: Fix up a ? cst1 : cst2 regression on signed bool [PR111668]
Jakub Jelinek [Wed, 4 Oct 2023 07:27:40 +0000 (09:27 +0200)]
match.pd: Fix up a ? cst1 : cst2 regression on signed bool [PR111668]

My relatively recent changes to these simplifiers to avoid
doing build_nonstandard_integer_type (primarily for BITINT_TYPE)
broke PR111668, a recurrence of the PR110487 bug.
I thought the build_nonstandard_integer_type isn't ever needed there,
but there is one special case where it is.
For the a ? -1 : 0 and a ? 0 : -1 simplifications there are actually
3 different cases.  One is for signed 1-bit precision types (signed
kind of implied from integer_all_onesp, because otherwise it would
match integer_onep earlier), where the simplifier wierdly was matching
them using the a ? powerof2cst : 0 -> a << (log2(powerof2cst))
simplification and then another simplifier optimizing away the left shift
when log2(powerof2cst) was 0.  Another one is signed BOOLEAN_TYPE with
precision > 1, where indeed we shouldn't be doing the negation in type,
because it isn't well defined in that type, the type only has 2 valid
values, 0 and -1.  As an alternative, we could also e.g. cast to
signed 1-bit precision BOOLEAN_TYPE and then extend to type.
And the last case is what we were doing for types which have both 1 and -1
(all all ones) as valid values (i.e. all signed/unsigned ENUMERAL_TYPEs,
INTEGRAL_TYPEs and BITINT_TYPEs with precision > 1).

The following patch avoids the hops through << 0 for 1-bit precision
and uses build_nonstandard_integer_type solely for the BOOLEAN_TYPE types
(where we have a guarantee the precision is reasonably small, nothing ought
to be created 129+ bit precision BOOLEAN_TYPEs).

2023-10-04  Jakub Jelinek  <jakub@redhat.com>

PR tree-optimization/111668
* match.pd (a ? CST1 : CST2): Handle the a ? -1 : 0 and
a ? 0 : -1 cases before the powerof2cst cases and differentiate
between 1-bit precision types, larger precision boolean types
and other integral types.  Fix comment pastos and formatting.

9 months agoFortran: Alloc comp of non-finalizable type not finalized [PR111674]
Paul Thomas [Wed, 4 Oct 2023 07:26:35 +0000 (08:26 +0100)]
Fortran: Alloc comp of non-finalizable type not finalized [PR111674]

2023-10-04  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/37336
PR fortran/111674
* trans-expr.cc (gfc_trans_scalar_assign): Finalize components
on deallocation if derived type is not finalizable.

gcc/testsuite/
PR fortran/37336
PR fortran/111674
* gfortran.dg/allocate_with_source_25.f90: Final count in tree
dump reverts from 4 to original 6.
* gfortran.dg/finalize_38.f90: Add test for fix of PR111674.

9 months agoDaily bump.
GCC Administrator [Wed, 4 Oct 2023 00:17:41 +0000 (00:17 +0000)]
Daily bump.

9 months agoc++: print source code in print_instantiation_partial_context_line
David Malcolm [Tue, 3 Oct 2023 23:46:33 +0000 (19:46 -0400)]
c++: print source code in print_instantiation_partial_context_line

As mentioned in my Cauldron talk, this patch adds a call to
diagnostic_show_locus to the "required from here" messages
in print_instantiation_partial_context_line, so that e.g., rather
than the rather mystifying:

In file included from ../x86_64-pc-linux-gnu/libstdc++-v3/include/memory:78,
                 from ../../src/demo-1.C:1:
../x86_64-pc-linux-gnu/libstdc++-v3/include/bits/unique_ptr.h: In instantiation of ‘std::__detail::__unique_ptr_t<_Tp> std::make_unique(_Args&& ...) [with _Tp = bar; _Args = {}; __detail::__unique_ptr_t<_Tp> = __detail::__unique_ptr_t<bar>]’:
../../src/demo-1.C:15:32:   required from here
../x86_64-pc-linux-gnu/libstdc++-v3/include/bits/unique_ptr.h:1066:30: error: no matching function for call to ‘bar::bar()’
 1066 |     { return unique_ptr<_Tp>(new _Tp(std::forward<_Args>(__args)...)); }
      |                              ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../src/demo-1.C:10:3: note: candidate: ‘bar::bar(int)’
   10 |   bar (int);
      |   ^~~
../../src/demo-1.C:10:3: note:   candidate expects 1 argument, 0 provided
../../src/demo-1.C:7:7: note: candidate: ‘constexpr bar::bar(const bar&)’
    7 | class bar : public foo
      |       ^~~
../../src/demo-1.C:7:7: note:   candidate expects 1 argument, 0 provided
../../src/demo-1.C:7:7: note: candidate: ‘constexpr bar::bar(bar&&)’
../../src/demo-1.C:7:7: note:   candidate expects 1 argument, 0 provided

we emit:

In file included from ../x86_64-pc-linux-gnu/libstdc++-v3/include/memory:78,
                 from ../../src/demo-1.C:1:
../x86_64-pc-linux-gnu/libstdc++-v3/include/bits/unique_ptr.h: In instantiation of ‘std::__detail::__unique_ptr_t<_Tp> std::make_unique(_Args&& ...) [with _Tp = bar; _Args = {}; __detail::__unique_ptr_t<_Tp> = __detail::__unique_ptr_t<bar>]’:
../../src/demo-1.C:15:32:   required from here
   15 |   return std::make_unique<bar> ();
      |          ~~~~~~~~~~~~~~~~~~~~~~^~
../x86_64-pc-linux-gnu/libstdc++-v3/include/bits/unique_ptr.h:1066:30: error: no matching function for call to ‘bar::bar()’
 1066 |     { return unique_ptr<_Tp>(new _Tp(std::forward<_Args>(__args)...)); }
      |                              ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../src/demo-1.C:10:3: note: candidate: ‘bar::bar(int)’
   10 |   bar (int);
      |   ^~~
../../src/demo-1.C:10:3: note:   candidate expects 1 argument, 0 provided
../../src/demo-1.C:7:7: note: candidate: ‘constexpr bar::bar(const bar&)’
    7 | class bar : public foo
      |       ^~~
../../src/demo-1.C:7:7: note:   candidate expects 1 argument, 0 provided
../../src/demo-1.C:7:7: note: candidate: ‘constexpr bar::bar(bar&&)’
../../src/demo-1.C:7:7: note:   candidate expects 1 argument, 0 provided

which shows the code that's leading to the error (the bad call to
std::make_unique).

gcc/cp/ChangeLog:
* error.cc (print_instantiation_partial_context_line): Call
diagnostic_show_locus.

gcc/testsuite/ChangeLog:
* g++.dg/diagnostic/static_assert3.C: Add directives for
additional source printing.
* g++.dg/template/error60.C: New test.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
9 months agoRISC-V: Unescape chars in pr111566.f90 test
Patrick O'Neill [Tue, 3 Oct 2023 20:13:01 +0000 (13:13 -0700)]
RISC-V: Unescape chars in pr111566.f90 test

Some characters are escaped which causes the testcase to fail. This
patch restores the original characters.

Tested for regressions using multilib rv32gcv-ilp32d, rv64gcv-lp64d.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/fortran/pr111566.f90: Restore escaped
characters.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
9 months agoDon't use range_info_get_range for pointers.
Andrew MacLeod [Tue, 3 Oct 2023 16:32:10 +0000 (12:32 -0400)]
Don't use range_info_get_range for pointers.

Pointers only track null and nonnull, so we need to handle them
specially.

* tree-ssanames.cc (set_range_info): Use get_ptr_info for
pointers rather than range_info_get_range.

9 months agocontrib/mklog.py: Fix issues reported by flake8
Martin Jambor [Tue, 3 Oct 2023 17:09:33 +0000 (19:09 +0200)]
contrib/mklog.py: Fix issues reported by flake8

The testing infrastructure built by Martin Liška contains checking a
few python scripts in contrib witha tool flake8.  That tool recently
complains that:

  contrib/mklog.py:360:45: E711 comparison to None should be 'if cond is None:'
  contrib/mklog.py:362:1: E305 expected 2 blank lines after class or function definition, found 1

I'd like to silence these with the following, hopefully trivial,
changes.  However, I have only tested the changes by running flake8
again and running ./contrib/mklog.py --help.

Is this good for trunk?  (Or should I stop using flake8 instead?)

Thanks,

Martin

contrib/ChangeLog:

2023-10-03  Martin Jambor  <mjambor@suse.cz>

* mklog.py (skip_line_in_changelog): Compare to None using is instead
of ==, add an extra newline after the function.

9 months agoipa-modref: Fix dumping
Martin Jambor [Tue, 3 Oct 2023 16:44:52 +0000 (18:44 +0200)]
ipa-modref: Fix dumping

Function dump_lto_records ought to dump to its parameter OUT but was
dumping expressions to dump_file.  This is corrected by this patch and
while at at, I also made the modref_summary::dump member function
const so that it is callable from more contexts.

gcc/ChangeLog:

2023-09-21  Martin Jambor  <mjambor@suse.cz>

* ipa-modref.h (modref_summary::dump): Make const.
* ipa-modref.cc (modref_summary::dump): Likewise.
(dump_lto_records): Dump to out instead of dump_file.

9 months agoipa-sra: Allow IPA-SRA in presence of returns which will be removed
Martin Jambor [Tue, 3 Oct 2023 16:44:52 +0000 (18:44 +0200)]
ipa-sra: Allow IPA-SRA in presence of returns which will be removed

Testing on 32bit arm revealed that even the simplest case of PR 110378
was still not resolved there because destructors were rturning this
pointer.  Needless to say, the return value of those destructors often
is just not used, which IPA-SRA can already detect in time.  Since
such enhancement seems generally useful, here it is.

The patch simply adds two flag to respective summaries to mark down
situations when it encounters either a simple direct use of a defaut
definition SSA_NAME of a paramter, which means that the parameter may
still be split when rturn value is removed, and when any derived use
of it is returned, allowing for complete removal in that case, instead
of discarding it as a candidate for removal or splitting like we do
now.  The IPA phase then simply checks that we indeed plan to remove
the return value before allowing any transformation to be considered
in such cases.

gcc/ChangeLog:

2023-08-18  Martin Jambor  <mjambor@suse.cz>

PR ipa/110378
* ipa-param-manipulation.cc
(ipa_param_body_adjustments::mark_dead_statements): Verify that any
return uses of PARAM will be removed.
(ipa_param_body_adjustments::mark_clobbers_dead): Likewise.
* ipa-sra.cc (isra_param_desc): New fields
remove_only_when_retval_removed and split_only_when_retval_removed.
(struct gensum_param_desc): Likewise.  Fix comment long line.
(ipa_sra_function_summaries::duplicate): Copy the new flags.
(dump_gensum_param_descriptor): Dump the new flags.
(dump_isra_param_descriptor): Likewise.
(isra_track_scalar_value_uses): New parameter desc.  Set its flag
remove_only_when_retval_removed when encountering a simple return.
(isra_track_scalar_param_local_uses): Replace parameter call_uses_p
with desc.  Pass it to isra_track_scalar_value_uses and set its
call_uses.
(ptr_parm_has_nonarg_uses): Accept parameter descriptor as a
parameter.  If there is a direct return use, mark any..
(create_parameter_descriptors): Pass the whole parameter descriptor to
isra_track_scalar_param_local_uses and ptr_parm_has_nonarg_uses.
(process_scan_results): Copy the new flags.
(isra_write_node_summary): Stream the new flags.
(isra_read_node_info): Likewise.
(adjust_parameter_descriptions): Check that transformations
requring return removal only happen when return value is removed.
Restructure main loop.  Adjust dump message.

gcc/testsuite/ChangeLog:

2023-08-18  Martin Jambor  <mjambor@suse.cz>

PR ipa/110378
* gcc.dg/ipa/ipa-sra-32.c: New test.
* gcc.dg/ipa/pr110378-4.c: Likewise.
* gcc.dg/ipa/ipa-sra-4.c: Use a return value.

9 months agoipa: Self-DCE of uses of removed call LHSs (PR 108007)
Martin Jambor [Tue, 3 Oct 2023 16:44:51 +0000 (18:44 +0200)]
ipa: Self-DCE of uses of removed call LHSs (PR 108007)

PR 108007 is another manifestation where we rely on DCE to clean-up
after IPA-SRA and if the user explicitely switches DCE off, IPA-SRA
can leave behind statements which are fed uninitialized values and
trap, even though their results are themselves never used.

I have already fixed this for unused parameters in callees, this bug
shows that almost the same thing can happen for removed returns, on
the side of callers.  This means that the issue has to be fixed
elsewhere, in call redirection.  This patch adds a function which
looks for (and through, using a work-list) uses of operations fed
specific SSA names and removes them all.

That would have been easy if it wasn't for debug statements during
tree-inline (from which call redirection is also invoked).  Debug
statements are decoupled from the rest at this point and iterating
over uses of SSAs does not bring them up.  During tree-inline they are
handled especially at the end, I assume in order to make sure that
relative ordering of UIDs are the same with and without debug info.

This means that during tree-inline we need to make a hash of killed
SSAs, that we already have in copy_body_data, available to the
function making the purging.  So the patch duly does also that, making
the interface slightly ugly.

gcc/ChangeLog:

2023-09-27  Martin Jambor  <mjambor@suse.cz>

PR ipa/108007
* cgraph.h (cgraph_edge): Add a parameter to
redirect_call_stmt_to_callee.
* ipa-param-manipulation.h (ipa_param_adjustments): Add a
parameter to modify_call.
* cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
parameter killed_ssas, pass it to padjs->modify_call.
* ipa-param-manipulation.cc (purge_transitive_uses): New function.
(ipa_param_adjustments::modify_call): New parameter killed_ssas.
Instead of substituting uses, invoke purge_transitive_uses.  If
hash of killed SSAs has not been provided, create a temporary one
and release SSAs that have been added to it.
* tree-inline.cc (redirect_all_calls): Create
id->killed_new_ssa_names earlier, pass it to edge redirection,
adjust a comment.
(copy_body): Release SSAs in id->killed_new_ssa_names.

gcc/testsuite/ChangeLog:

2023-05-11  Martin Jambor  <mjambor@suse.cz>

PR ipa/108007
* gcc.dg/ipa/pr108007.c: New test.

9 months agoRemove pass counting in VRP.
Andrew MacLeod [Thu, 28 Sep 2023 13:19:32 +0000 (09:19 -0400)]
Remove pass counting in VRP.

Rather than using a pass count to decide which parameters are passed to
VRP, makemit explicit.

* passes.def (pass_vrp): Pass "final pass" flag as parameter.
* tree-vrp.cc (vrp_pass_num): Remove.
(pass_vrp::my_pass): Remove.
(pass_vrp::pass_vrp): Add warn_p as a parameter.
(pass_vrp::final_p): New.
(pass_vrp::set_pass_param): Set final_p param.
(pass_vrp::execute): Call execute_range_vrp with no conditions.
(make_pass_vrp): Pass additional parameter.
(make_pass_early_vrp): Ditto.

9 months agoReturn TRUE only when a global value is updated.
Andrew MacLeod [Wed, 27 Sep 2023 16:34:16 +0000 (12:34 -0400)]
Return TRUE only when a global value is updated.

set_range_info should return TRUE only when it sets a new value.  VRP no
longer overwrites global ranges DOM has set.  Check for ranges in the
final listing.

gcc/
* tree-ssanames.cc (set_range_info): Return true only if the
current value changes.

gcc/testsuite/
* gcc.dg/pr93917.c: Check for ranges in final optimized listing.
* gcc.dg/tree-ssa/vrp-unreachable.c: Ditto.

9 months agodiagnostics: add ctors to text_info; add m_ prefixes to fields
David Malcolm [Tue, 3 Oct 2023 13:39:16 +0000 (09:39 -0400)]
diagnostics: add ctors to text_info; add m_ prefixes to fields

No functional change intended.

gcc/ada/ChangeLog:
* gcc-interface/misc.cc: Use text_info ctor.

gcc/analyzer/ChangeLog:
* analyzer-logging.cc (logger::log_va_partial): Use text_info
ctor.
* analyzer.cc (make_label_text): Likewise.
(make_label_text_n): Likewise.
* pending-diagnostic.cc (evdesc::event_desc::formatted_print):
Likewise.

gcc/c/ChangeLog:
* c-objc-common.cc (c_tree_printer): Update for "m_" prefixes to
text_info fields.

gcc/cp/ChangeLog:
* error.cc: Update for "m_" prefixes to text_info fields.

gcc/d/ChangeLog:
* d-diagnostic.cc (d_diagnostic_report_diagnostic): Use text_info
ctor.

gcc/ChangeLog:
* diagnostic.cc (diagnostic_set_info_translated): Update for "m_"
prefixes to text_info fields.
(diagnostic_report_diagnostic): Likewise.
(verbatim): Use text_info ctor.
(simple_diagnostic_path::add_event): Likewise.
(simple_diagnostic_path::add_thread_event): Likewise.
* dumpfile.cc (dump_pretty_printer::decode_format): Update for
"m_" prefixes to text_info fields.
(dump_context::dump_printf_va): Use text_info ctor.
* graphviz.cc (graphviz_out::graphviz_out): Use text_info ctor.
(graphviz_out::print): Likewise.
* opt-problem.cc (opt_problem::opt_problem): Likewise.
* pretty-print.cc (pp_format): Update for "m_" prefixes to
text_info fields.
(pp_printf): Use text_info ctor.
(pp_verbatim): Likewise.
(assert_pp_format_va): Likewise.
* pretty-print.h (struct text_info): Add ctors.  Add "m_" prefix
to all fields.
* text-art/styled-string.cc (styled_string::from_fmt_va): Use
text_info ctor.
* tree-diagnostic.cc (default_tree_printer): Update for "m_"
prefixes to text_info fields.
* tree-pretty-print.h (pp_ti_abstract_origin): Likewise.

gcc/fortran/ChangeLog:
* error.cc (gfc_format_decoder): Update for "m_" prefixes to
text_info fields.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
9 months agoARC: Use rlc r0,0 to implement scc_ltu (i.e. carry_flag ? 1 : 0)
Roger Sayle [Tue, 3 Oct 2023 11:52:04 +0000 (12:52 +0100)]
ARC: Use rlc r0,0 to implement scc_ltu (i.e. carry_flag ? 1 : 0)

This patch teaches the ARC backend that the contents of the carry flag
can be placed in an integer register conveniently using the "rlc rX,0"
instruction, which is a rotate-left-through-carry using zero as a source.
This is a convenient special case for the LTU form of the scc pattern.

unsigned int foo(unsigned int x, unsigned int y)
{
  return (x+y) < x;
}

With -O2 -mcpu=em this is currently compiled to:

foo:    add.f 0,r0,r1
        mov_s   r0,1    ;3
        j_s.d   [blink]
        mov.hs r0,0

[which after an addition to set the carry flag, sets r0 to 1,
followed by a conditional assignment of r0 to zero if the
carry flag is clear].  With the new define_insn/optimization
in this patch, this becomes:

foo:    add.f 0,r0,r1
        j_s.d   [blink]
        rlc     r0,0

This define_insn is also a useful building block for implementing
shifts and rotates.

2023-10-03  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
* config/arc/arc.md (CC_ltu): New mode iterator for CC and CC_C.
(scc_ltu_<mode>): New define_insn to handle LTU form of scc_insn.
(*scc_insn): Don't split to a conditional move sequence for LTU.

gcc/testsuite/ChangeLog
* gcc.target/arc/scc-ltu.c: New test case.

9 months agoaarch64: Convert aarch64 multi choice patterns to new syntax
Andrea Corallo [Tue, 19 Sep 2023 13:12:08 +0000 (15:12 +0200)]
aarch64: Convert aarch64 multi choice patterns to new syntax

Hi all,
this patch converts a number of multi multi choice patterns within the
aarch64 backend to the new syntax.

The list of the converted patterns is in the Changelog.

For completeness here follows the list of multi choice patterns that
were rejected for conversion by my parser, they typically have some C
as asm output and require some manual intervention:
aarch64_simd_vec_set<mode>, aarch64_get_lane<mode>,
aarch64_cm<optab>di, aarch64_cm<optab>di, aarch64_cmtstdi,
*aarch64_movv8di, *aarch64_be_mov<mode>, *aarch64_be_movci,
*aarch64_be_mov<mode>, *aarch64_be_movxi, *aarch64_sve_mov<mode>_le,
*aarch64_sve_mov<mode>_be, @aarch64_pred_mov<mode>,
@aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx4SI_ONLY:mode>,
@aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx2DI_ONLY:mode>,
*aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx2DI_ONLY:mode>_sxtw,
*aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx2DI_ONLY:mode>_uxtw,
@aarch64_vec_duplicate_vq<mode>_le, *vec_extract<mode><Vel>_0,
*vec_extract<mode><Vel>_v128, *cmp<cmp_op><mode>_and,
*fcm<cmp_op><mode>_and_combine, @aarch64_sve_ext<mode>,
@aarch64_sve2_<su>aba<mode>, *sibcall_insn, *sibcall_value_insn,
*xor_one_cmpl<mode>3, *insv_reg<mode>_<SUBDI_BITS>,
*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>,
*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>, *aarch64_bfxil<mode>,
*aarch64_bfxilsi_uxtw,
*aarch64_<su_optab>cvtf<fcvt_target><GPF:mode>2_mult,
atomic_store<mode>.

Bootstraped and reg tested on aarch64-unknown-linux-gnu, also I
analysed tmp-mddump.md (from 'make mddump') and could not find
effective differences, okay for trunk?

Bests

  Andrea

gcc/ChangeLog:

* config/aarch64/aarch64.md (@ccmp<CC_ONLY:mode><GPI:mode>)
(@ccmp<CC_ONLY:mode><GPI:mode>_rev, *call_insn, *call_value_insn)
(*mov<mode>_aarch64, load_pair_sw_<SX:mode><SX2:mode>)
(load_pair_dw_<DX:mode><DX2:mode>)
(store_pair_sw_<SX:mode><SX2:mode>)
(store_pair_dw_<DX:mode><DX2:mode>, *extendsidi2_aarch64)
(*zero_extendsidi2_aarch64, *load_pair_zero_extendsidi2_aarch64)
(*extend<SHORT:mode><GPI:mode>2_aarch64)
(*zero_extend<SHORT:mode><GPI:mode>2_aarch64)
(*extendqihi2_aarch64, *zero_extendqihi2_aarch64)
(*add<mode>3_aarch64, *addsi3_aarch64_uxtw, *add<mode>3_poly_1)
(add<mode>3_compare0, *addsi3_compare0_uxtw)
(*add<mode>3_compareC_cconly, add<mode>3_compareC)
(*add<mode>3_compareV_cconly_imm, add<mode>3_compareV_imm)
(*add<mode>3nr_compare0, subdi3, subv<GPI:mode>_imm)
(*cmpv<GPI:mode>_insn, sub<mode>3_compare1_imm, neg<mode>2)
(cmp<mode>, fcmp<mode>, fcmpe<mode>, *cmov<mode>_insn)
(*cmovsi_insn_uxtw, <optab><mode>3, *<optab>si3_uxtw)
(*and<mode>3_compare0, *andsi3_compare0_uxtw, one_cmpl<mode>2)
(*<NLOGICAL:optab>_one_cmpl<mode>3, *and<mode>3nr_compare0)
(*aarch64_ashl_sisd_or_int_<mode>3)
(*aarch64_lshr_sisd_or_int_<mode>3)
(*aarch64_ashr_sisd_or_int_<mode>3, *ror<mode>3_insn)
(*<optab>si3_insn_uxtw, <optab>_trunc<fcvt_target><GPI:mode>2)
(<optab><fcvt_target><GPF:mode>2)
(<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3)
(<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>3)
(*aarch64_<optab><mode>3_cssc, copysign<GPF:mode>3_insn): Update
to new syntax.

* config/aarch64/aarch64-sve2.md (@aarch64_scatter_stnt<mode>)
(@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
(*aarch64_mul_unpredicated_<mode>)
(@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>_2)
(*cond_<sve_int_op><mode>_3, *cond_<sve_int_op><mode>_any)
(*cond_<sve_int_op><mode>_z, @aarch64_pred_<sve_int_op><mode>)
(*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_3)
(*cond_<sve_int_op><mode>_any, @aarch64_sve_<sve_int_op><mode>)
(@aarch64_sve_<sve_int_op>_lane_<mode>)
(@aarch64_sve_add_mul_lane_<mode>)
(@aarch64_sve_sub_mul_lane_<mode>, @aarch64_sve2_xar<mode>)
(*aarch64_sve2_bcax<mode>, @aarch64_sve2_eor3<mode>)
(*aarch64_sve2_nor<mode>, *aarch64_sve2_nand<mode>)
(*aarch64_sve2_bsl<mode>, *aarch64_sve2_nbsl<mode>)
(*aarch64_sve2_bsl1n<mode>, *aarch64_sve2_bsl2n<mode>)
(*aarch64_sve2_sra<mode>, @aarch64_sve_add_<sve_int_op><mode>)
(*aarch64_sve2_<su>aba<mode>, @aarch64_sve_add_<sve_int_op><mode>)
(@aarch64_sve_add_<sve_int_op>_lane_<mode>)
(@aarch64_sve_qadd_<sve_int_op><mode>)
(@aarch64_sve_qadd_<sve_int_op>_lane_<mode>)
(@aarch64_sve_sub_<sve_int_op><mode>)
(@aarch64_sve_sub_<sve_int_op>_lane_<mode>)
(@aarch64_sve_qsub_<sve_int_op><mode>)
(@aarch64_sve_qsub_<sve_int_op>_lane_<mode>)
(@aarch64_sve_<sve_fp_op><mode>, @aarch64_<sve_fp_op>_lane_<mode>)
(@aarch64_pred_<sve_int_op><mode>)
(@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_int_op><mode>_2)
(*cond_<sve_int_op><mode>_z, @aarch64_sve_<optab><mode>)
(@aarch64_<optab>_lane_<mode>, @aarch64_sve_<optab><mode>)
(@aarch64_<optab>_lane_<mode>, @aarch64_pred_<sve_fp_op><mode>)
(*cond_<sve_fp_op><mode>_any_relaxed)
(*cond_<sve_fp_op><mode>_any_strict)
(@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>)
(@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_fp_op><mode>)
(*cond_<sve_fp_op><mode>_strict): Update to new syntax.

* config/aarch64/aarch64-sve.md (*aarch64_sve_mov<mode>_ldr_str)
(*aarch64_sve_mov<mode>_no_ldr_str, @aarch64_pred_mov<mode>)
(*aarch64_sve_mov<mode>, aarch64_wrffr)
(mask_scatter_store<mode><v_int_container>)
(*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked)
(*mask_scatter_store<mode><v_int_container>_sxtw)
(*mask_scatter_store<mode><v_int_container>_uxtw)
(@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
(@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
(*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
(*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw)
(*vec_duplicate<mode>_reg, vec_shl_insert_<mode>)
(vec_series<mode>, @extract_<last_op>_<mode>)
(@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
(*cond_<optab><mode>_any, @aarch64_pred_<optab><mode>)
(@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>)
(@cond_<optab><mode>)
(*<optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2)
(@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
(@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
(*cond_uxt<mode>_2, *cond_uxt<mode>_any, *cnot<mode>)
(*cond_cnot<mode>_2, *cond_cnot<mode>_any)
(@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
(*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
(*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
(*cond_<optab><mode>_2, *cond_<optab><mode>_3)
(*cond_<optab><mode>_any, add<mode>3, sub<mode>3)
(@aarch64_pred_<su>abd<mode>, *aarch64_cond_<su>abd<mode>_2)
(*aarch64_cond_<su>abd<mode>_3, *aarch64_cond_<su>abd<mode>_any)
(@aarch64_sve_<optab><mode>, @aarch64_pred_<optab><mode>)
(*cond_<optab><mode>_2, *cond_<optab><mode>_z)
(@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
(*cond_<optab><mode>_3, *cond_<optab><mode>_any, <optab><mode>3)
(*cond_bic<mode>_2, *cond_bic<mode>_any)
(@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_const)
(*cond_<optab><mode>_any_const, *cond_<sve_int_op><mode>_m)
(*cond_<sve_int_op><mode>_z, *sdiv_pow2<mode>3)
(*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_any)
(@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
(*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
(*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
(*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
(*cond_<optab><mode>_2_const_relaxed)
(*cond_<optab><mode>_2_const_strict)
(*cond_<optab><mode>_3_relaxed, *cond_<optab><mode>_3_strict)
(*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
(*cond_<optab><mode>_any_const_relaxed)
(*cond_<optab><mode>_any_const_strict)
(@aarch64_pred_<optab><mode>, *cond_add<mode>_2_const_relaxed)
(*cond_add<mode>_2_const_strict)
(*cond_add<mode>_any_const_relaxed)
(*cond_add<mode>_any_const_strict, @aarch64_pred_<optab><mode>)
(*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
(*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
(@aarch64_pred_<optab><mode>, *cond_sub<mode>_3_const_relaxed)
(*cond_sub<mode>_3_const_strict, *cond_sub<mode>_const_relaxed)
(*cond_sub<mode>_const_strict, *aarch64_pred_abd<mode>_relaxed)
(*aarch64_pred_abd<mode>_strict)
(*aarch64_cond_abd<mode>_2_relaxed)
(*aarch64_cond_abd<mode>_2_strict)
(*aarch64_cond_abd<mode>_3_relaxed)
(*aarch64_cond_abd<mode>_3_strict)
(*aarch64_cond_abd<mode>_any_relaxed)
(*aarch64_cond_abd<mode>_any_strict, @aarch64_pred_<optab><mode>)
(@aarch64_pred_fma<mode>, *cond_fma<mode>_2, *cond_fma<mode>_4)
(*cond_fma<mode>_any, @aarch64_pred_fnma<mode>)
(*cond_fnma<mode>_2, *cond_fnma<mode>_4, *cond_fnma<mode>_any)
(<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
(@<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
(@aarch64_sve_add_<optab><vsi2qi>, @aarch64_pred_<optab><mode>)
(*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
(*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
(*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
(@aarch64_<optab>_lane_<mode>, @aarch64_pred_<optab><mode>)
(*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
(*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
(@aarch64_<optab>_lane_<mode>, @aarch64_sve_tmad<mode>)
(@aarch64_sve_<sve_fp_op>vnx4sf)
(@aarch64_sve_<sve_fp_op>_lanevnx4sf)
(@aarch64_sve_<sve_fp_op><mode>, *vcond_mask_<mode><vpred>)
(@aarch64_sel_dup<mode>, @aarch64_pred_cmp<cmp_op><mode>)
(*cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest)
(@aarch64_pred_fcm<cmp_op><mode>, @fold_extract_<last_op>_<mode>)
(@aarch64_fold_extract_vector_<last_op>_<mode>)
(@aarch64_sve_splice<mode>)
(@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>)
(@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
(*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed)
(*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict)
(*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
(@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>)
(@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
(*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_relaxed)
(*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_strict)
(*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
(@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
(*cond_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
(@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
(*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
(@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
(*cond_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
(@aarch64_brk<brk_op>, *aarch64_sve_<inc_dec><mode>_cntp): Update
to new syntax.

* config/aarch64/aarch64-simd.md (aarch64_simd_dup<mode>)
(load_pair<DREG:mode><DREG2:mode>)
(vec_store_pair<DREG:mode><DREG2:mode>, aarch64_simd_stp<mode>)
(aarch64_simd_mov_from_<mode>low)
(aarch64_simd_mov_from_<mode>high, and<mode>3<vczle><vczbe>)
(ior<mode>3<vczle><vczbe>, aarch64_simd_ashr<mode><vczle><vczbe>)
(aarch64_simd_bsl<mode>_internal<vczle><vczbe>)
(*aarch64_simd_bsl<mode>_alt<vczle><vczbe>)
(aarch64_simd_bsldi_internal, aarch64_simd_bsldi_alt)
(store_pair_lanes<mode>, *aarch64_combine_internal<mode>)
(*aarch64_combine_internal_be<mode>, *aarch64_combinez<mode>)
(*aarch64_combinez_be<mode>)
(aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_cm<optab>di)
(aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_mov<mode>)
(*aarch64_be_mov<mode>, *aarch64_be_movoi): Update to new syntax.

9 months agorecog: Support space in "[ cons"
Andrea Corallo [Fri, 15 Sep 2023 08:23:02 +0000 (10:23 +0200)]
recog: Support space in "[ cons"

Hi all,

this is to allow for spaces before "cons:" in the definitions of
patterns using the new compact syntax, ex:

(define_insn "aarch64_simd_dup<mode>"
  [(set (match_operand:VDQ_I 0 "register_operand")
        (vec_duplicate:VDQ_I
          (match_operand:<VEL> 1 "register_operand")))]
  "TARGET_SIMD"
  {@ [ cons: =0 , 1  ; attrs: type      ]
     [ w        , w  ; neon_dup<q>      ] dup\t%0.<Vtype>, %1.<Vetype>[0]
     [ w        , ?r ; neon_from_gp<q>  ] dup\t%0.<Vtype>, %<vwcore>1
  }
)

gcc/Changelog

2023-09-20  Andrea Corallo  <andrea.corallo@arm.com>

* gensupport.cc (convert_syntax): Skip spaces before "cons:"
in new compact pattern syntax.

9 months agorecog: Improve parser for pattern new compact syntax
Richard Sandiford [Wed, 13 Sep 2023 13:50:30 +0000 (14:50 +0100)]
recog: Improve parser for pattern new compact syntax

Hi all,

this is to add support to the new compact pattern syntax for the case
where the constraints do appear unsorted like:

(define_insn "*<optab>si3_insn_uxtw"
  [(set (match_operand:DI 0 "register_operand")
        (zero_extend:DI (SHIFT_no_rotate:SI
         (match_operand:SI 1 "register_operand")
         (match_operand:QI 2 "aarch64_reg_or_shift_imm_si"))))]
  ""
  {@ [cons: =0, 2,   1]
     [      r,  Uss, r] <shift>\\t%w0, %w1, %2
     [      r,  r,   r] <shift>\\t%w0, %w1, %w2
  }
  [(set_attr "type" "bfx,shift_reg")]
)

Best Regards

  Andrea

gcc/Changelog

2023-09-20  Richard Sandiford  <richard.sandiford@arm.com>

* gensupport.cc (convert_syntax): Updated to support unordered
constraints in compact syntax.

9 months agoDaily bump.
GCC Administrator [Tue, 3 Oct 2023 00:17:22 +0000 (00:17 +0000)]
Daily bump.

9 months agoAdd hppa*-*-* to dg-error targets at line 5
John David Anglin [Mon, 2 Oct 2023 20:36:02 +0000 (20:36 +0000)]
Add hppa*-*-* to dg-error targets at line 5

2023-10-02  John David Anglin  <danglin@gcc.gnu.org>

gcc/testsuite/ChangeLog:

* gfortran.dg/pr95690.f90: Add hppa*-*-* to dg-error targets at line 5.

9 months agoRequire target lra in gcc.dg/pr108095.c
John David Anglin [Mon, 2 Oct 2023 20:27:23 +0000 (20:27 +0000)]
Require target lra in gcc.dg/pr108095.c

2023-10-02  John David Anglin  <danglin@gcc.gnu.org>

gcc/testsuite/ChangeLog:

* gcc.dg/pr108095.c: Require target lra.

9 months agoIncrease timeout factor for hppa*-*-* in gcc.dg/long_branch.c
John David Anglin [Mon, 2 Oct 2023 20:23:06 +0000 (20:23 +0000)]
Increase timeout factor for hppa*-*-* in gcc.dg/long_branch.c

2023-10-02  John David Anglin  <danglin@gcc.gnu.org>

gcc/testsuite/ChangeLog:

* gcc.dg/long_branch.c: Increase timeout factor for hppa*-*-*.

9 months agocontrib: Update Darwin entries in config-list.mk
Iain Sandoe [Wed, 27 Sep 2023 14:10:52 +0000 (15:10 +0100)]
contrib: Update Darwin entries in config-list.mk

This list was out of date, and included cases that are not well-supported
for cross-compilers.

This updates the list to bracket the range of OS versions we support and
to drop one earlier case where GCC will no longer build with native tools.

contrib/ChangeLog:

* config-list.mk: Add newer Darwin versions, trim one older.
Remove cases with no OS version, which is not supported for cross-
compilers.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
9 months agoReplace UNSPEC_COPYSIGN with copysign RTL
Michael Meissner [Mon, 2 Oct 2023 17:17:15 +0000 (13:17 -0400)]
Replace UNSPEC_COPYSIGN with copysign RTL

When I first implemented COPYSIGN support in the power7 days, we did not have a
copysign RTL insn, so I had to use UNSPEC to represent the copysign
instruction.  This patch removes those UNSPECs, and it uses the native RTL
copysign insn.

2023-10-02  Michael Meissner  <meissner@linux.ibm.com>

gcc/

* config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete.
(copysign<mode>3_fcpsg): Use copysign RTL instead of UNSPEC.
(copysign<mode>3_hard): Likewise.
(copysign<mode>3_soft): Likewise.
* config/rs6000/vector.md (vector_copysign<mode>3): Use copysign RTL
instead of UNSPEC.
* config/rs6000/vsx.md (vsx_copysign<mode>3): Use copysign RTL instead
of UNSPEC.

9 months agodiagnostics: add diagnostic_output_format class
David Malcolm [Mon, 2 Oct 2023 16:16:55 +0000 (12:16 -0400)]
diagnostics: add diagnostic_output_format class

Eliminate various global variables in the json/sarif output code by
bundling together callbacks and state into a new diagnostic_output_format
class, with per-output-format subclasses.

No functional change intended.

gcc/ChangeLog:
* diagnostic-format-json.cc (toplevel_array): Remove global in
favor of json_output_format::m_top_level_array.
(cur_group): Likewise, for json_output_format::m_cur_group.
(cur_children_array): Likewise, for
json_output_format::m_cur_children_array.
(class json_output_format): New.
(json_begin_diagnostic): Remove, in favor of
json_output_format::on_begin_diagnostic.
(json_end_diagnostic): Convert to...
(json_output_format::on_end_diagnostic): ...this.
(json_begin_group): Remove, in favor of
json_output_format::on_begin_group.
(json_end_group): Remove, in favor of
json_output_format::on_end_group.
(json_flush_to_file): Remove, in favor of
json_output_format::flush_to_file.
(json_stderr_final_cb): Remove, in favor of json_output_format
dtor.
(json_output_base_file_name): Remove global.
(class json_stderr_output_format): New.
(json_file_final_cb): Remove.
(class json_file_output_format): New.
(json_emit_diagram): Remove.
(diagnostic_output_format_init_json): Update.
(diagnostic_output_format_init_json_file): Update.
* diagnostic-format-sarif.cc (the_builder): Remove this global,
moving to a field of the sarif_output_format.
(sarif_builder::maybe_make_artifact_content_object): Use the
context's m_file_cache.
(get_source_lines): Convert to...
(sarif_builder::get_source_lines): ...this, using context's
m_file_cache.
(sarif_begin_diagnostic): Remove, in favor of
sarif_output_format::on_begin_diagnostic.
(sarif_end_diagnostic): Remove, in favor of
sarif_output_format::on_end_diagnostic.
(sarif_begin_group): Remove, in favor of
sarif_output_format::on_begin_group.
(sarif_end_group): Remove, in favor of
sarif_output_format::on_end_group.
(sarif_flush_to_file): Delete.
(sarif_stderr_final_cb): Delete.
(sarif_output_base_file_name): Delete.
(sarif_file_final_cb): Delete.
(class sarif_output_format): New.
(sarif_emit_diagram): Delete.
(class sarif_stream_output_format): New.
(class sarif_file_output_format): New.
(diagnostic_output_format_init_sarif): Update.
(diagnostic_output_format_init_sarif_stderr): Update.
(diagnostic_output_format_init_sarif_file): Update.
(diagnostic_output_format_init_sarif_stream): Update.
* diagnostic-show-locus.cc (diagnostic_show_locus): Update.
* diagnostic.cc (default_diagnostic_final_cb): Delete, moving to
diagnostic_text_output_format's dtor.
(diagnostic_initialize): Update, making a new instance of
diagnostic_text_output_format.
(diagnostic_finish): Delete m_output_format, rather than calling
final_cb.
(diagnostic_report_diagnostic): Assert that m_output_format is
non-NULL.  Replace call to begin_group_cb with call to
m_output_format->on_begin_group.  Replace call to
diagnostic_starter with call to
m_output_format->on_begin_diagnostic.  Replace call to
diagnostic_finalizer with call to
m_output_format->on_end_diagnostic.
(diagnostic_emit_diagram): Replace both optional call to
m_diagrams.m_emission_cb and default implementation with call to
m_output_format->on_diagram.  Move default implementation to
diagnostic_text_output_format::on_diagram.
(auto_diagnostic_group::~auto_diagnostic_group): Replace call to
end_group_cb with call to m_output_format->on_end_group.
(diagnostic_text_output_format::~diagnostic_text_output_format):
New, based on default_diagnostic_final_cb.
(diagnostic_text_output_format::on_begin_diagnostic): New, based
on code from diagnostic_report_diagnostic.
(diagnostic_text_output_format::on_end_diagnostic): Likewise.
(diagnostic_text_output_format::on_diagram): New, based on code
from diagnostic_emit_diagram.
* diagnostic.h (class diagnostic_output_format): New.
(class diagnostic_text_output_format): New.
(diagnostic_context::begin_diagnostic): Move to...
(diagnostic_context::m_text_callbacks::begin_diagnostic): ...here.
(diagnostic_context::start_span): Move to...
(diagnostic_context::m_text_callbacks::start_span): ...here.
(diagnostic_context::end_diagnostic): Move to...
(diagnostic_context::m_text_callbacks::end_diagnostic): ...here.
(diagnostic_context::begin_group_cb): Remove, in favor of
m_output_format->on_begin_group.
(diagnostic_context::end_group_cb): Remove, in favor of
m_output_format->on_end_group.
(diagnostic_context::final_cb): Remove, in favor of
m_output_format's dtor.
(diagnostic_context::m_output_format): New field.
(diagnostic_context::m_diagrams.m_emission_cb): Remove, in favor
of m_output_format->on_diagram.
(diagnostic_starter): Update.
(diagnostic_finalizer): Update.
(diagnostic_output_format_init_sarif_stream): New.
* input.cc (location_get_source_line): Move implementation apart from
call to diagnostic_file_cache_init to...
(file_cache::get_source_line): ...this new function...
(location_get_source_line): ...and reintroduce, rewritten in terms of
file_cache::get_source_line.
(get_source_file_content): Likewise, refactor into...
(file_cache::get_source_file_content): ...this new function.
* input.h (file_cache::get_source_line): New decl.
(file_cache::get_source_file_content): New decl.
* selftest-diagnostic.cc
(test_diagnostic_context::test_diagnostic_context): Update.
* tree-diagnostic-path.cc (event_range::print): Update for
change to diagnostic_context's start_span callback.

gcc/fortran/ChangeLog:
* error.cc (gfc_diagnostics_init): Update for change to start_span.

gcc/jit/ChangeLog:
* dummy-frontend.cc (jit_langhook_init): Update for change to
diagnostic_context callbacks.

gcc/testsuite/ChangeLog:
* gcc.dg/plugin/diagnostic_group_plugin.c
(test_begin_group_cb, test_end_group_cb): Replace with...
(class test_output_format): ...this new subclass.
(plugin_init): Update.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
9 months agodiagnostics: group together source printing fields of diagnostic_context
David Malcolm [Mon, 2 Oct 2023 16:16:55 +0000 (12:16 -0400)]
diagnostics: group together source printing fields of diagnostic_context

struct diagnostic_context has > 60 fields.

Try to tame some of the complexity by grouping together the 8
source-printing fields into a struct, the "m_source_printing" field.

No functional change intended.

gcc/ada/ChangeLog:
* gcc-interface/misc.cc (gnat_post_options): Update for renaming
of diagnostic_context's show_caret to m_source_printing.enabled.

gcc/analyzer/ChangeLog:
* program-point.cc: Update for grouping of source printing fields
within diagnostic_context.

gcc/c-family/ChangeLog:
* c-common.cc (maybe_add_include_fixit): Update for renaming of
diagnostic_context's show_caret to m_source_printing.enabled.
* c-opts.cc (c_common_init_options): Update for renaming of
diagnostic_context's colorize_source_p to
m_source_printing.colorize_source_p.

gcc/ChangeLog:
* diagnostic-show-locus.cc: Update for reorganization of
source-printing fields of diagnostic_context.
* diagnostic.cc (diagnostic_set_caret_max_width): Likewise.
(diagnostic_initialize): Likewise.
* diagnostic.h (diagnostic_context::show_caret): Move to...
(diagnostic_context::m_source_printing::enabled): ...here.
(diagnostic_context::caret_max_width): Move to...
(diagnostic_context::m_source_printing::max_width): ...here.
(diagnostic_context::caret_chars): Move to...
(diagnostic_context::m_source_printing::caret_chars): ...here.
(diagnostic_context::colorize_source_p): Move to...
(diagnostic_context::m_source_printing::colorize_source_p): ...here.
(diagnostic_context::show_labels_p): Move to...
(diagnostic_context::m_source_printing::show_labels_p): ...here.
(diagnostic_context::show_line_numbers_p): Move to...
(diagnostic_context::m_source_printing::show_line_numbers_p): ...here.
(diagnostic_context::min_margin_width): Move to...
(diagnostic_context::m_source_printing::min_margin_width): ...here.
(diagnostic_context::show_ruler_p): Move to...
(diagnostic_context::m_source_printing::show_ruler_p): ...here.
(diagnostic_same_line): Update for above changes.
* opts.cc (common_handle_option): Update for reorganization of
source-printing fields of diagnostic_context.
* selftest-diagnostic.cc
(test_diagnostic_context::test_diagnostic_context): Likewise.
* toplev.cc (general_init): Likewise.
* tree-diagnostic-path.cc (struct event_range): Likewise.

gcc/fortran/ChangeLog:
* error.cc (gfc_diagnostic_starter): Update for reorganization of
source-printing fields of diagnostic_context.
(gfc_diagnostics_init): Likewise.
(gfc_diagnostics_finish): Likewise.

gcc/testsuite/ChangeLog:
* gcc.dg/plugin/diagnostic_plugin_show_trees.c: Update for
reorganization of source-printing fields of diagnostic_context.
* gcc.dg/plugin/diagnostic_plugin_test_inlining.c: Likewise.
* gcc.dg/plugin/diagnostic_plugin_test_paths.c: Likewise.
* gcc.dg/plugin/diagnostic_plugin_test_show_locus.c: Likewise.
* gcc.dg/plugin/diagnostic_plugin_test_string_literals.c: Likewise.
* gcc.dg/plugin/diagnostic_plugin_test_tree_expression_range.c:
Likewise.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
9 months agodiagnostics: fix missing init of set_locations_cb
David Malcolm [Mon, 2 Oct 2023 16:16:54 +0000 (12:16 -0400)]
diagnostics: fix missing init of set_locations_cb

gcc/ChangeLog:
* diagnostic.cc (diagnostic_initialize): Initialize
set_locations_cb to nullptr.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
9 months agoArm: Block predication on atomics [PR111235]
Wilco Dijkstra [Fri, 29 Sep 2023 12:21:10 +0000 (13:21 +0100)]
Arm: Block predication on atomics [PR111235]

The v7 memory ordering model allows reordering of conditional atomic
instructions.  To avoid this, make all atomic patterns unconditional.
Expand atomic loads and stores for all architectures so the memory access
can be wrapped into an UNSPEC.

Reviewed-by: Ramana Radhakrishnan <ramana.gcc@googlemail.com>
gcc/ChangeLog:
PR target/111235
* config/arm/constraints.md: Remove Pf constraint.
* config/arm/sync.md (arm_atomic_load<mode>): Add new pattern.
(arm_atomic_load_acquire<mode>): Likewise.
(arm_atomic_store<mode>): Likewise.
(arm_atomic_store_release<mode>): Likewise.
(atomic_load<mode>): Switch patterns to define_expand.
(atomic_store<mode>): Likewise.
(arm_atomic_loaddi2_ldrd): Remove predication.
(arm_load_exclusive<mode>): Likewise.
(arm_load_acquire_exclusive<mode>): Likewise.
(arm_load_exclusivesi): Likewise.
(arm_load_acquire_exclusivesi): Likewise.
(arm_load_exclusivedi): Likewise.
(arm_load_acquire_exclusivedi): Likewise.
(arm_store_exclusive<mode>): Likewise.
(arm_store_release_exclusivedi): Likewise.
(arm_store_release_exclusive<mode>): Likewise.
* config/arm/unspecs.md: Add VUNSPEC_LDR and VUNSPEC_STR.

gcc/testsuite/ChangeLog:
PR target/111235
* gcc.dg/rtl/arm/stl-cond.c: Remove test.
* gcc.target/arm/atomic_loaddi_7.c: Fix dmb count.
* gcc.target/arm/atomic_loaddi_8.c: Likewise.
* gcc.target/arm/pr111235.c: Add new test.

9 months agoRevert "ifcvt: replace C++ sort with vec::qsort [PR109154]"
Tamar Christina [Mon, 2 Oct 2023 13:23:59 +0000 (14:23 +0100)]
Revert "ifcvt: replace C++ sort with vec::qsort [PR109154]"

This reverts commit 19610580d49f3d2d8d511fba55b39efa0764dfc2.

It broke bootstrap because of a recently added assert, and
fixing will take time.

9 months agoAArch64: Fix scalar xorsign lowering
Tamar Christina [Mon, 2 Oct 2023 10:51:10 +0000 (11:51 +0100)]
AArch64: Fix scalar xorsign lowering

In GCC-9 our scalar xorsign pattern broke and we didn't notice it because the
testcase was not strong enough.  With this commit

8d2d39587d941a40f25ea0144cceb677df115040 is the first bad commit
commit 8d2d39587d941a40f25ea0144cceb677df115040
Author: Segher Boessenkool <segher@kernel.crashing.org>
Date:   Mon Oct 22 22:23:39 2018 +0200

    combine: Do not combine moves from hard registers

combine started introducing useless moves on hard registers,  when one of the
arguments to our scalar xorsign is a hardreg we get an additional move inserted.

This leads to combine forming an AND with the immediate inside and using the
superflous move to do the r->w move, instead of what we wanted before which was
for the `and` to be a vector and and have reload pick the right alternative.

To fix this the patch just forces the use of the vector version directly and
so combine has no chance to mess it up.

gcc/ChangeLog:

* config/aarch64/aarch64-simd.md (xorsign<mode>3): Renamed to..
(@xorsign<mode>3): ...This.
* config/aarch64/aarch64.md (xorsign<mode>3): Renamed to...
(@xorsign<mode>3): ..This and emit vectors directly
* config/aarch64/iterators.md (VCONQ): Add SF and DF.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/xorsign.c:

9 months agortl: relax validate_subreg to allow paradoxical subregs that change mode
Tamar Christina [Mon, 2 Oct 2023 10:50:24 +0000 (11:50 +0100)]
rtl: relax validate_subreg to allow paradoxical subregs that change mode

This patch relaxes the subreg invariant that you can only change modes
or make it paradoxical in one conversion. i.e. it now allows subreg:V2DI (reg:DF ..))

This is well defined in the generic sense and allowing it would enable
you to write RTL without the extra moves which can be interfered with by
combine.

Patch has been pre-approved[1], but giving people chance to object

[1] https://gcc.gnu.org/pipermail/gcc-patches/2023-September/629119.html

gcc/ChangeLog:

* emit-rtl.cc (validate_subreg): Relax subreg rule.

9 months agoifcvt: replace C++ sort with vec::qsort [PR109154]
Tamar Christina [Mon, 2 Oct 2023 10:48:26 +0000 (11:48 +0100)]
ifcvt: replace C++ sort with vec::qsort [PR109154]

As requested later on, this replaces the C++ sort with vec::qsort.

gcc/ChangeLog:

PR tree-optimization/109154
* tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
(cmp_arg_entry): New.
(predicate_scalar_phi): Use it.

9 months agotestsuite, Darwin: Skip g++.dg/debug/dwarf2/pr85550.C
Iain Sandoe [Sun, 1 Oct 2023 19:38:44 +0000 (20:38 +0100)]
testsuite, Darwin: Skip g++.dg/debug/dwarf2/pr85550.C

There are two problems here; first that the emitted asm for
-fdebug-types-section is ELF-specfic leading to assembler errors for
Mach-O.  If we fix this, we get a secondary fail since the debug linker
does not recognise DW_FORM_ref_sig8.  Disable ths test until we get
DWARF-5 support in the external Darwin toolchain components.

gcc/testsuite/ChangeLog:

* g++.dg/debug/dwarf2/pr85550.C: Skip for Darwin.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
9 months agoFix profiledbootstrap poly_int fallout [PR111642]
Richard Sandiford [Mon, 2 Oct 2023 06:20:45 +0000 (07:20 +0100)]
Fix profiledbootstrap poly_int fallout [PR111642]

rtl-tests.cc and simplify-rtx.cc used partial specialisation
to try to restrict the NUM_POLY_INT_COEFFS>1 tests without
resorting to preprocessor tests.  That now triggers an error
in some configurations, since the NUM_POLY_INT_COEFFS>1 tests
used the global poly_int64, whose definition does not depend
on the template parameter.

This patch uses local types that do depend on the template parameter.

gcc/
PR bootstrap/111642
* rtl-tests.cc (const_poly_int_tests<N>::run): Use a local
poly_int64 typedef.
* simplify-rtx.cc (simplify_const_poly_int_tests<N>::run): Likewise.

9 months agocpymem for RISC-V with v extension
Joern Rennecke [Mon, 2 Oct 2023 02:16:09 +0000 (03:16 +0100)]
cpymem for RISC-V with v extension

gcc/
* config/riscv/riscv-protos.h (riscv_vector::expand_block_move):
Declare.
* config/riscv/riscv-v.cc (riscv_vector::expand_block_move):
New function.
* config/riscv/riscv.md (cpymemsi): Use riscv_vector::expand_block_move.
Change to ..
(cpymem<P:mode>) .. this.

gcc/testsuite/
* gcc.target/riscv/rvv/base/cpymem-1.c: New test.
* gcc.target/riscv/rvv/base/cpymem-2.c: Likewise.

Co-Authored-By: Juzhe-Zhong <juzhe.zhong@rivai.ai>
9 months agoDaily bump.
GCC Administrator [Mon, 2 Oct 2023 00:17:00 +0000 (00:17 +0000)]
Daily bump.

9 months agoFix typo in add_options_for_riscv_v, add_options_for_riscv_zfh, add_options_for_riscv_d .
Joern Rennecke [Sun, 1 Oct 2023 21:46:43 +0000 (22:46 +0100)]
Fix typo in add_options_for_riscv_v, add_options_for_riscv_zfh, add_options_for_riscv_d .

gcc/testsuite/
* lib/target-supports.exp (add_options_for_riscv_v):
Fix typo in first regexp.
(add_options_for_riscv_zfh): Likewise.
(add_options_for_riscv_d): Likewise.

9 months agortl-optimization/110939 Really fix narrow comparison of memory and constant
Stefan Schulze Frielinghaus [Sun, 1 Oct 2023 14:11:32 +0000 (16:11 +0200)]
rtl-optimization/110939 Really fix narrow comparison of memory and constant

In the former fix in commit 41ef5a34161356817807be3a2e51fbdbe575ae85 I
completely missed the fact that the normal form of a CONST_INT for a
mode with fewer bits than in HOST_WIDE_INT is a sign extended version of
the actual constant.  This even holds true for unsigned constants.

Fixed by masking out the upper bits for the incoming constant and sign
extending the resulting unsigned constant.

gcc/ChangeLog:

* combine.cc (simplify_compare_const): Properly handle unsigned
constants while narrowing comparison of memory and constants.

9 months agoRISC-V:Optimize the MASK opt generation
Feng Wang [Tue, 12 Sep 2023 09:18:05 +0000 (09:18 +0000)]
RISC-V:Optimize the MASK opt generation

The corresponding MASK and TARGET will be automatically generated.

Accoring to Kito's advice, using "MASK(name) Var(other_flag_name)"
to generate MASK and TARGET MACRO automatically.
This patch improve the MACRO generation of MASK_* and TARGET_*.
Due to the more and more riscv extensions are added, the default target_flag
is full.
Before this patch,if you want to add new MACRO,you should define the
MACRO in the riscv-opts.h manually.
After this patch, you just need two steps:
1.Define the new TargetVariable.
2.Define "MASK(name) Var(new_target_flag).

gcc/ChangeLog:

* config/riscv/riscv-opts.h (MASK_ZICSR): Delete.
(MASK_ZIFENCEI): Delete;
(MASK_ZIHINTNTL): Ditto.
(MASK_ZIHINTPAUSE): Ditto.
(TARGET_ZICSR): Ditto.
(TARGET_ZIFENCEI): Ditto.
(TARGET_ZIHINTNTL): Ditto.
(TARGET_ZIHINTPAUSE): Ditto.
(MASK_ZAWRS): Ditto.
(TARGET_ZAWRS): Ditto.
(MASK_ZBA): Ditto.
(MASK_ZBB): Ditto.
(MASK_ZBC): Ditto.
(MASK_ZBS): Ditto.
(TARGET_ZBA): Ditto.
(TARGET_ZBB): Ditto.
(TARGET_ZBC): Ditto.
(TARGET_ZBS): Ditto.
(MASK_ZFINX): Ditto.
(MASK_ZDINX): Ditto.
(MASK_ZHINX): Ditto.
(MASK_ZHINXMIN): Ditto.
(TARGET_ZFINX): Ditto.
(TARGET_ZDINX): Ditto.
(TARGET_ZHINX): Ditto.
(TARGET_ZHINXMIN): Ditto.
(MASK_ZBKB): Ditto.
(MASK_ZBKC): Ditto.
(MASK_ZBKX): Ditto.
(MASK_ZKNE): Ditto.
(MASK_ZKND): Ditto.
(MASK_ZKNH): Ditto.
(MASK_ZKR): Ditto.
(MASK_ZKSED): Ditto.
(MASK_ZKSH): Ditto.
(MASK_ZKT): Ditto.
(TARGET_ZBKB): Ditto.
(TARGET_ZBKC): Ditto.
(TARGET_ZBKX): Ditto.
(TARGET_ZKNE): Ditto.
(TARGET_ZKND): Ditto.
(TARGET_ZKNH): Ditto.
(TARGET_ZKR): Ditto.
(TARGET_ZKSED): Ditto.
(TARGET_ZKSH): Ditto.
(TARGET_ZKT): Ditto.
(MASK_ZTSO): Ditto.
(TARGET_ZTSO): Ditto.
(MASK_VECTOR_ELEN_32): Ditto.
(MASK_VECTOR_ELEN_64): Ditto.
(MASK_VECTOR_ELEN_FP_32): Ditto.
(MASK_VECTOR_ELEN_FP_64): Ditto.
(MASK_VECTOR_ELEN_FP_16): Ditto.
(TARGET_VECTOR_ELEN_32): Ditto.
(TARGET_VECTOR_ELEN_64): Ditto.
(TARGET_VECTOR_ELEN_FP_32): Ditto.
(TARGET_VECTOR_ELEN_FP_64): Ditto.
(TARGET_VECTOR_ELEN_FP_16): Ditto.
(MASK_ZVBB): Ditto.
(MASK_ZVBC): Ditto.
(TARGET_ZVBB): Ditto.
(TARGET_ZVBC): Ditto.
(MASK_ZVKG): Ditto.
(MASK_ZVKNED): Ditto.
(MASK_ZVKNHA): Ditto.
(MASK_ZVKNHB): Ditto.
(MASK_ZVKSED): Ditto.
(MASK_ZVKSH): Ditto.
(MASK_ZVKN): Ditto.
(MASK_ZVKNC): Ditto.
(MASK_ZVKNG): Ditto.
(MASK_ZVKS): Ditto.
(MASK_ZVKSC): Ditto.
(MASK_ZVKSG): Ditto.
(MASK_ZVKT): Ditto.
(TARGET_ZVKG): Ditto.
(TARGET_ZVKNED): Ditto.
(TARGET_ZVKNHA): Ditto.
(TARGET_ZVKNHB): Ditto.
(TARGET_ZVKSED): Ditto.
(TARGET_ZVKSH): Ditto.
(TARGET_ZVKN): Ditto.
(TARGET_ZVKNC): Ditto.
(TARGET_ZVKNG): Ditto.
(TARGET_ZVKS): Ditto.
(TARGET_ZVKSC): Ditto.
(TARGET_ZVKSG): Ditto.
(TARGET_ZVKT): Ditto.
(MASK_ZVL32B): Ditto.
(MASK_ZVL64B): Ditto.
(MASK_ZVL128B): Ditto.
(MASK_ZVL256B): Ditto.
(MASK_ZVL512B): Ditto.
(MASK_ZVL1024B): Ditto.
(MASK_ZVL2048B): Ditto.
(MASK_ZVL4096B): Ditto.
(MASK_ZVL8192B): Ditto.
(MASK_ZVL16384B): Ditto.
(MASK_ZVL32768B): Ditto.
(MASK_ZVL65536B): Ditto.
(TARGET_ZVL32B): Ditto.
(TARGET_ZVL64B): Ditto.
(TARGET_ZVL128B): Ditto.
(TARGET_ZVL256B): Ditto.
(TARGET_ZVL512B): Ditto.
(TARGET_ZVL1024B): Ditto.
(TARGET_ZVL2048B): Ditto.
(TARGET_ZVL4096B): Ditto.
(TARGET_ZVL8192B): Ditto.
(TARGET_ZVL16384B): Ditto.
(TARGET_ZVL32768B): Ditto.
(TARGET_ZVL65536B): Ditto.
(MASK_ZICBOZ): Ditto.
(MASK_ZICBOM): Ditto.
(MASK_ZICBOP): Ditto.
(TARGET_ZICBOZ): Ditto.
(TARGET_ZICBOM): Ditto.
(TARGET_ZICBOP): Ditto.
(MASK_ZICOND): Ditto.
(TARGET_ZICOND): Ditto.
(MASK_ZFA): Ditto.
(TARGET_ZFA): Ditto.
(MASK_ZFHMIN): Ditto.
(MASK_ZFH): Ditto.
(MASK_ZVFHMIN): Ditto.
(MASK_ZVFH): Ditto.
(TARGET_ZFHMIN): Ditto.
(TARGET_ZFH): Ditto.
(TARGET_ZVFHMIN): Ditto.
(TARGET_ZVFH): Ditto.
(MASK_ZMMUL): Ditto.
(TARGET_ZMMUL): Ditto.
(MASK_ZCA): Ditto.
(MASK_ZCB): Ditto.
(MASK_ZCE): Ditto.
(MASK_ZCF): Ditto.
(MASK_ZCD): Ditto.
(MASK_ZCMP): Ditto.
(MASK_ZCMT): Ditto.
(TARGET_ZCA): Ditto.
(TARGET_ZCB): Ditto.
(TARGET_ZCE): Ditto.
(TARGET_ZCF): Ditto.
(TARGET_ZCD): Ditto.
(TARGET_ZCMP): Ditto.
(TARGET_ZCMT): Ditto.
(MASK_SVINVAL): Ditto.
(MASK_SVNAPOT): Ditto.
(TARGET_SVINVAL): Ditto.
(TARGET_SVNAPOT): Ditto.
(MASK_XTHEADBA): Ditto.
(MASK_XTHEADBB): Ditto.
(MASK_XTHEADBS): Ditto.
(MASK_XTHEADCMO): Ditto.
(MASK_XTHEADCONDMOV): Ditto.
(MASK_XTHEADFMEMIDX): Ditto.
(MASK_XTHEADFMV): Ditto.
(MASK_XTHEADINT): Ditto.
(MASK_XTHEADMAC): Ditto.
(MASK_XTHEADMEMIDX): Ditto.
(MASK_XTHEADMEMPAIR): Ditto.
(MASK_XTHEADSYNC): Ditto.
(TARGET_XTHEADBA): Ditto.
(TARGET_XTHEADBB): Ditto.
(TARGET_XTHEADBS): Ditto.
(TARGET_XTHEADCMO): Ditto.
(TARGET_XTHEADCONDMOV): Ditto.
(TARGET_XTHEADFMEMIDX): Ditto.
(TARGET_XTHEADFMV): Ditto.
(TARGET_XTHEADINT): Ditto.
(TARGET_XTHEADMAC): Ditto.
(TARGET_XTHEADMEMIDX): Ditto.
(TARGET_XTHEADMEMPAIR): Ditto.
(TARGET_XTHEADSYNC): Ditto.
(MASK_XVENTANACONDOPS): Ditto.
(TARGET_XVENTANACONDOPS): Ditto.
* config/riscv/riscv.opt: Add new Mask defination.
* doc/options.texi: Add explanation for this new usage.
* opt-functions.awk: Add new function to find the index
of target variable from extra_target_vars.
* opt-read.awk: Add new function to store the Mask flags.
* opth-gen.awk: Add new function to output the defination of
Mask Macro and Target Macro.

9 months agoMake riscv_vector::legitimize_move adjust SRC in the caller.
Joern Rennecke [Sun, 1 Oct 2023 05:13:37 +0000 (06:13 +0100)]
Make riscv_vector::legitimize_move adjust SRC in the caller.

2023-09-29  Joern Rennecke  <joern.rennecke@embecosm.com>
    Juzhe-Zhong  <juzhe.zhong@rivai.ai>

PR target/111566

gcc/
* config/riscv/riscv-protos.h (riscv_vector::legitimize_move):
Change second parameter to rtx *.
* config/riscv/riscv-v.cc (risv_vector::legitimize_move): Likewise.
* config/riscv/vector.md: Changed callers of
riscv_vector::legitimize_move.
(*mov<mode>_mem_to_mem): Remove.

gcc/testsuite/

* gcc.target/riscv/rvv/autovec/vls/mov-1.c: Adapt test.
* gcc.target/riscv/rvv/autovec/vls/mov-10.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls/mov-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls/mov-5.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls/mov-7.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls/mov-8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls/mov-9.c: Ditto.1
* gcc.target/riscv/rvv/autovec/vls/mov-2.c: Removed.
* gcc.target/riscv/rvv/autovec/vls/mov-4.c: Removed.
* gcc.target/riscv/rvv/autovec/vls/mov-6.c: Removed.
* gcc.target/riscv/rvv/fortran/pr111566.f90: New test.

Co-Authored-By: Juzhe-Zhong <juzhe.zhong@rivai.ai>
9 months agoDaily bump.
GCC Administrator [Sun, 1 Oct 2023 00:18:19 +0000 (00:18 +0000)]
Daily bump.

9 months agoRISC-V: Use safe_grow_cleared for vector info [PR111649]
Patrick O'Neill [Sat, 30 Sep 2023 22:50:11 +0000 (15:50 -0700)]
RISC-V: Use safe_grow_cleared for vector info [PR111649]

Resolves a riscv*-*-* bootstrap failure due to a newly-turned-on assert.

2023-09-30  Jakub Jelinek  <jakub@redhat.com>

gcc/ChangeLog:

PR target/111649

* config/riscv/riscv-vsetvl.cc (vector_infos_manager::vector_infos_manager):
Replace safe_grow with safe_grow_cleared.

9 months agogimple-match-head: Fix a pasto in function comment
Jakub Jelinek [Sat, 30 Sep 2023 09:35:24 +0000 (11:35 +0200)]
gimple-match-head: Fix a pasto in function comment

This function comment has been pasted from gimple_bitwise_equal_p and haven't
been adjusted for different function name.

2023-09-30  Jakub Jelinek  <jakub@redhat.com>

* gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Fix a pasto
in function comment.

9 months agolowerbitint: Fix 2 bitint lowering bugs [PR111625]
Jakub Jelinek [Sat, 30 Sep 2023 09:28:44 +0000 (11:28 +0200)]
lowerbitint: Fix 2 bitint lowering bugs [PR111625]

This patch fixes 2 issues.  One is when we want to get address of
an uninitialized large/huge bitint SSA_NAME for multiplication/division/modulo
or conversion to floating point (binary or decimal), the code just creates
an uninitialized limb sized variable and passes address of that, but I forgot
to initialize *prec in that case, so it invoked UB at compile time rather
than at runtime.  As it is UB, we could use anything valid as precision there,
say 2 bits for signed, 1 bit for unsigned as smallest possible set of values,
or full bitint precision as full random value.  Though, because we only pass
address to a single limb, I think it is best to pass the bitsize of the limb.

And the other issue is that when ranger in range_to_prec finds some range
is undefined_p (), it will assert {lower,upper}_bound () method isn't called
on it, but we were.  So, the patch adjusts range_to_proc to treat it like
the !optimized case, full bitint precision.

2023-09-30  Jakub Jelinek  <jakub@redhat.com>

PR middle-end/111625
PR middle-end/111637
* gimple-lower-bitint.cc (range_to_prec): Use prec or -prec if
r.undefined_p ().
(bitint_large_huge::handle_operand_addr): For uninitialized operands
use limb_prec or -limb_prec precision.

9 months agovec.h: Uncomment static_assert
Jakub Jelinek [Sat, 30 Sep 2023 09:26:14 +0000 (11:26 +0200)]
vec.h: Uncomment static_assert

Now that poly_int_pod has been removed and other changes mostly to use
{quick,safe}_grow_cleared instead of {quick,safe}_grow for types with
non-trivial default construction, we can enable even the last static
assertion.  From now on, {quick,safe}_grow can only be used with
trivially default constructible types.

2023-09-30  Jakub Jelinek  <jakub@redhat.com>

* vec.h (quick_grow): Uncomment static_assert.

9 months agoRISC-V: Add type attribute in *<optab>_not_const<mode> pattern
Jivan Hakobyan [Sat, 30 Sep 2023 03:21:02 +0000 (21:21 -0600)]
RISC-V: Add type attribute in *<optab>_not_const<mode> pattern

After f088b768d01a commit riscv_sched_variable_issue function requires
that all insns should have a type attribute.

When I sent my previous patch there was no such limitation.
Currently, I have regressions on my tests. This patch fixes them.

gcc/ChangeLog:
* config/riscv/bitmanip.md (*<optab>_not_const<mode>): Added type attribute

9 months agoRemove .PHONY targets when building .fda files during autoprofiledbootstrap
Eugene Rozenfeld [Sat, 16 Sep 2023 01:32:10 +0000 (18:32 -0700)]
Remove .PHONY targets when building .fda files during autoprofiledbootstrap

These .PHONY targets are always executed and were breaking `make install`
for autoprofiledbootstrap build.

Tested on x86_64-pc-linux-gnu.

gcc/c/ChangeLog:
* Make-lang.in: Make create_fdas_for_cc1 target not .PHONY

gcc/cp/ChangeLog:
* Make-lang.in: Make create_fdas_for_cc1plus target not .PHONY

gcc/lto/ChangeLog:
* Make-lang.in: Make create_fdas_for_lto1 target not .PHONY

9 months agoDaily bump.
GCC Administrator [Sat, 30 Sep 2023 00:17:24 +0000 (00:17 +0000)]
Daily bump.

9 months agomodula2: testsuite correction to m2date.mod
Gaius Mulley [Fri, 29 Sep 2023 23:48:09 +0000 (00:48 +0100)]
modula2: testsuite correction to m2date.mod

This patch corrects the m2date day of the week message.
The days of the week array start with Thursday reflecting the
1st Jan 1970.

gcc/testsuite/ChangeLog:

* gm2/iso/run/pass/m2date.mod (DayName): Reordered.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
9 months agoFix INSN costing and more zicond tests
Xiao Zeng [Fri, 29 Sep 2023 22:29:02 +0000 (16:29 -0600)]
Fix INSN costing and more zicond tests

So this ends up looking a lot like the bits that I had to revert several weeks
ago :-)

The core issue we have is given an INSN the generic code will cost the SET_SRC
and SET_DEST and sum them.  But that's far from ideal on a RISC target.

For a register destination, the cost can be determined be looking at just the
SET_SRC.  Which is precisely what this patch does.  When the outer code is an
INSN and we're presented with a SET we take one of two paths.

If the destination is a register, then we recurse just on the SET_SRC and we're
done.  Otherwise we fall back to the existing code which sums the cost of the
SET_SRC and SET_DEST.  That fallback path isn't great and probably could be
further improved (just costing SET_DEST in that case is probably quite
reasonable).

The difference between this version and the bits that slipped through by
accident several weeks ago is that old version mis-used the API due to a thinko
on my part.

This tightens up various zicond tests to avoid undesirable matching.

This has been tested on rv64gc -- the only difference it makes on the testsuite
is the new tests (included in this patch) flip from failing to passing.

Pushed to the trunk.

gcc/
* config/riscv/riscv.cc (riscv_rtx_costs): Better handle costing
SETs when the outer code is INSN.

gcc/testsuite
* gcc.target/riscv/zicond-primitiveSemantics_compare_imm.c: New test.
* gcc.target/riscv/zicond-primitiveSemantics_compare_imm_return_0_imm.c:
Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_compare_imm_return_imm_imm.c:
Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_compare_imm_return_imm_reg.c:
Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_compare_imm_return_reg_reg.c:
Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_compare_reg.c: Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_compare_reg_return_0_imm.c:
Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_compare_reg_return_imm_imm.c:
Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_compare_reg_return_imm_reg.c:
Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_compare_reg_return_reg_reg.c:
Likewise.
* gcc.target/riscv/zicond-primitiveSemantics.c: Tighten expected regexp.
* gcc.target/riscv/zicond-primitiveSemantics_return_0_imm.c: Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_return_imm_imm.c: Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_return_imm_reg.c: Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_return_reg_reg.c: Likewise.
* gcc.target/riscv/zicond-xor-01.c: Likewise.

9 months agoRISC-V: Specify -mabi=lp64d in wredsum_vlmax.c testcase
Patrick O'Neill [Fri, 29 Sep 2023 21:20:07 +0000 (14:20 -0700)]
RISC-V: Specify -mabi=lp64d in wredsum_vlmax.c testcase

Resolves this error on rv32gcv:
cc1: error: ABI requires '-march=rv32'
compiler exited with status 1
FAIL: gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c   -O0  (test for excess errors)

Tested for regressions using glibc rv32gcv/rv64gcv multilib on
r14-4339-geaa41a6dc12.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c: Specify -mabi=lp64d.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
9 months agocheck_GNU_style.py: Skip .md square bracket linting
Patrick O'Neill [Tue, 12 Sep 2023 18:30:20 +0000 (11:30 -0700)]
check_GNU_style.py: Skip .md square bracket linting

This testcase causes lots of false-positives for machine description files.

contrib/ChangeLog:

* check_GNU_style_lib.py: Skip machine description file bracket linting.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
9 months agoRISC-V: Replace not + bitwise_imm with li + bitwise_not
Jivan Hakobyan [Fri, 29 Sep 2023 19:41:48 +0000 (13:41 -0600)]
RISC-V: Replace not + bitwise_imm with li + bitwise_not

In the case when we have C code like this

int foo (int a) {
   return 100 & ~a;
}

GCC generates the following instruction sequence

foo:
     not     a0,a0
     andi    a0,a0,100
     ret

This patch replaces that with this sequence
foo:
     li a5,100
     andn a0,a5,a0
     ret

The profitability comes from an out-of-order processor being able to
issue the "li a5, 100" at any time after it's fetched while "not a0, a0" has
to wait until any prior setter of a0 has reached completion.

gcc/ChangeLog:
* config/riscv/bitmanip.md (*<optab>_not_const<mode>): New split
pattern.

gcc/testsuite/ChangeLog:
* gcc.target/riscv/zbb-andn-orn-01.c: New test.
* gcc.target/riscv/zbb-andn-orn-02.c: Likewise.

9 months agoRemove poly_int_pod
Richard Sandiford [Fri, 29 Sep 2023 16:55:12 +0000 (17:55 +0100)]
Remove poly_int_pod

poly_int was written before the switch to C++11 and so couldn't
use explicit default constructors.  This led to an awkward split
between poly_int_pod and poly_int.  poly_int simply inherited from
poly_int_pod and added constructors, with the argumentless constructor
having an empty body.  But inheritance meant that poly_int had to
repeat the assignment operators from poly_int_pod (again, no C++11,
so no "using" to inherit base-class implementations).

All that goes away if we switch to using default constructors.

The main complication is ensuring that braced initialisation still
gives a constexpr, so that static variables can be initialised without
runtime code.  The two problems here are:

(1) When initialising a poly_int<N, wide_int> with fewer than N
    coefficients, the other coefficients need to be a zero of
    the same precision as the explicit coefficients.  This was
    previously done in a for loop using wi::ints_for<...>::zero,
    but C++11 constexpr constructors can't have function bodies.
    The patch instead uses a series of delegated initialisers to
    fill in the implicit coefficients.

(2) The initialisation in:

      void f(int x) {
        unsigned int foo {x};
      }

    produces the warning:

      warning: narrowing conversion of 'x' from 'int' to 'unsigned int' [-Wnarrowing]

    whereas:

      void f(int x) {
        unsigned int foo = x;
      }

    does not.  So switching to direct initialisation of the coeffs array
    would mean that:

      poly_uin64_t x = 0;

    would trigger a warning for using 0 rather than 0u.  That seemed
    overly pedantic, so the patch adds explicit casts to the constructor.
    The complication is to do that without adding extra code to
    wide-int versions.  The patch uses a new init_cast type for that.

gcc/
* poly-int.h (poly_int_pod): Delete.
(poly_coeff_traits::init_cast): New type.
(poly_int_full, poly_int_hungry, poly_int_fullness): New structures.
(poly_int): Replace constructors that take 1 and 2 coefficients with
a general one that takes an arbitrary number of coefficients.
Delegate initialization to two new private constructors, one of
which uses the coefficients as-is and one of which adds an extra
zero of the appropriate type (and precision, where applicable).
(gt_ggc_mx, gt_pch_nx): Operate on poly_ints rather than poly_int_pods.
* poly-int-types.h (poly_uint16_pod, poly_int64_pod, poly_uint64_pod)
(poly_offset_int_pod, poly_wide_int_pod, poly_widest_int_pod): Delete.
* gengtype.cc (main): Don't register poly_int64_pod.
* calls.cc (initialize_argument_information): Use poly_int rather
than poly_int_pod.
(combine_pending_stack_adjustment_and_call): Likewise.
* config/aarch64/aarch64.cc (pure_scalable_type_info): Likewise.
* data-streamer.h (bp_unpack_poly_value): Likewise.
* dwarf2cfi.cc (struct dw_trace_info): Likewise.
(struct queued_reg_save): Likewise.
* dwarf2out.h (struct dw_cfa_location): Likewise.
* emit-rtl.h (struct incoming_args): Likewise.
(struct rtl_data): Likewise.
* expr.cc (get_bit_range): Likewise.
(get_inner_reference): Likewise.
* expr.h (get_bit_range): Likewise.
* fold-const.cc (split_address_to_core_and_offset): Likewise.
(ptr_difference_const): Likewise.
* fold-const.h (ptr_difference_const): Likewise.
* function.cc (try_fit_stack_local): Likewise.
(instantiate_new_reg): Likewise.
* function.h (struct expr_status): Likewise.
(struct args_size): Likewise.
* genmodes.cc (ZERO_COEFFS): Likewise.
(mode_size_inline): Likewise.
(mode_nunits_inline): Likewise.
(emit_mode_precision): Likewise.
(emit_mode_size): Likewise.
(emit_mode_nunits): Likewise.
* gimple-fold.cc (get_base_constructor): Likewise.
* gimple-ssa-store-merging.cc (struct symbolic_number): Likewise.
* inchash.h (class hash): Likewise.
* ipa-modref-tree.cc (modref_access_node::dump): Likewise.
* ipa-modref.cc (modref_access_analysis::merge_call_side_effects):
Likewise.
* ira-int.h (ira_spilled_reg_stack_slot): Likewise.
* lra-eliminations.cc (self_elim_offsets): Likewise.
* machmode.h (mode_size, mode_precision, mode_nunits): Likewise.
* omp-low.cc (omplow_simd_context): Likewise.
* pretty-print.cc (pp_wide_integer): Likewise.
* pretty-print.h (pp_wide_integer): Likewise.
* reload.cc (struct decomposition): Likewise.
* reload.h (struct reload): Likewise.
* reload1.cc (spill_stack_slot_width): Likewise.
(struct elim_table): Likewise.
(offsets_at): Likewise.
(init_eliminable_invariants): Likewise.
* rtl.h (union rtunion): Likewise.
(poly_int_rtx_p): Likewise.
(strip_offset): Likewise.
(strip_offset_and_add): Likewise.
* rtlanal.cc (strip_offset): Likewise.
* tree-dfa.cc (get_ref_base_and_extent): Likewise.
(get_addr_base_and_unit_offset_1): Likewise.
(get_addr_base_and_unit_offset): Likewise.
* tree-dfa.h (get_ref_base_and_extent): Likewise.
(get_addr_base_and_unit_offset_1): Likewise.
(get_addr_base_and_unit_offset): Likewise.
* tree-ssa-loop-ivopts.cc (struct iv_use): Likewise.
(strip_offset): Likewise.
* tree-ssa-sccvn.h (struct vn_reference_op_struct): Likewise.
* tree.cc (ptrdiff_tree_p): Likewise.
* tree.h (poly_int_tree_p): Likewise.
(ptrdiff_tree_p): Likewise.
(get_inner_reference): Likewise.

gcc/testsuite/
* gcc.dg/plugin/poly-int-tests.h (test_num_coeffs_extra): Use
poly_int rather than poly_int_pod.

9 months agoTestsuite, DWARF2: adjust regexp to match darwin output
Francois-Xavier Coudert [Sun, 20 Aug 2023 10:53:19 +0000 (12:53 +0200)]
Testsuite, DWARF2: adjust regexp to match darwin output

gcc/testsuite/ChangeLog:

* gcc.dg/debug/dwarf2/inline4.c: Ajdust regexp to match darwin
output.

9 months agomodula2: iso library SysClock.mod and wrapclock.cc fixes.
Gaius Mulley [Fri, 29 Sep 2023 16:18:16 +0000 (17:18 +0100)]
modula2: iso library SysClock.mod and wrapclock.cc fixes.

This patch corrects the C equivalent of m2 LONGINT parameters
in wrapclock.cc and corrects the SysClock.mod module.
wrapclock.cc uses a typedef long long int longint_t to match
m2 LONGINT (rather than unsigned long).  These fixes
prevent calls to SysClock hanging spinning on an (incorrect)
large day count from the epoch.

gcc/m2/ChangeLog:

* gm2-compiler/M2Quads.mod (EndBuildFor): Improve
block comments.
* gm2-libs-iso/SysClock.mod (ExtractDate): Replace
testDays with yearOfDays.  New local variable monthOfDays.

libgm2/ChangeLog:

* libm2iso/wrapclock.cc (longint_t): New declaration.
(GetTimespec): Replace types for sec and nano with
longint_t.
(SetTimespec): Replace types for sec and nano with
longint_t.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
9 months agoFix memory barrier patterns for pre PA8800 processors
John David Anglin [Fri, 29 Sep 2023 15:37:44 +0000 (15:37 +0000)]
Fix memory barrier patterns for pre PA8800 processors

2023-09-29  John David Anglin  <danglin@gcc.gnu.org>

* config/pa/pa.md (memory_barrier): Revise comment.
(memory_barrier_64, memory_barrier_32): Use ldcw,co on PA 2.0.
* config/pa/pa.opt (coherent-ldcw): Change default to disabled.

9 months agolibstdc++: Fix handling of surrogate CP in codecvt [PR108976]
Dimitrij Mijoski [Thu, 28 Sep 2023 19:38:11 +0000 (21:38 +0200)]
libstdc++: Fix handling of surrogate CP in codecvt [PR108976]

This patch fixes the handling of surrogate code points in all standard
facets for transcoding Unicode that are based on std::codecvt. Surrogate
code points should always be treated as error. On the other hand
surrogate code units can only appear in UTF-16 and only when they come
in a proper pair.

Additionally, it fixes a bug in std::codecvt_utf16::in() when odd number
of bytes were given in the range [from, from_end), error was returned
always. The last byte in such range does not form a full UTF-16 code
unit and we can not make any decisions for error, instead partial should
be returned.

The testsuite for testing these facets was updated in the following
order:

1. All functions that test codecvts that work with UTF-8 were refactored
   and made more generic so they accept codecvt that works with the char
   type char8_t.
2. The same functions were updated with new test cases for transcoding
   errors and now additionally test for surrogates, overlong UTF-8
   sequences, code points out of the Unicode range, and more tests for
   missing leading and trailing code units.
3. New tests were added to test codecvt_utf16 in both of its variants,
   UTF-16 <-> UTF-32/UCS-4 and UTF-16 <-> UCS-2.

libstdc++-v3/ChangeLog:

PR libstdc++/108976
* src/c++11/codecvt.cc (read_utf8_code_point): Fix handing of
surrogates in UTF-8.
(ucs4_out): Fix handling of surrogates in UCS-4 -> UTF-8.
(ucs4_in): Fix handling of range with odd number of bytes.
(ucs4_out): Fix handling of surrogates in UCS-4 -> UTF-16.
(ucs2_out): Fix handling of surrogates in UCS-2 -> UTF-16.
(ucs2_in): Fix handling of range with odd number of bytes.
(__codecvt_utf16_base<char16_t>::do_in): Likewise.
(__codecvt_utf16_base<char32_t>::do_in): Likewise.
(__codecvt_utf16_base<wchar_t>::do_in): Likewise.
* testsuite/22_locale/codecvt/codecvt_unicode.cc: Renames, add
tests for codecvt_utf16<char16_t> and codecvt_utf16<char32_t>.
* testsuite/22_locale/codecvt/codecvt_unicode.h: Refactor UTF-8
testing functions for char8_t, add more test cases for errors,
add testing functions for codecvt_utf16.
* testsuite/22_locale/codecvt/codecvt_unicode_wchar_t.cc:
Renames, add tests for codecvt_utf16<whchar_t>.
* testsuite/22_locale/codecvt/codecvt_utf16/79980.cc (test06):
Fix test.
* testsuite/22_locale/codecvt/codecvt_unicode_char8_t.cc: New
test.

9 months agolibstdc++: Ensure active union member is correctly set
Nathaniel Shead [Fri, 29 Sep 2023 09:30:41 +0000 (10:30 +0100)]
libstdc++: Ensure active union member is correctly set

This patch ensures that the union members for std::string and
std::variant are always properly set when a change occurs.

libstdc++-v3/ChangeLog:

* include/bits/basic_string.h: (basic_string(basic_string&&)):
Activate _M_local_buf when needed.
(basic_string(basic_string&&, const _Alloc&)): Likewise.
* include/bits/basic_string.tcc: (basic_string::swap): Likewise.
* include/std/variant: (__detail::__variant::__construct_n): New.
(__detail::__variant::__emplace): Use __construct_n.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
9 months agoHarmonize headers between both dg-extract-results scripts
Paul Iannetta [Fri, 29 Sep 2023 14:50:28 +0000 (08:50 -0600)]
Harmonize headers between both dg-extract-results scripts

    The header of the python version looked like:
    Target is ...
    Host   is ...
    The header of the bash version looked like:
    Test run by ... on ...
    Target is ...

    After this change both headers look like:
    Test run by ... on ...
    Target is ...
    Host   is ...

    The order of the tests is not the same but since dg-cmp-results.sh it
    does not matter much.

contrib/ChangeLog:

* dg-extract-results.py: Print the "Test run" line.
* dg-extract-results.sh: Print the "Host" line.

9 months agovec.h: Guard most of static assertions for GCC >= 5
Jakub Jelinek [Fri, 29 Sep 2023 13:14:52 +0000 (15:14 +0200)]
vec.h: Guard most of static assertions for GCC >= 5

As reported by Jonathan on IRC, my vec.h patch broke build with GCC 4.8.x
or 4.9.x as system compiler, e.g. on CFarm.
The problem is that while all of
std::is_trivially_{destructible,copyable,default_constructible} traits
are in C++, only std::is_trivially_destructible has been implemented in GCC
4.8, the latter two were added only in GCC 5.
Only std::is_trivially_destructible is the really important one though,
which is used to decide what pop returns and whether to invoke the
destructors or not.  The rest are solely used in static_asserts and as such
I think it is acceptable if we don't assert those when built with GCC 4.8
or 4.9, anybody doing bootstrap from those system compilers or doing builds
with newer GCC will catch that.

So, the following patch guards those for 5+.
If we switch to C++14 later on and start requiring newer version of system
GCC as well (do we require GCC >= 5 which claims the last C++14 language
features, or what provides all C++14 library features, or GCC >= 6 which
uses -std=c++14 by default?), this patch then can be reverted.

2023-09-29  Jakub Jelinek  <jakub@redhat.com>

* vec.h (quick_insert, ordered_remove, unordered_remove,
block_remove, qsort, sort, stablesort, quick_grow): Guard
std::is_trivially_{copyable,default_constructible} and
vec_detail::is_trivially_copyable_or_pair static assertions
with GCC_VERSION >= 5000.
(vec_detail::is_trivially_copyable_or_pair): Guard definition
with GCC_VERSION >= 5000.

9 months agoFortran: Free alloc. comp. in allocated coarrays only.
Andre Vehreschild [Thu, 28 Sep 2023 07:30:12 +0000 (09:30 +0200)]
Fortran: Free alloc. comp. in allocated coarrays only.

When freeing allocatable components of an allocatable coarray, add
a check that the coarray is still allocated, before accessing the
components.

This patch adds to PR fortran/37336, but does not fix it completely.

gcc/fortran/ChangeLog:
PR fortran/37336
* trans-array.cc (structure_alloc_comps): Deref coarray.
(gfc_trans_deferred_array): Add freeing of components after
check for allocated coarray.

gcc/testsuite/ChangeLog:
PR fortran/37336
* gfortran.dg/coarray/alloc_comp_6.f90: New test.
* gfortran.dg/coarray/alloc_comp_7.f90: New test.

9 months agoaarch64: Improve on ldp-stp policies code structure.
Manos Anagnostakis [Thu, 28 Sep 2023 16:04:33 +0000 (18:04 +0200)]
aarch64: Improve on ldp-stp policies code structure.

Improves on: 834fc2bf

This improves the code structure of the ldp-stp policies
patch introduced in 834fc2bf

Bootstrapped and regtested on aarch64-linux.

gcc/ChangeLog:
* config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): Removed.
(enum aarch64_ldp_stp_policy): Merged enums aarch64_ldp_policy
and aarch64_stp_policy to aarch64_ldp_stp_policy.
(enum aarch64_stp_policy): Removed.
* config/aarch64/aarch64-protos.h (struct tune_params): Removed
aarch64_ldp_policy_model and aarch64_stp_policy_model enum types
and left only the definitions to the aarch64-opts one.
* config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): Removed.
(aarch64_parse_stp_policy): Removed.
(aarch64_override_options_internal): Removed calls to parsing
functions and added obvious direct assignments.
(aarch64_mem_ok_with_ldpstp_policy_model): Improved
code quality based on the new changes.
* config/aarch64/aarch64.opt: Use single enum type
aarch64_ldp_stp_policy for both ldp and stp options.

gcc/testsuite/ChangeLog:
* gcc.target/aarch64/ldp_aligned.c: Splitted into this and
ldp_unaligned.
* gcc.target/aarch64/stp_aligned.c: Splitted into this and
stp_unaligned.
* gcc.target/aarch64/ldp_unaligned.c: New test.
* gcc.target/aarch64/stp_unaligned.c: New test.

Signed-off-by: Manos Anagnostakis <manos.anagnostakis@vrull.eu>
Suggested-by: Richard Sandiford <richard.sandiford@arm.com>
9 months agotree-optimization/111583 - loop distribution issue
Richard Biener [Fri, 29 Sep 2023 09:08:18 +0000 (11:08 +0200)]
tree-optimization/111583 - loop distribution issue

The following conservatively fixes loop distribution to only
recognize memset/memcpy and friends when at least one element
is going to be processed.  This avoids having an unconditional
builtin call in the IL that might imply the source and destination
pointers are non-NULL when originally pointers were not always
dereferenced.

With -Os loop header copying is less likely to ensure this.

PR tree-optimization/111583
* tree-loop-distribution.cc (find_single_drs): Ensure the
load/store are always executed.

* gcc.dg/tree-ssa/pr111583-1.c: New testcase.
* gcc.dg/tree-ssa/pr111583-2.c: Likewise.

9 months agouse *_grow_cleared rather than *_grow on vect_unpromoted_value
Jakub Jelinek [Fri, 29 Sep 2023 09:23:16 +0000 (11:23 +0200)]
use *_grow_cleared rather than *_grow on vect_unpromoted_value

vect_recog_over_widening_pattern is another spot which triggers the
right now commented out static assertion in vec.h which asserts
{quick,safe}_grow vec operations are only used with trivially default
constructible types.

I had a look at this and I think using quick_grow_cleared is best choice
here.  The nops is 2 or 1 most of the time, worst case 3, so the price of
extra initialization of 4 pointer-sized-or-less members times 1, 2 or 3
doesn't seem worth bothering, it is similar to the bitmap_head case where
we already pay the price for just one structure anytime we do
  vect_unpromoted_value unprom_diff;
(and later set_op on it) or even
  vect_unpromoted_value unprom0[2];

With this patch and Richard S's poly_int_pod removal the static_assert can
be enabled as well and gcc builds.

2023-09-29  Jakub Jelinek  <jakub@redhat.com>

* tree-vect-patterns.cc (vect_recog_over_widening_pattern): Use
quick_grow_cleared method on unprom rather than quick_grow.

9 months agoggc: do not wipe out unrelated data via gt_ggc_rtab [PR111505]
Sergei Trofimovich [Thu, 28 Sep 2023 19:20:31 +0000 (20:20 +0100)]
ggc: do not wipe out unrelated data via gt_ggc_rtab [PR111505]

There are 3 GC root tables:

   gt_ggc_rtab
   gt_ggc_deletable_rtab
   gt_pch_scalar_rtab

`deletable` and `scalar` tables are both simple: each element always
contains a pointer to the beginning of the object and it's size is the
full object.

`rtab` is different: it's `base` is a pointer in the middle of the
struct and `stride` points to the next GC pointer in the array.

Before the change there were 2 problems:

1. We memset()ed not just pointers but data around them.
2. We wen out of bounds of the last object described by gt_ggc_rtab
   and triggered bootstrap failures in profile and asan bootstraps.

After the change we handle only pointers themselves like the rest of
ggc-common.cc code.

gcc/
PR middle-end/111505
* ggc-common.cc (ggc_zero_out_root_pointers, ggc_common_finalize):
Add new helper. Use helper instead of memset() to wipe out pointers.

9 months agoSimplify & expand c_readstr
Richard Sandiford [Fri, 29 Sep 2023 08:24:43 +0000 (09:24 +0100)]
Simplify & expand c_readstr

c_readstr only operated on integer modes.  It worked by reading
the source string into an array of HOST_WIDE_INTs, converting
that array into a wide_int, and from there to an rtx.

It's simpler to do this by building a target memory image and
using native_decode_rtx to convert that memory image into an rtx.
It avoids all the endianness shenanigans because both the string and
native_decode_rtx follow target memory order.  It also means that the
function can handle all fixed-size modes, which simplifies callers
and allows vector modes to be used more widely.

gcc/
* builtins.h (c_readstr): Take a fixed_size_mode rather than a
scalar_int_mode.
* builtins.cc (c_readstr): Likewise.  Build a local array of
bytes and use native_decode_rtx to get the rtx image.
(builtin_memcpy_read_str): Simplify accordingly.
(builtin_strncpy_read_str): Likewise.
(builtin_memset_read_str): Likewise.
(builtin_memset_gen_str): Likewise.
* expr.cc (string_cst_read_str): Likewise.

9 months agouse *_grow_cleared rather than *_grow on vec<bitmap_head>
Jakub Jelinek [Fri, 29 Sep 2023 07:35:01 +0000 (09:35 +0200)]
use *_grow_cleared rather than *_grow on vec<bitmap_head>

The assert checking which is commented out in vec.h grow method requires
trivially default constructible types to be used with this method, but
bitmap_head has since the PR88317 r9-4642 workaround non-trivial default
constructor to catch bugs and we pay the minimum price of initializing
everything in bitmap_head twice on the common
  bitmap_head var;
  bitmap_initilize (&var, obstack);
sequence.  This patch makes us pay the same price times number of elements
on
  vec<bitmap_head> v;
  v.create (n);
  v.safe_grow_cleared (n); // previous v.safe_grow (n);
  for (int i = 0; i < n; ++i)
    bitmap_initialize (&v[i], obstack);

2023-09-29  Jakub Jelinek  <jakub@redhat.com>

* tree-ssa-loop-im.cc (tree_ssa_lim_initialize): Use quick_grow_cleared
instead of quick_grow on vec<bitmap_head> members.
* cfganal.cc (control_dependences::control_dependences): Likewise.
* rtl-ssa/blocks.cc (function_info::build_info::build_info): Likewise.
(function_info::place_phis): Use safe_grow_cleared instead of safe_grow
on auto_vec<bitmap_head> vars.
* tree-ssa-live.cc (compute_live_vars): Use quick_grow_cleared instead
of quick_grow on vec<bitmap_head> var.

9 months agoDaily bump.
GCC Administrator [Fri, 29 Sep 2023 00:17:28 +0000 (00:17 +0000)]
Daily bump.

9 months agolibstdc++: Use Python "not in" operator
Tom Tromey [Wed, 27 Sep 2023 15:26:01 +0000 (09:26 -0600)]
libstdc++: Use Python "not in" operator

flake8 warns about code like

    not something in "whatever"

Ordinarily in Python this should be written as:

    something not in "whatever"

This patch makes this change.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py (Printer.add_version)
(add_one_template_type_printer)
(FilteringTypePrinter.add_one_type_printer): Use Python
"not in" operator.

9 months agolibstdc++: Remove std_ratio_t_tuple
Tom Tromey [Tue, 26 Sep 2023 20:04:26 +0000 (14:04 -0600)]
libstdc++: Remove std_ratio_t_tuple

This removes the std_ratio_t_tuple function from the Python
pretty-printer code.  It is not used.  Apparently the relevant parts
were moved to StdChronoDurationPrinter._ratio at some point in the
past.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py (std_ratio_t_tuple):
Remove.

9 months agolibstdc++: Remove unused locals from printers.py
Tom Tromey [Tue, 26 Sep 2023 19:58:57 +0000 (13:58 -0600)]
libstdc++: Remove unused locals from printers.py

flake8 pointed out some unused local variables in the libstdc++
pretty-printers.  This removes them.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py
(StdExpOptionalPrinter.__init__, lookup_node_type):
Remove unused variables.

9 months agolibstdc++: Remove unused Python imports
Tom Tromey [Tue, 26 Sep 2023 19:46:57 +0000 (13:46 -0600)]
libstdc++: Remove unused Python imports

flake8 pointed out some unused imports.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py: Don't import 'os'.
* python/libstdcxx/v6/__init__.py: Don't import 'gdb'.

9 months agolibstdc++: Use gdb.ValuePrinter base class
Tom Tromey [Tue, 26 Sep 2023 19:38:42 +0000 (13:38 -0600)]
libstdc++: Use gdb.ValuePrinter base class

GDB 14 will add a new ValuePrinter tag class that will be used to
signal that pretty-printers will agree to the "extension protocol" --
essentially that they will follow some simple namespace rules, so that
GDB can add new methods over time.

A couple new methods have already been added to GDB, to support DAP.
While I haven't implemented these for any libstdc++ printers yet, this
patch makes the basic conversion: printers derive from
gdb.ValuePrinter if it is available, and all "non-standard" (that is,
not specified by GDB) members of the various value-printing classes
are renamed to have a leading underscore.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py: Use gdb.ValuePrinter
everywhere.  Rename members to start with "_".

9 months agolibstdc++: Show full Python stack on error
Tom Tromey [Wed, 27 Sep 2023 19:49:59 +0000 (13:49 -0600)]
libstdc++: Show full Python stack on error

This changes the libstdc++ test suite to arrange for gdb to show the
full Python stack if any sort of Python exception occurs.  This makes
debugging the printers a little simpler.

libstdc++-v3/ChangeLog:

* testsuite/lib/gdb-test.exp (gdb-test): Enable Python
stack traces from gdb.

9 months agolibstdc++: Refactor Python Xmethods to use is_specialization_of
Jonathan Wakely [Thu, 28 Sep 2023 19:52:01 +0000 (20:52 +0100)]
libstdc++: Refactor Python Xmethods to use is_specialization_of

This copies the is_specialization_of function from printers.py (with
slight modification for versioned namespace handling) and reuses it in
xmethods.py to replace repetitive re.match calls in every class.

This fixes the problem that the regular expressions used \d without
escaping the backslash properly.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/xmethods.py (is_specialization_of): Define
new function.
(ArrayMethodsMatcher, DequeMethodsMatcher)
(ForwardListMethodsMatcher, ListMethodsMatcher)
(VectorMethodsMatcher, AssociativeContainerMethodsMatcher)
(UniquePtrGetWorker, UniquePtrMethodsMatcher)
(SharedPtrSubscriptWorker, SharedPtrMethodsMatcher): Use
is_specialization_of instead of re.match.

9 months agolibstdc++: Reformat Python code
Jonathan Wakely [Thu, 28 Sep 2023 13:54:59 +0000 (14:54 +0100)]
libstdc++: Reformat Python code

Some of these changes were suggested by autopep8's --aggressive
option, others are for readability.

Break long lines by splitting strings across multiple lines, or
introducing local variables to hold results.

Use raw strings for regular expressions, so that backslashes don't need
to be escaped.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py: Break long lines. Use raw
strings for regular expressions. Add whitespace around
operators.
(is_member_of_namespace): Use isinstance to check type.
(is_specialization_of): Likewise. Adjust template_name
for versioned namespace instead of duplicating the re.match
call.
(StdExpAnyPrinter._string_types): New static method.
(StdExpAnyPrinter.to_string): Use _string_types.

9 months agolibstdc++: Format Python docstrings according to PEP 357
Jonathan Wakely [Thu, 28 Sep 2023 10:06:02 +0000 (11:06 +0100)]
libstdc++: Format Python docstrings according to PEP 357

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py: Format docstrings according
to PEP 257.
* python/libstdcxx/v6/xmethods.py: Likewise.

9 months agomodula2: Increase linking test timeouts for slower targets
Gaius Mulley [Thu, 28 Sep 2023 18:07:04 +0000 (19:07 +0100)]
modula2: Increase linking test timeouts for slower targets

This patch introduces missing timeout handling for
pimlib-base-run-pass.exp and increases the timeout value
for larger projects which link (necessary for slower targets).

gcc/testsuite/ChangeLog:

* gm2/coroutines/pim/run/pass/coroutines-pim-run-pass.exp:
Add load_lib timeout-dg.exp and increase timeout to 60
seconds.
* gm2/pimlib/base/run/pass/pimlib-base-run-pass.exp: Add
load_lib timeout-dg.exp and increase timeout to 60 seconds.
* gm2/projects/iso/run/pass/halma/projects-iso-run-pass-halma.exp:
Increase timeout to 45 seconds.
* gm2/switches/whole-program/pass/run/switches-whole-program-pass-run.exp:
Add load_lib timeout-dg.exp and increase timeout to 120 seconds.
Remove unnecessary compile of mystrlib.mod.
* gm2/iso/run/pass/iso-run-pass.exp: Add load_lib
timeout-dg.exp and set timeout to 60 seconds.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
9 months agolibstdc++: Force _Hash_node_value_base methods inline to fix abi (PR111050)
Tim Song [Wed, 6 Sep 2023 17:31:55 +0000 (19:31 +0200)]
libstdc++: Force _Hash_node_value_base methods inline to fix abi (PR111050)

https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=1b6f0476837205932613ddb2b3429a55c26c409d
changed _Hash_node_value_base to no longer derive from _Hash_node_base, which means
that its member functions expect _M_storage to be at a different offset. So explosions
result if an out-of-line definition is emitted for any of the member functions (say,
in a non-optimized build) and the resulting object file is then linked with code built
using older version of GCC/libstdc++.

libstdc++-v3/ChangeLog:

PR libstdc++/111050
* include/bits/hashtable_policy.h
(_Hash_node_value_base<>::_M_valptr(), _Hash_node_value_base<>::_M_v())
Add [[__gnu__::__always_inline__]].

9 months agoRevert "[RA]: Improve cost calculation of pseudos with equivalences"
Vladimir N. Makarov [Thu, 28 Sep 2023 15:53:51 +0000 (11:53 -0400)]
Revert "[RA]: Improve cost calculation of pseudos with equivalences"

This reverts commit 3c834d85f2ec42c60995c2b678196a06cb744959.

Although the patch improves x86-64 specfp2007, it also results in
performance and code size regression on different targets and
new GCC testsuite failures on tests expecting a specific output.

9 months agoAArch64: Fix memmove operand corruption [PR111121]
Wilco Dijkstra [Tue, 26 Sep 2023 15:42:45 +0000 (16:42 +0100)]
AArch64: Fix memmove operand corruption [PR111121]

A MOPS memmove may corrupt registers since there is no copy of the input
operands to temporary registers.  Fix this by calling
aarch64_expand_cpymem_mops.

Reviewed-by: Richard Sandiford <richard.sandiford@arm.com>
gcc/ChangeLog/
PR target/111121
* config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
(movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
* config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
for memmove.
* config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
function.

gcc/testsuite/ChangeLog/
PR target/111121
* gcc.target/aarch64/mops_4.c: Add memmove testcases.

9 months agoRISC-V: Support {U}INT64 to FP16 auto-vectorization
Pan Li [Thu, 28 Sep 2023 05:51:07 +0000 (13:51 +0800)]
RISC-V: Support {U}INT64 to FP16 auto-vectorization

Update in v2:

* Add math trap check.
* Adjust some test cases.

Original logs:

This patch would like to support the auto-vectorization from
the INT64 to FP16. We take below steps for the conversion.

* INT64 to FP32.
* FP32 to FP16.

Given sample code as below:
void
test_func (int64_t * __restrict a, _Float16 *b, unsigned n)
{
  for (unsigned i = 0; i < n; i++)
    b[i] = (_Float16) (a[i]);
}

Before this patch:
test.c:6:26: missed: couldn't vectorize loop
test.c:6:26: missed: not vectorized: unsupported data-type
        ld      a0,0(s0)
        call    __floatdihf
        fsh     fa0,0(s1)
        addi    s0,s0,8
        addi    s1,s1,2
        bne     s2,s0,.L3
        ld      ra,24(sp)
        ld      s0,16(sp)
        ld      s1,8(sp)
        ld      s2,0(sp)
        addi    sp,sp,32

After this patch:
        vsetvli a5,a2,e8,mf8,ta,ma
        vle64.v v1,0(a0)
        vsetvli a4,zero,e32,mf2,ta,ma
        vfncvt.f.x.w    v1,v1
        vsetvli zero,zero,e16,mf4,ta,ma
        vfncvt.f.f.w    v1,v1
        vsetvli zero,a2,e16,mf4,ta,ma
        vse16.v v1,0(a1)

Please note VLS mode is also involved in this patch and covered by the
test cases.

PR target/111506

gcc/ChangeLog:

* config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
New pattern.
* config/riscv/vector-iterators.md: New iterator.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/unop/cvt-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/cvt-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/cvt-0.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
9 months ago[RA]: Add flag for checking IRA in progress
Vladimir N. Makarov [Thu, 28 Sep 2023 13:41:18 +0000 (09:41 -0400)]
[RA]: Add flag for checking IRA in progress

RISCV target developers need a flag to prevent creating
insns in IRA which can not be split after RA as they will need a
temporary reg.  The patch introduces such flag.

gcc/ChangeLog:

* rtl.h (lra_in_progress): Change type to bool.
(ira_in_progress): Add new extern.
* ira.cc (ira_in_progress): New global.
(pass_ira::execute): Set up ira_in_progress.
* lra.cc: (lra_in_progress): Change type to bool and initialize.
(lra): Use bool values for lra_in_progress.
* lra-eliminations.cc (init_elim_table): Ditto.

9 months agotarget/111600 - avoid deep recursion in access diagnostics
Richard Biener [Thu, 28 Sep 2023 09:51:30 +0000 (11:51 +0200)]
target/111600 - avoid deep recursion in access diagnostics

pass_waccess::check_dangling_stores uses recursion to traverse the CFG.
The following changes this to use a heap allocated worklist to avoid
blowing the stack.

Instead of using a better iteration order it tries hard to preserve
the current iteration order to avoid new false positives to pop up
since the set of stores we keep track isn't properly modeling flow,
so what is diagnosed and what not is quite random.  We are also
lacking the ideal RPO compute on the inverted graph that would just
ignore reverse unreachable code (as the current iteration scheme does).

PR target/111600
* gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
Use a heap allocated worklist for CFG traversal instead of
recursion.

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