gcc/
* doc/extend.texi (Common Variable Attributes): Use preferred
placement of type attributes in examples, plus whitespace fixes.
(Type Attributes): Clarify why placement of attributes
immediately after struct/union/enum keyword is preferred.
(Common Type Attributes): Use preferred placement of type
attributes in examples, plus more whitespace fixes.
Rainer Orth [Sun, 25 Nov 2018 15:59:44 +0000 (15:59 +0000)]
Disable gdc execution tests without libphobos
gcc/testsuite:
* lib/target-supports.exp (check_compile): Handle D.
(check_effective_target_d_runtime): New proc.
* lib/gdc-dg.exp (gdc-dg-test): Demote link and run tests to
compile unless d_runtime.
* gdc.dg/runnable.d: Skip unless d_runtime.
* gdc.dg/lto/lto.exp: Require d_runtime to run tests.
Janne Blomqvist [Fri, 23 Nov 2018 20:42:03 +0000 (22:42 +0200)]
Make recursion_check work for multiple threads
With multiple threads, using an unprotected static variable to check
whether recursion has occured isn't valid, as one thread might have
modified the variable, thus causing another thread to incorrectly
conclude that recursion has occured. This patch avoids this problem
by using a thread-specific variable for the recursion check.
Regtested on x86_64-pc-linux-gnu.
libgfortran/ChangeLog:
2018-11-23 Janne Blomqvist <jb@gcc.gnu.org>
* runtime/error.c (MAGIC): Remove.
(recursion_key): New variable.
(recursion_check): Use thread-specific variable for recursion
check if threads are active.
(constructor_recursion_check): New function.
(destructor_recursion_check): New funcion.
Martin Sebor [Fri, 23 Nov 2018 18:45:45 +0000 (18:45 +0000)]
PR tree-optimization/87756 - missing unterminated argument warning using address of a constant character
gcc/ChangeLog:
PR tree-optimization/87756
* expr.c (string_constant): Synthesize a string literal from
the address of a constant character.
* tree.c (build_string_literal): Add an argument.
* tree.h (build_string_literal): Same.
PR testsuite/88098
* c-typeck.c (convert_arguments): Call builtin_decl_explicit instead.
(maybe_warn_builtin_no_proto_arg): Handle short enum to int promotion.
Jonathan Wakely [Fri, 23 Nov 2018 15:48:56 +0000 (15:48 +0000)]
PR libstdc++/87308 adjust regex used in std::any pretty printer
The pretty printer for std::any fails when the contained value is a
locally-defined type, because the name in the debuginfo has
cv-qualifiers and ptr-declarators in different positions. The unexpected
format confuses the printer. This makes the printer's regex handle
either format.
This isn't a complete fix because looking up the contained type fails
when there are two types with the same name (defined in different local
scopes). This applies to all closure types defined in a given function,
as they all appear as "func()::lambda" in the debuginfo names.
PR libstdc++/87308 (partial)
* python/libstdcxx/v6/printers.py (StdExpAnyPrinter): Adjust regex to
work around PR 88166.
* testsuite/libstdc++-prettyprinters/cxx17.cc: Test std::any
containing a local type.
Richard Biener [Fri, 23 Nov 2018 12:53:39 +0000 (12:53 +0000)]
re PR tree-optimization/88149 (ICE in vect_transform_stmt since r265959)
2018-11-23 Richard Biener <rguenther@suse.de>
PR tree-optimization/88149
* tree-vect-slp.c (vect_slp_analyze_node_operations): Detect
the case where there are two different def types for the
same operand at different operand position in the same stmt.
Mihail Ionescu [Fri, 23 Nov 2018 10:48:52 +0000 (10:48 +0000)]
[PATCH, ARM] Clean up arm backend using the @ construct for MD patterns
This patch removes some of the machine mode checks from the arm backend when
emitting instructions by using the '@' construct (Parameterized Names[2]). It
is based on the previous AArch64 patch[1].
Jakub Jelinek [Fri, 23 Nov 2018 09:12:16 +0000 (10:12 +0100)]
re PR tree-optimization/86614 (duplicate -Warray-bounds for a strncpy call with out-of-bounds offset)
PR tree-optimization/86614
* gimple-ssa-warn-restrict.c (maybe_diag_offset_bounds): Return early
if TREE_NO_WARNING is set on ref.ref.
* c-c++-common/Warray-bounds-2.c (wrap_strncpy_dstarray_diff_neg,
call_strncpy_dstarray_diff_neg): Don't expect late -Warray-bounds
warnings, just early ones from FE. Remove dg-prune-output.
* c-c++-common/Warray-bounds-6.c: New test.
Jakub Jelinek [Fri, 23 Nov 2018 00:11:11 +0000 (01:11 +0100)]
lang.opt (fpad-source): New option.
* lang.opt (fpad-source): New option.
* scanner.c (load_line): Don't pad fixed form lines if
!flag_pad_source.
* invoke.texi (-fno-pad-source): Document.
* gfortran.dg/pad_source_1.f: New test.
* gfortran.dg/pad_source_2.f: New test.
* gfortran.dg/pad_source_3.f: New test.
* gfortran.dg/pad_source_4.f: New test.
* gfortran.dg/pad_source_5.f: New test.
Jan Hubicka [Thu, 22 Nov 2018 23:10:57 +0000 (00:10 +0100)]
re PR lto/88142 (ICE in lto_warn at ipa-devirt.c:1020 since r265519)
PR lto/88142
* ipa-devirt.c (type_variants_equivalent_p): Drop warn and warned
parameters; do not warn here.
(odr_subtypes_equivalent_p): Likewise.
(warn_odr): Fix typo.
(warn_types_mismatch): Do not output confused warnings on integer types.
(odr_types_equivalent_p): Update.
* g++.dg/lto/odr-5_0.C: New testcase.
* g++.dg/lto/odr-5_1.C: New testcase.
Jakub Jelinek [Thu, 22 Nov 2018 21:34:49 +0000 (22:34 +0100)]
i386.c (ix86_option_override_internal): For stack_protector_guard related options...
* config/i386/i386.c (ix86_option_override_internal): For
stack_protector_guard related options, use opts_set->x_ instead
of global_options_set. and prefix options with opts->x_ . Move
defaults for offset and reg into else block.
Vladimir Makarov [Thu, 22 Nov 2018 17:25:57 +0000 (17:25 +0000)]
re PR rtl-optimization/87718 (FAIL: gcc.target/i386/avx512dq-concatv2si-1.c)
2018-11-22 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/87718
* ira-costs.c: Remove trailing white-spaces.
(record_operand_costs): Add a special treatment for moves
involving a hard register.
2018-11-22 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/87718
* gcc.target/i386/pr82361-1.c: Check only the first operand of
moves.
Martin Liska [Thu, 22 Nov 2018 15:09:55 +0000 (16:09 +0100)]
Fix option values for -march.
2018-11-22 Martin Liska <mliska@suse.cz>
* common/config/i386/i386-common.c (processor_names): Add
static assert and add missing "znver2".
(ix86_get_valid_option_values): Add checking assert for null
values and add "native" value if feasible.
* config/i386/i386.h: Do not declare size of processor_names.
* common/config/i386/i386-common.c:
* config/i386/i386.c: Add static assert for size
of processor_cost_table.
PR85434: Prevent spilling of stack protector guard's address on ARM
In case of high register pressure in PIC mode, address of the stack
protector's guard can be spilled on ARM targets as shown in PR85434,
thus allowing an attacker to control what the canary would be compared
against. ARM does lack stack_protect_set and stack_protect_test insn
patterns, defining them does not help as the address is expanded
regularly and the patterns only deal with the copy and test of the
guard with the canary.
This problem does not occur for x86 targets because the PIC access and
the test can be done in the same instruction. Aarch64 is exempt too
because PIC access insn pattern are mov of UNSPEC which prevents it from
the second access in the epilogue being CSEd in cse_local pass with the
first access in the prologue.
The approach followed here is to create new "combined" set and test
standard pattern names that take the unexpanded guard and do the set or
test. This allows the target to use an opaque pattern (eg. using UNSPEC)
to hide the individual instructions being generated to the compiler and
split the pattern into generic load, compare and branch instruction
after register allocator, therefore avoiding any spilling. This is here
implemented for the ARM targets. For targets not implementing these new
standard pattern names, the existing stack_protect_set and
stack_protect_test pattern names are used.
To be able to split PIC access after register allocation, the functions
had to be augmented to force a new PIC register load and to control
which register it loads into. This is because sharing the PIC register
between prologue and epilogue could lead to spilling due to CSE again
which an attacker could use to control what the canary gets compared
against.
2018-11-22 Thomas Preud'homme <thomas.preudhomme@linaro.org>
gcc/
PR target/85434
* target-insns.def (stack_protect_combined_set): Define new standard
pattern name.
(stack_protect_combined_test): Likewise.
* cfgexpand.c (stack_protect_prologue): Try new
stack_protect_combined_set pattern first.
* function.c (stack_protect_epilogue): Try new
stack_protect_combined_test pattern first.
* config/arm/arm.c (require_pic_register): Add pic_reg and compute_now
parameters to control which register to use as PIC register and force
reloading PIC register respectively. Insert in the stream of insns if
possible.
(legitimize_pic_address): Expose above new parameters in prototype and
adapt recursive calls accordingly. Use pic_reg if non null instead of
cached one.
(arm_load_pic_register): Add pic_reg parameter and use it if non null.
(arm_legitimize_address): Adapt to new legitimize_pic_address
prototype.
(thumb_legitimize_address): Likewise.
(arm_emit_call_insn): Adapt to require_pic_register prototype change.
(arm_expand_prologue): Adapt to arm_load_pic_register prototype change.
(thumb1_expand_prologue): Likewise.
* config/arm/arm-protos.h (legitimize_pic_address): Adapt to prototype
change.
(arm_load_pic_register): Likewise.
* config/arm/predicated.md (guard_addr_operand): New predicate.
(guard_operand): New predicate.
* config/arm/arm.md (movsi expander): Adapt to legitimize_pic_address
prototype change.
(builtin_setjmp_receiver expander): Adapt to thumb1_expand_prologue
prototype change.
(stack_protect_combined_set): New expander..
(stack_protect_combined_set_insn): New insn_and_split pattern.
(stack_protect_set_insn): New insn pattern.
(stack_protect_combined_test): New expander.
(stack_protect_combined_test_insn): New insn_and_split pattern.
(arm_stack_protect_test_insn): New insn pattern.
* config/arm/thumb1.md (thumb1_stack_protect_test_insn): New insn pattern.
* config/arm/unspecs.md (UNSPEC_SP_SET): New unspec.
(UNSPEC_SP_TEST): Likewise.
* doc/md.texi (stack_protect_combined_set): Document new standard
pattern name.
(stack_protect_set): Clarify that the operand for guard's address is
legal.
(stack_protect_combined_test): Document new standard pattern name.
(stack_protect_test): Clarify that the operand for guard's address is
legal.
gcc/testsuite/
PR target/85434
* gcc.target/arm/pr85434.c: New test.
The implementations of std::make_shared for -frtti and -fno-rtti are not
compatible, because they pass different arguments to
_Sp_counted_ptr_inplace::_M_get_deleter and so can't interoperate.
Either the argument doesn't match the expected value, and so the
shared_ptr::_M_ptr member is never set, or the type-punned reference is
treated as a real std::type_info object and gets dereferenced.
This patch removes the differences between -frtti and -fno-rtti, so that
typeid is never used, and the type-punned reference is used in both
cases. For backwards compatibility with existing code that passes
typeid(_Sp_make_shared_tag) that still needs to be handled, but only
after checking that the argument is not the type-punned reference (so
it's safe to treat as a real std::type_info object). The reference is
bound to an object of literal type, so that it doesn't need a guard
variable to make its initialization thread-safe.
This patch also fixes 87520 by ensuring that the type-punned reference
is bound to "a region of storage of suitable size and alignment to
contain an object of the reference's type" (as per the proposed
resolution of Core DR 453).
If all objects are built with the fixed version of GCC then -frtti and
-fno-rtti can be mixed freely and std::make_shared will work correctly.
If some objects are built with unfixed GCC versions then problems can
still arise, depending on which template instantiations are kept by the
linker.
PR libstdc++/85930
PR libstdc++/87520
* include/bits/shared_ptr_base.h (_Sp_make_shared_tag::_S_ti)
[__cpp_rtti]: Define even when RTTI is enabled. Use array of
sizeof(type_info) so that type-punned reference binds to an object
of the correct size as well as correct alignment.
(_Sp_counted_ptr_inplace::_M_get_deleter) [__cpp_rtti]: Check for
_S_ti() reference even when RTTI is enabled.
(__shared_ptr(_Sp_make_shared_tag, const _Alloc&, _Args&&...))
[__cpp_rtti]: Pass _S_ti() instead of typeid(_Sp_make_shared_tag).
Jakub Jelinek [Thu, 22 Nov 2018 09:48:43 +0000 (10:48 +0100)]
re PR target/85644 (-fstack-protector generates invalid read to %fs:0x0 on mac)
PR target/85644
PR target/86832
* config/i386/i386.c (ix86_option_override_internal): Default
ix86_stack_protector_guard to SSP_TLS only if TARGET_THREAD_SSP_OFFSET
is defined.
* config/i386/i386.md (stack_protect_set, stack_protect_set_<mode>,
stack_protect_test, stack_protect_test_<mode>): Use empty condition
instead of TARGET_SSP_TLS_GUARD.
Jakub Jelinek [Thu, 22 Nov 2018 09:26:29 +0000 (10:26 +0100)]
re PR c++/87386 (Error message for static_assert show wrong range)
PR c++/87386
* parser.c (cp_parser_operator): Use str.get_value () instead of just
str in USERDEF_LITERAL_VALUE and USERDEF_LITERAL_SUFFIX_ID arguments.
Janne Blomqvist [Thu, 22 Nov 2018 07:58:29 +0000 (09:58 +0200)]
Replace sync builtins with atomic builtins
The old __sync builtins have been deprecated for a long time now in
favor of the __atomic builtins following the C++11/C11 memory model.
This patch converts libgfortran to use the modern __atomic builtins.
At the same time I weakened the consistency to relaxed for
incrementing and decrementing the counter, and acquire-release when
decrementing to check whether the counter is 0 and the unit can be
freed. This is similar to e.g. std::shared_ptr in C++.
Regtested on x86_64-pc-linux-gnu.
libgfortran/ChangeLog:
2018-11-22 Janne Blomqvist <jb@gcc.gnu.org>
* acinclude.m4 (LIBGFOR_CHECK_ATOMIC_FETCH_ADD): Rename and test
presence of atomic builtins instead of sync builtins.
* configure.ac (LIBGFOR_CHECK_ATOMIC_FETCH_ADD): Call new test.
* io/io.h (inc_waiting_locked): Use __atomic_fetch_add.
(predec_waiting_locked): Use __atomic_add_fetch.
(dec_waiting_unlocked): Use __atomic_fetch_add.
* config.h.in: Regenerated.
* configure: Regenerated.
* Makefile.in: Regenerated.
Jakub Jelinek [Wed, 21 Nov 2018 22:41:07 +0000 (23:41 +0100)]
re PR c++/87386 (Error message for static_assert show wrong range)
PR c++/87386
* parser.c (cp_parser_primary_expression): Use
id_expression.get_location () instead of id_expr_token->location.
Adjust the range from id_expr_token->location to
id_expressio.get_finish ().
(cp_parser_operator_function_id): Pass location of the operator
token down to cp_parser_operator.
(cp_parser_operator): Add start_loc argument, always construct a
location with caret at start_loc and range from start_loc to the
finish of the last token.
gcc/testsuite/
* g++.dg/diagnostic/pr87386.C: New test.
* g++.dg/parse/error17.C: Adjust expected diagnostics.
libstdc++-v3/
* testsuite/20_util/scoped_allocator/69293_neg.cc: Adjust expected
line.
* testsuite/20_util/uses_allocator/cons_neg.cc: Likewise.
* testsuite/20_util/uses_allocator/69293_neg.cc: Likewise.
* testsuite/experimental/propagate_const/requirements2.cc: Likewise.
* testsuite/experimental/propagate_const/requirements3.cc: Likewise.
* testsuite/experimental/propagate_const/requirements4.cc: Likewise.
* testsuite/experimental/propagate_const/requirements5.cc: Likewise.
Jakub Jelinek [Wed, 21 Nov 2018 20:45:59 +0000 (21:45 +0100)]
re PR rtl-optimization/85925 (compilation of masking with 257 goes wrong in combine at -02)
PR rtl-optimization/85925
* gcc.c-torture/execute/20181120-1.c: Require effective target
int32plus.
(u): New variable.
(main): Compare d against u.f1 rather than 0x101. Use 0x4030201
instead of 0x10101.
Lokesh Janghel [Wed, 21 Nov 2018 20:09:56 +0000 (20:09 +0000)]
re PR target/85667 (ms_abi rules aren't followed when returning short structs with float values)
PR target/85667
* config/i386/i386.c (function_value_ms_64): Return AX_REG instead
of FIRST_SSE_REG for 4 or 8 byte modes.
testsuite/ChangeLog:
PR target/85667
* gcc.target/pr85667-1.c: New testcase.
* gcc.target/pr85667-2.c: New testcase.
* gcc.target/pr85667-3.c: New testcase.
* gcc.target/pr85667-4.c: New testcase.
Jonathan Wakely [Wed, 21 Nov 2018 18:40:55 +0000 (18:40 +0000)]
PR libstdc++/88111 Make maximum block size depend on size_t width
PR libstdc++/88111
* include/std/memory_resource (pool_options): Add Doxygen comments.
* src/c++17/memory_resource.cc (pool_sizes): Only use suitable values
on targets with 16-bit or 20-bit size_t type.
(munge_options): Make default values depend on width of size_t type.
Jonathan Wakely [Wed, 21 Nov 2018 18:40:37 +0000 (18:40 +0000)]
PR libstdc++/88113 use size_type consistently instead of size_t
On 16-bit msp430-elf size_t is either 16 bits or 20 bits, and so can't
represent all values of the uint32_t type used for bitset::size_type.
Using the smaller of size_t and uint32_t for size_type ensures it fits
in size_t.
PR libstdc++/88113
* src/c++17/memory_resource.cc (bitset::size_type): Use the smaller
of uint32_t and size_t.
(bitset::size(), bitset::free(), bitset::update_next_word())
(bitset::max_blocks_per_chunk(), bitset::max_word_index()): Use
size_type consistently instead of size_t.
(chunk): Adjust static_assert checking sizeof(chunk).
Jan Hubicka [Wed, 21 Nov 2018 17:32:19 +0000 (18:32 +0100)]
re PR ipa/87957 (ICE tree check: expected tree that contains ‘decl minimal’ structure, have ‘identifier_node’ in warn_odr, at ipa-devirt.c:1051 since r265519)
Jan Hubicka [Wed, 21 Nov 2018 17:31:19 +0000 (18:31 +0100)]
re PR ipa/87957 (ICE tree check: expected tree that contains ‘decl minimal’ structure, have ‘identifier_node’ in warn_odr, at ipa-devirt.c:1051 since r265519)
PR lto/87957
* tree.c (fld_decl_context): Break out from ...
(free_lang_data_in_decl): ... here; free TREE_PUBLIC, TREE_PRIVATE
DECL_ARTIFICIAL of TYPE_DECL; do not free TREE_TYPE of TYPE_DECL.
(fld_incomplete_type_of): Build copy of TYP_DECL.
* ipa-devirt.c (free_enum_values): Rename to ...
(free_odr_warning_data): ... this one; free also duplicated TYPE_DECLs
and TREE_TYPEs of TYPE_DECLs.
(get_odr_type): Initialize odr_vtable_hash if needed.
Alexandre Oliva [Wed, 21 Nov 2018 16:59:59 +0000 (16:59 +0000)]
compute discriminator info for overrides
In some cases of overriding or resetting locations, we might retain
discriminator info from earlier locations, when we should take
discriminator information from the overriding location or reset it.
for gcc/ChangeLog
* final.c (compute_discriminator): Declare. Renamed from...
(maybe_set_discriminator): ... this. Set and return a local.
(override_discriminator): New.
(final_scan_insn_1): Set it.
(notice_source_line): Adjust. Always set discriminator.
Renlin Li [Wed, 21 Nov 2018 14:29:19 +0000 (14:29 +0000)]
[PATCH][PR84877]Dynamically align the address for local parameter copy on the stack when required alignment is larger than MAX_SUPPORTED_STACK_ALIGNMENT
As described in PR84877. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84877
The local copy of parameter on stack is not aligned.
For BLKmode paramters, a local copy on the stack will be saved.
There are three cases:
1) arguments passed partially on the stack, partially via registers.
2) arguments passed fully on the stack.
3) arguments passed via registers.
After the change here, in all three cases, the stack slot for the local
parameter copy is aligned by the data type.
The stack slot is the DECL_RTL of the parameter. All the references thereafter
in the function will refer to this RTL.
To populate the local copy on the stack,
For case 1) and 2), there are operations to move data from the caller's stack
(from incoming rtl) into callee's stack.
For case 3), the registers are directly saved into the stack slot.
In all cases, the destination address is properly aligned.
But for case 1) and case 2), the source address is not aligned by the type.
It is defined by the PCS how the arguments are prepared.
The block move operation is fulfilled by emit_block_move (). As far as I can see,
it will use the smaller alignment of source and destination.
This looks fine as long as we don't use instructions which requires a strict
larger alignment than the address actually has.
Here, it only changes receiving parameters.
The function assign_stack_local_1 will be called in various places.
Usually, the caller will constraint the ALIGN parameter.
For example via STACK_SLOT_ALIGNMENT macro.
assign_parm_setup_block will call assign_stack_local () with alignment from the
parameter type which in this case could be
larger than MAX_SUPPORTED_STACK_ALIGNMENT.
The alignment operation for parameter copy on the stack is similar to stack vars.
First, enough space is reserved on the stack. The size is fixed at compile time.
Instructions are emitted to dynamically get an aligned address at runtime
within this piece of memory.
This will unavoidably increase the usage of stack. However, it really depends on
how many over-aligned parameters are passed by value.
gcc/
2018-11-21 Renlin Li <renlin.li@arm.com>
PR middle-end/84877
* explow.h (get_dynamic_stack_size): Declare it as external.
* explow.c (record_new_stack_level): Remove function static attribute.
* function.c (assign_stack_local_1): Dynamically align the stack slot
addr for parameter copy on the stack.
Jakub Jelinek [Wed, 21 Nov 2018 10:45:58 +0000 (11:45 +0100)]
re PR rtl-optimization/87817 (gcc.target/i386/bmi2-bzhi-2.c execution test)
PR rtl-optimization/87817
* config/i386/i386.md (bmi2_bzhi_<mode>3, *bmi2_bzhi_<mode>3,
*bmi2_bzhi_<mode>3_1, *bmi2_bzhi_<mode>3_1_ccz): Use IF_THEN_ELSE
in the pattern to avoid triggering UB when operands[2] is zero.
(tbm_bextri_<mode>): New expander. Renamed the old define_insn to ...
(*tbm_bextri_<mode>): ... this.
Jakub Jelinek [Wed, 21 Nov 2018 08:07:51 +0000 (09:07 +0100)]
lang.opt (fdec-include): New option.
* lang.opt (fdec-include): New option.
* options.c (set_dec_flags): Set also flag_dec_include.
* scanner.c (include_line): Change return type from bool to int.
In fixed form allow spaces in between include keyword letters.
For -fdec-include, allow in fixed form 0 in column 6. With
-fdec-include return -1 if the parsed line is not full include
statement and it could be successfully completed on continuation
lines.
(include_stmt): New function.
(load_file): Adjust include_line caller. If it returns -1, keep
trying include_stmt until it stops returning -1 whenever adding
further line of input.
* gfortran.dg/include_10.f: New test.
* gfortran.dg/include_10.inc: New file.
* gfortran.dg/include_11.f: New test.
* gfortran.dg/include_12.f: New test.
* gfortran.dg/include_13.f90: New test.
* gfortran.dg/gomp/include_1.f: New test.
* gfortran.dg/gomp/include_1.inc: New file.
* gfortran.dg/gomp/include_2.f90: New test.
Co-Authored-By: Mark Eggleston <mark.eggleston@codethink.com>
From-SVN: r266337
Andreas Krebbel [Wed, 21 Nov 2018 07:48:49 +0000 (07:48 +0000)]
S/390: Support vector load/store alignment hints
The IBM z14 POP adds an optional alignment operand to the vl, vst,
vlm, and vstm instruction (vector loads and stores). Vectors residing
on 8 or 16 byte boundaries might get loaded or stored faster on some
models given the instruction uses the proper hint operand. A wrong
hint will hurt performance though.
The attached testcase align-1 currently fails due to:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88085
gcc/ChangeLog:
2018-11-21 Andreas Krebbel <krebbel@linux.ibm.com>
* configure.ac: Add check for Binutils to determine whether vector
load/store alignments hints are being supported.
* config.in: Regenerate.
* configure: Regenerate.
* config/s390/s390.c (print_operand): Support new output
modifier A.
* config/s390/s390.md ("movti"): Append alignment hint output
using the new output modifier 'A'.
* config/s390/vector.md ("mov<mode>", "*vec_tf_to_v1tf")
("*vec_ti_to_v1ti"): Likewise.
gcc/testsuite/ChangeLog:
2018-11-21 Andreas Krebbel <krebbel@linux.ibm.com>
* gcc.target/s390/vector/align-1.c: New test.
* gcc.target/s390/vector/align-2.c: New test.
* c-c++-common/builtin-has-attribute-2.c: New test.
* c-c++-common/builtin-has-attribute-3.c: New test.
* c-c++-common/builtin-has-attribute-4.c: New test.
* c-c++-common/builtin-has-attribute.c: New test.
* gcc.dg/builtin-has-attribute.c: New test.
* gcc/testsuite/gcc.target/i386/builtin-has-attribute.c: New test.
Jan Hubicka [Wed, 21 Nov 2018 02:38:43 +0000 (03:38 +0100)]
re PR lto/84044 (Spurious -Wodr warning with -flto)
PR lto/84044
* ipa-devirt.c (odr_types_equivalent_p): Use operand_equal_p to
compare ENUM values.
* g++.dg/lto/odr-4_0.C: New testcase.
* g++.dg/lto/odr-4_1.C: New testcase.
Jakub Jelinek [Tue, 20 Nov 2018 22:23:12 +0000 (23:23 +0100)]
re PR c++/88110 (ICE (segfault) with -std=C++2a in cxx_eval_constant_expression when trying to evaluate nonoverridden "virtual ... = 0" function of a base class)
PR c++/88110
* constexpr.c (cxx_eval_constant_expression) <case OBJ_TYPE_REF>: Punt
if get_base_address of ADDR_EXPR operand is not a DECL_P.
Jakub Jelinek [Tue, 20 Nov 2018 20:44:38 +0000 (21:44 +0100)]
re PR tree-optimization/87895 (ICE in purge_dead_edges, at cfgrtl.c:3246)
PR tree-optimization/87895
* omp-simd-clone.c (ipa_simd_modify_function_body): When removing
or replacing GIMPLE_RETURN, set EDGE_FALLTHRU on the edge to EXIT.
(simd_clone_adjust): Don't set EDGE_FALLTHRU here. In a loop that
redirects edges to EXIT to edges to incr_bb, iterate while EXIT
has any preds and always use EDGE_PRED (, 0).
* gcc.dg/gomp/pr87895-1.c: New test.
* gcc.dg/gomp/pr87895-2.c: New test.
* gcc.dg/gomp/pr87895-3.c: New test.
Jan Hubicka [Tue, 20 Nov 2018 16:22:19 +0000 (17:22 +0100)]
re PR ipa/87957 (ICE tree check: expected tree that contains ‘decl minimal’ structure, have ‘identifier_node’ in warn_odr, at ipa-devirt.c:1051 since r265519)
PR lto/87957
* ipa-devirt.c (odr_subtypes_equivalent_p): Report ODR violation
when sybtype already violates ODR.
(get_odr_type): Do not ICE when insert is false and type duplicate
is not registered yet.
(register_odr_type): Be sure to register subtypes first.
Andreas Krebbel [Tue, 20 Nov 2018 16:19:54 +0000 (16:19 +0000)]
S/390: Fix flogr RTX.
The flogr instruction uses a 64 bit register pair target operand. In
the RTX we model this as a write to a TImode register. Unfortunately
the RTX's being assigned to the two parts of the target operand were
swapped. This is no problem if in the end the flogr instruction will
be emitted since the instruction still does what the clzdi expander
expects. However, a problem arises when the RTX is used to optimize
CLZ for a constant input operand. Even then it matters only if the
expression couldn't be folded on tree level already.
In the testcase this happened thanks to loop unrolling on RTL level.
The iteration variable is used as an argument to the clz
builtin. Due to the loop unrolling it becomes a constant and after
folding the broken RTX leads to a wrong assumption.
gcc/ChangeLog:
2018-11-20 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390.md ("clztidi2"): Swap the RTX's written to the
DImode parts of the target operand.
gcc/testsuite/ChangeLog:
2018-11-20 Andreas Krebbel <krebbel@linux.ibm.com>
Jan Hubicka [Tue, 20 Nov 2018 15:58:37 +0000 (15:58 +0000)]
re PR ipa/87706 (Inlined functions trigger invalid -Wmissing-profile warning)
PR ipa/87706
* ipa-fnsummary.c (pass_ipa_fnsummary): Do not remove functions
* ipa.c (possible_inline_candidate_p): Break out from ..
(process_references): ... here ; drop before_inlining_p;
cleanup handling of alises.
(walk_polymorphic_call_targets): Likewise.
(symbol_table::remove_unreachable_nodes): Likewise.
* passes.c (pass_data_ipa_remove_symbols): New structure.
(pass_ipa_remove_symbols): New pass.
(make_pass_ipa_remove_symbols): New function.
* tree-pass.h (make_pass_ipa_remove_symbols): Declare.
* passes.def (pass_ipa_remove_symbols): Schedule after early passes.