]> gcc.gnu.org Git - gcc.git/log
gcc.git
14 months agolibstdc++: Minor fixes for some warnings in <format>
Jonathan Wakely [Tue, 8 Aug 2023 15:29:17 +0000 (16:29 +0100)]
libstdc++: Minor fixes for some warnings in <format>

libstdc++-v3/ChangeLog:

* include/std/format: Fix some warnings.
(__format::__write(Ctx&, basic_string_view<CharT>)): Remove
unused function template.

14 months agoRISC-V: Support NPATTERNS = 1 stepped vector[PR110950]
Juzhe-Zhong [Wed, 9 Aug 2023 12:18:40 +0000 (20:18 +0800)]
RISC-V: Support NPATTERNS = 1 stepped vector[PR110950]

This patch fix ICE: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110950

0x1cf8939 expand_const_vector
        ../../../riscv-gcc/gcc/config/riscv/riscv-v.cc:1587

PR target/110950

gcc/ChangeLog:

* config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
stepped vector support.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/pr110950.c: New test.

14 months agoFortran: Allow pure final procs contained in pure proc. [PR109684]
Paul Thomas [Wed, 9 Aug 2023 11:04:09 +0000 (12:04 +0100)]
Fortran: Allow pure final procs contained in pure proc. [PR109684]

2023-08-09  Steve Kargl  <sgk@troutmask.apl.washington.edu>

gcc/fortran
PR fortran/109684
* resolve.cc (resolve_types): Exclude contained procedures with
the artificial attribute from test for pureness.

14 months agoPR modula2/110779: libgm2 fix solaris bootstrap check for tm_gmtoff
Gaius Mulley [Wed, 9 Aug 2023 08:35:13 +0000 (09:35 +0100)]
PR modula2/110779: libgm2 fix solaris bootstrap check for tm_gmtoff

This patch defensively checks for every C function and every struct
used in wrapclock.cc.  It adds return values to GetTimespec and
SetTimespec to allow the module to return a code representing
unavailable.

gcc/m2/ChangeLog:

PR modula2/110779
* gm2-libs-iso/SysClock.mod (GetClock): Test GetTimespec
return value.
(SetClock): Test SetTimespec return value.
* gm2-libs-iso/wrapclock.def (GetTimespec): Add integer
return type.
(SetTimespec): Add integer return type.

libgm2/ChangeLog:

PR modula2/110779
* config.h.in: Regenerate.
* configure: Regenerate.
* configure.ac (AC_CACHE_CHECK): Check for tm_gmtoff field in
struct tm.
(GM2_CHECK_LIB): Check for daylight, timezone and tzname.
* libm2iso/wrapclock.cc (timezone): Guard against absence of
struct tm and tm_gmtoff.
(daylight): Check for daylight.
(timezone): Check for timezone.
(isdst): Check for isdst.
(tzname): Check for tzname.
(GetTimeRealtime): Check for struct timespec.
(SetTimeRealtime): Check for struct timespec.
(InitTimespec): Check for struct timespec.
(KillTimespec): Check for struct timespec.
(SetTimespec): Check for struct timespec.
(GetTimespec): Check for struct timespec.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
14 months agoRename local variable subleaf_level to max_subleaf_level.
liuhongt [Wed, 9 Aug 2023 06:41:46 +0000 (14:41 +0800)]
Rename local variable subleaf_level to max_subleaf_level.

gcc/ChangeLog:

* common/config/i386/cpuinfo.h (get_available_features):
Rename local variable subleaf_level to max_subleaf_level.

14 months agortl-optimization/110587 - speedup find_hard_regno_for_1
Richard Biener [Tue, 25 Jul 2023 13:36:30 +0000 (15:36 +0200)]
rtl-optimization/110587 - speedup find_hard_regno_for_1

The following applies a micro-optimization to find_hard_regno_for_1,
re-ordering the check so we can easily jump-thread by using an else.
This reduces the time spent in this function by 15% for the testcase
in the PR.

PR rtl-optimization/110587
* lra-assigns.cc (find_hard_regno_for_1): Re-order checks.

14 months agors6000: Teach legitimate_address_p about LEN_{LOAD,STORE} [PR110248]
Kewen Lin [Wed, 9 Aug 2023 06:15:46 +0000 (01:15 -0500)]
rs6000: Teach legitimate_address_p about LEN_{LOAD,STORE} [PR110248]

This patch is to teach rs6000_legitimate_address_p to
handle the queried rtx constructed for LEN_{LOAD,STORE},
since lxvl and stxvl doesn't support x-form or ds-form,
so consider it as not legitimate when outer code is PLUS.

PR tree-optimization/110248

gcc/ChangeLog:

* config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
legitimate when outer code is PLUS.

14 months agoivopts: Call valid_mem_ref_p with ifn [PR110248]
Kewen Lin [Wed, 9 Aug 2023 05:41:52 +0000 (00:41 -0500)]
ivopts: Call valid_mem_ref_p with ifn [PR110248]

As PR110248 shows, to get the expected query results for
that internal functions LEN_{LOAD,STORE} is able to adopt
some addressing modes, we need to pass down the related
IFN code as well.  This patch is to make IVOPTs pass down
ifn code for USE_PTR_ADDRESS type uses, it adjusts the
related functions {strict_,}memory_address_addr_space_p,
and valid_mem_ref_p as well.

PR tree-optimization/110248

gcc/ChangeLog:

* recog.cc (memory_address_addr_space_p): Add one more argument ch of
type code_helper and pass it to targetm.addr_space.legitimate_address_p
instead of ERROR_MARK.
(offsettable_address_addr_space_p): Update one function pointer with
one more argument of type code_helper as its assignees
memory_address_addr_space_p and strict_memory_address_addr_space_p
have been adjusted, and adjust some call sites with ERROR_MARK.
* recog.h (tree.h): New include header file for tree_code ERROR_MARK.
(memory_address_addr_space_p): Adjust with one more unnamed argument
of type code_helper with default ERROR_MARK.
(strict_memory_address_addr_space_p): Likewise.
* reload.cc (strict_memory_address_addr_space_p): Add one unnamed
argument of type code_helper.
* tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
type code_helper and pass it to memory_address_addr_space_p.
* tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
one more unnamed argument of type code_helper with default value
ERROR_MARK.
* tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
by default, change it with ifn code for USE_PTR_ADDRESS type use, and
pass it to all valid_mem_ref_p calls.

14 months agotarghooks: Extend legitimate_address_p with code_helper [PR110248]
Kewen Lin [Wed, 9 Aug 2023 05:02:26 +0000 (00:02 -0500)]
targhooks: Extend legitimate_address_p with code_helper [PR110248]

As PR110248 shows, some middle-end passes like IVOPTs can
query the target hook legitimate_address_p with some
artificially constructed rtx to determine whether some
addressing modes are supported by target for some gimple
statement.  But for now the existing legitimate_address_p
only checks the given mode, it's unable to distinguish
some special cases unfortunately, for example, for LEN_LOAD
ifn on Power port, we would expand it with lxvl hardware
insn, which only supports one register to hold the address
(the other register is holding the length), that is we
don't support base (reg) + index (reg) addressing mode for
sure.  But hook legitimate_address_p only considers the
given mode which would be some vector mode for LEN_LOAD
ifn, and we do support base + index addressing mode for
normal vector load and store insns, so the hook will return
true for the query unexpectedly.

This patch is to introduce one extra argument of type
code_helper for hook legitimate_address_p, it makes targets
able to handle some special case like what's described
above.

PR tree-optimization/110248

gcc/ChangeLog:

* coretypes.h (class code_helper): Add forward declaration.
* doc/tm.texi: Regenerate.
* lra-constraints.cc (valid_address_p): Call target hook
targetm.addr_space.legitimate_address_p with an extra parameter
ERROR_MARK as its prototype changes.
* recog.cc (memory_address_addr_space_p): Likewise.
* reload.cc (strict_memory_address_addr_space_p): Likewise.
* target.def (legitimate_address_p, addr_space.legitimate_address_p):
Extend with one more argument of type code_helper, update the
documentation accordingly.
* targhooks.cc (default_legitimate_address_p): Adjust for the
new code_helper argument.
(default_addr_space_legitimate_address_p): Likewise.
* targhooks.h (default_legitimate_address_p): Likewise.
(default_addr_space_legitimate_address_p): Likewise.
* config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
with extra unnamed code_helper argument with default ERROR_MARK.
* config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
* config/arc/arc.cc (arc_legitimate_address_p): Likewise.
* config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
(tree.h): New include for tree_code ERROR_MARK.
* config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
unnamed code_helper argument with default ERROR_MARK.
* config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
* config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
* config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
* config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
* config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
(tree.h): New include for tree_code ERROR_MARK.
* config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
unnamed code_helper argument with default ERROR_MARK.
* config/csky/csky.cc (csky_legitimate_address_p): Likewise.
* config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
Likewise.
* config/frv/frv.cc (frv_legitimate_address_p): Likewise.
* config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
* config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
* config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
* config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
* config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
* config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
* config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
* config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
Likewise.
* config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
(m32c_addr_space_legitimate_address_p): Likewise.
* config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
* config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
* config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
* config/microblaze/microblaze-protos.h (tree.h): New include for
tree_code ERROR_MARK.
(microblaze_legitimate_address_p): Adjust with extra unnamed
code_helper argument with default ERROR_MARK.
* config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
Likewise.
* config/mips/mips.cc (mips_legitimate_address_p): Likewise.
* config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
* config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
* config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
* config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
(msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
argument with default ERROR_MARK and adjust the call to function
msp430_legitimate_address_p.
* config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
unnamed code_helper argument with default ERROR_MARK.
* config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
* config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
* config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
* config/pa/pa.cc (pa_legitimate_address_p): Likewise.
* config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
* config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
* config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
* config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
(tree.h): New include for tree_code ERROR_MARK.
* config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
extra unnamed code_helper argument with default ERROR_MARK.
* config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
(rs6000_debug_legitimate_address_p): Adjust with extra code_helper
argument and adjust the call to function rs6000_legitimate_address_p.
* config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
unnamed code_helper argument with default ERROR_MARK.
* config/s390/s390.cc (s390_legitimate_address_p): Likewise.
* config/sh/sh.cc (sh_legitimate_address_p): Likewise.
* config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
* config/v850/v850.cc (v850_legitimate_address_p): Likewise.
* config/vax/vax.cc (vax_legitimate_address_p): Likewise.
* config/visium/visium.cc (visium_legitimate_address_p): Likewise.
* config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
* config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
Likewise.
(tree.h): New include for tree_code ERROR_MARK.
* config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
Adjust with extra unnamed code_helper argument with default
ERROR_MARK.

14 months agoWorkaround possible CPUID bug in Sandy Bridge.
liuhongt [Fri, 4 Aug 2023 01:27:39 +0000 (09:27 +0800)]
Workaround possible CPUID bug in Sandy Bridge.

Don't access leaf 7 subleaf 1 unless subleaf 0 says it is
supported via EAX.

Intel documentation says invalid subleaves return 0. We had been
relying on that behavior instead of checking the max sublef number.

It appears that some Sandy Bridge CPUs return at least the subleaf 0
EDX value for subleaf 1. Best guess is that this is a bug in a
microcode patch since all of the bits we're seeing set in EDX were
introduced after Sandy Bridge was originally released.

This is causing avxvnniint16 to be incorrectly enabled with
-march=native on these CPUs.

gcc/ChangeLog:

* common/config/i386/cpuinfo.h (get_available_features): Check
EAX for valid subleaf before use CPUID.

14 months agoDaily bump.
GCC Administrator [Wed, 9 Aug 2023 00:16:57 +0000 (00:16 +0000)]
Daily bump.

14 months ago[committed] [RISC-V] Fix bug in condition canonicalization for zicond
Jeff Law [Tue, 8 Aug 2023 21:32:38 +0000 (15:32 -0600)]
[committed] [RISC-V] Fix bug in condition canonicalization for zicond

Vineet's glibc build triggered an ICE building glibc with the latest zicond
bits.  It's a minor issue in the canonicalization of the condition.

When we need to canonicalize the condition we use an SCC insn to handle the
primary comparison with the output going into a temporary with the final value
of 0/1 which we can then use in a zicond instruction.

The mode of the newly generated temporary was taken from mode of the final
destination.  That's simply wrong.  The mode of the condition needs to be
word_mode.

This patch fixes that minor problem and adds a suitable testcase.

gcc/
* config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
for the temporary when canonicalizing the condition.

gcc/testsuite
* gcc.target/riscv/zicond-ice-1.c: New test.

14 months agoc++: parser cleanup, remove dummy arguments
Marek Polacek [Mon, 31 Jul 2023 19:50:48 +0000 (15:50 -0400)]
c++: parser cleanup, remove dummy arguments

Now that cp_parser_constant_expression accepts a null non_constant_p,
we can transitively remove dummy arguments in the call chain.

Running dg.exp and counting the # of is_rvalue_constant_expression calls
from cp_parser_constant_expression:
pre-r14-2800: 2,459,145
this patch  : 1,719,454

gcc/cp/ChangeLog:

* parser.cc (cp_parser_postfix_expression): Adjust the call to
cp_parser_braced_list.
(cp_parser_postfix_open_square_expression): Likewise.
(cp_parser_new_initializer): Likewise.
(cp_parser_assignment_expression): Adjust the call to
cp_parser_initializer_clause.
(cp_parser_lambda_introducer): Adjust the call to cp_parser_initializer.
(cp_parser_range_for): Adjust the call to cp_parser_braced_list.
(cp_parser_jump_statement): Likewise.
(cp_parser_mem_initializer): Likewise.
(cp_parser_template_argument): Likewise.
(cp_parser_default_argument): Adjust the call to cp_parser_initializer.
(cp_parser_initializer): Handle null is_direct_init and non_constant_p
arguments.
(cp_parser_initializer_clause): Handle null non_constant_p argument.
(cp_parser_braced_list): Likewise.
(cp_parser_initializer_list): Likewise.
(cp_parser_member_declaration): Adjust the call to
cp_parser_initializer_clause and cp_parser_initializer.
(cp_parser_yield_expression): Adjust the call to cp_parser_braced_list.
(cp_parser_functional_cast): Likewise.
(cp_parser_late_parse_one_default_arg): Adjust the call to
cp_parser_initializer.
(cp_parser_omp_for_loop_init): Likewise.
(cp_parser_omp_declare_reduction_exprs): Likewise.

14 months agoc++: Report invalid id-expression in decltype [PR100482]
Nathaniel Shead [Tue, 8 Aug 2023 02:48:43 +0000 (12:48 +1000)]
c++: Report invalid id-expression in decltype [PR100482]

This patch ensures that any errors raised by finish_id_expression when
parsing a decltype expression are properly reported, rather than
potentially going ignored and causing invalid code to be accepted.

We can also now remove the separate check for templates without args as
this is also checked for in finish_id_expression.

PR c++/100482

gcc/cp/ChangeLog:

* parser.cc (cp_parser_decltype_expr): Report errors raised by
finish_id_expression.

gcc/testsuite/ChangeLog:

* g++.dg/cpp0x/decltype-100482.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
14 months agobpf: Fixed GC mistakes in BPF builtins code.
Cupertino Miranda [Tue, 8 Aug 2023 10:12:00 +0000 (11:12 +0100)]
bpf: Fixed GC mistakes in BPF builtins code.

This patches fixes problems with GC within the CO-RE builtins
implementation.
List of included headers was also revised.

gcc/ChangeLog:

* config/bpf/core-builtins.cc: Cleaned include headers.
(struct cr_builtins): Added GTY.
(cr_builtins_ref): Created.
(builtins_data) Changed to GC root.
(allocate_builtin_data): Changed.
Included gt-core-builtins.h.
* config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
(bpf_core_extra_ref): Created.
(bpf_comment_info): Changed to GC root.
(bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.

14 months agoi386: Do not sanitize upper part of V2SFmode reg with -fno-trapping-math [PR110832]
Uros Bizjak [Tue, 8 Aug 2023 16:53:51 +0000 (18:53 +0200)]
i386: Do not sanitize upper part of V2SFmode reg with -fno-trapping-math [PR110832]

Also introduce -m[no-]partial-vector-fp-math option to disable trapping
V2SF named patterns in order to avoid generation of partial vector V4SFmode
trapping instructions.

The new option is enabled by default, because even with sanitization,
a small but consistent speed up of 2 to 3% with Polyhedron capacita
benchmark can be achieved vs. scalar code.

Using -fno-trapping-math improves Polyhedron capacita runtime 8 to 9%
vs. scalar code.  This is what clang does by default, as it defaults
to -fno-trapping-math.

PR target/110832

gcc/ChangeLog:

* config/i386/i386.opt (mpartial-vector-fp-math): New option.
* config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
upper part of V2SFmode register with -fno-trapping-math.
(<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
(divv2sf3): Ditto.
(<smaxmin:code>v2sf3): Ditto.
(sqrtv2sf2): Ditto.
(*mmx_haddv2sf3_low): Ditto.
(*mmx_hsubv2sf3_low): Ditto.
(vec_addsubv2sf3): Ditto.
(vec_cmpv2sfv2si): Ditto.
(vcond<V2FI:mode>v2sf): Ditto.
(fmav2sf4): Ditto.
(fmsv2sf4): Ditto.
(fnmav2sf4): Ditto.
(fnmsv2sf4): Ditto.
(fix_truncv2sfv2si2): Ditto.
(fixuns_truncv2sfv2si2): Ditto.
(floatv2siv2sf2): Ditto.
(floatunsv2siv2sf2): Ditto.
(nearbyintv2sf2): Ditto.
(rintv2sf2): Ditto.
(lrintv2sfv2si2): Ditto.
(ceilv2sf2): Ditto.
(lceilv2sfv2si2): Ditto.
(floorv2sf2): Ditto.
(lfloorv2sfv2si2): Ditto.
(btruncv2sf2): Ditto.
(roundv2sf2): Ditto.
(lroundv2sfv2si2): Ditto.
* doc/invoke.texi (x86 Options): Document
-mpartial-vector-fp-math option.

gcc/testsuite/ChangeLog:

* gcc.target/i386/pr110832-1.c: New test.
* gcc.target/i386/pr110832-2.c: New test.
* gcc.target/i386/pr110832-3.c: New test.

14 months agoVR-VALUES [PR28794]: optimize compare assignments also
Andrew Pinski [Mon, 7 Aug 2023 07:05:21 +0000 (00:05 -0700)]
VR-VALUES [PR28794]: optimize compare assignments also

This patch fixes the oldish (2006) bug where VRP was not
optimizing the comparison for assignments while handling
them for GIMPLE_COND only.
It just happens to also solves PR 103281 due to allowing
to optimize `c < 1` to `c == 0` and then we get
`(c == 0) == c` (which was handled by r14-2501-g285c9d04).

OK? Bootstrapped and tested on x86_64-linux-gnu with no
regressions.

PR tree-optimization/103281
PR tree-optimization/28794

gcc/ChangeLog:

* vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
majority to ...
(simplify_using_ranges::simplify_compare_using_ranges_1): Here.
(simplify_using_ranges::simplify_casted_cond): Rename to ...
(simplify_using_ranges::simplify_casted_compare): This
and change arguments to take op0 and op1.
(simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
(simplify_using_ranges::simplify): For tcc_comparison assignments call
simplify_compare_assign_using_ranges_1.
* vr-values.h (simplify_using_ranges): Add
new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
Rename simplify_casted_cond and simplify_casted_compare and
update argument types.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/pr103281-1.c: New test.
* gcc.dg/tree-ssa/vrp-compare-1.c: New test.

14 months agoRISC-V: Enhance the test case for RVV vfsub/vfrsub rounding
Pan Li [Wed, 2 Aug 2023 07:59:24 +0000 (15:59 +0800)]
RISC-V: Enhance the test case for RVV vfsub/vfrsub rounding

This patch would like to enhance the vfsub/vfrsub rounding API test for
below 2 purposes.

* The non-rm API has no frm related insn generated.
* The rm API has the frm backup/restore/set insn generated.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/float-point-single-rsub.c: Enhance
cases.
* gcc.target/riscv/rvv/base/float-point-single-sub.c: Ditto.
Signed-off-by: Pan Li <pan2.li@intel.com>
14 months agogenmatch: Log line numbers indirectly
Andrzej Turko [Mon, 7 Aug 2023 09:59:01 +0000 (11:59 +0200)]
genmatch: Log line numbers indirectly

Currently fprintf calls logging to a dump file take line numbers
in the match.pd file directly as arguments.
When match.pd is edited, referenced code changes line numbers,
which causes changes to many fprintf calls and, thus, to many
(usually all) .cc files generated by genmatch. This forces make
to (unnecessarily) rebuild many .o files.

This change replaces those logging fprintf calls with calls to
a dedicated logging function. Because it reads the line numbers
from the lookup table, it is enough to pass a corresponding index.
Thanks to this, when match.pd changes, it is enough to rebuild
the file containing the lookup table and, of course, those
actually affected by the change.

Signed-off-by: Andrzej Turko <andrzej.turko@gmail.com>
gcc/ChangeLog:

* genmatch.cc: Log line numbers indirectly.

14 months agogenmatch: Reduce variability of generated code
Andrzej Turko [Mon, 7 Aug 2023 09:59:00 +0000 (11:59 +0200)]
genmatch: Reduce variability of generated code

So far genmatch has been using an unordered map to store information about
functions to be generated. Since corresponding locations from match.pd were
used as keys in the map, even small changes to match.pd which caused
line number changes would change the order in which the functions are
generated. This would reshuffle the functions between the generated .cc files.
This way even a minimal modification to match.pd forces recompilation of all
object files originating from match.pd on rebuild.

This commit makes sure that functions are generated in the order of their
processing (in contrast to the random order based on hashes of their
locations in match.pd). This is done by replacing the unordered map with an
ordered one. This way small changes to match.pd does not cause function
renaming and reshuffling among generated source files.
Together with the subsequent change to logging fprintf calls, this
removes unnecessary changes to the files generated by genmatch allowing
for reuse of already built object files during rebuild. The aim is to
make editing of match.pd and subsequent testing easier.

Signed-off-by: Andrzej Turko <andrzej.turko@gmail.com>
gcc/ChangeLog:

* genmatch.cc: Make sinfo map ordered.
* Makefile.in: Require the ordered map header for genmatch.o.

14 months agoSupport get_or_insert in ordered_hash_map
Andrzej Turko [Mon, 7 Aug 2023 09:58:59 +0000 (11:58 +0200)]
Support get_or_insert in ordered_hash_map

Get_or_insert method is already supported by the unordered hash map.
Adding it to the ordered map enables us to replace the unordered map
with the ordered one in cases where ordering may be useful.

Signed-off-by: Andrzej Turko <andrzej.turko@gmail.com>
gcc/ChangeLog:

* ordered-hash-map.h: Add get_or_insert.
* ordered-hash-map-tests.cc: Use get_or_insert in tests.

14 months agoRISC-V: Support CALL conditional autovec patterns
Juzhe-Zhong [Thu, 3 Aug 2023 01:58:35 +0000 (09:58 +0800)]
RISC-V: Support CALL conditional autovec patterns

This patch is depending on middle-end patch on vectorizable_call.

Consider this following case:
void foo (float * __restrict a, float * __restrict b, int * __restrict cond, int n)
{
  for (int i = 0; i < n; i++)
    if (cond[i])
      a[i] = b[i] + a[i];
}

Before this patch (**NO** -ffast-math):
<source>:5:21: missed: couldn't vectorize loop
<source>:5:21: missed: not vectorized: control flow in loop.

After this patch:
foo:
ble a3,zero,.L5
mv a6,a0
.L3:
vsetvli a5,a3,e8,mf4,ta,ma
vle32.v v0,0(a2)
vsetvli a7,zero,e32,m1,ta,ma
slli a4,a5,2
vmsne.vi v0,v0,0
sub a3,a3,a5
vsetvli zero,a5,e32,m1,tu,mu    ------> must be TUMU
vle32.v v2,0(a0),v0.t
vle32.v v1,0(a1),v0.t
vfadd.vv v1,v1,v2,v0.t   ------> generated by COND_LEN_ADD with real mask and len.
vse32.v v1,0(a6),v0.t
add a2,a2,a4
add a1,a1,a4
add a0,a0,a4
add a6,a6,a4
bne a3,zero,.L3
.L5:
ret

gcc/ChangeLog:

* config/riscv/autovec.md (cond_<optab><mode>): New pattern.
(cond_len_<optab><mode>): Ditto.
(cond_fma<mode>): Ditto.
(cond_len_fma<mode>): Ditto.
(cond_fnma<mode>): Ditto.
(cond_len_fnma<mode>): Ditto.
(cond_fms<mode>): Ditto.
(cond_len_fms<mode>): Ditto.
(cond_fnms<mode>): Ditto.
(cond_len_fnms<mode>): Ditto.
* config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
global.
(enum insn_type): Add new enum type.
(prepare_ternary_operands): New function.
* config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
(emit_nonvlmax_tumu_insn): Ditto.
(emit_nonvlmax_fp_tumu_insn): Ditto.
(expand_cond_len_binop): Add condtional operations.
(expand_cond_len_ternop): Ditto.
(prepare_ternary_operands): New function.
* config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
riscv_get_v_regno_alignment as global scope.
* config/riscv/vector.md: Fix ternary bugs.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/rvv.exp: Add condition tests.
* gcc.target/riscv/rvv/autovec/cond/cond_arith-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_arith-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_arith-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_arith-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_arith-5.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_arith-6.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_arith-7.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_arith-8.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_arith-9.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_arith_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_arith_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_arith_run-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_arith_run-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_arith_run-5.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_arith_run-6.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_arith_run-7.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_arith_run-8.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_arith_run-9.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fadd-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fadd-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fadd-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fadd-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fadd_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fadd_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fadd_run-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fadd_run-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-5.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-6.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-7.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-8.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma_run-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma_run-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma_run-5.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma_run-6.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma_run-7.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma_run-8.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax_run-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax_run-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin_run-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin_run-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-5.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-6.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms_run-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms_run-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms_run-5.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms_run-6.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmul-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmul-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmul-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmul-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmul_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmul_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmul_run-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_fmul_run-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_logical-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_logical-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_logical-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_logical-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_logical-5.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_run-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_run-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_run-5.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_shift-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_shift-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_shift-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_shift-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_shift-5.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_shift-6.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_shift-7.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_shift-8.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_shift-9.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_shift_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_shift_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_shift_run-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_shift_run-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_shift_run-5.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_shift_run-6.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_shift_run-7.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_shift_run-8.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_shift_run-9.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_call-1.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_call-2.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_call-3.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_call-4.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_call-5.c: New test.

14 months agotree-optimization/49955 - BB reduction with odd number of lanes
Richard Biener [Mon, 7 Aug 2023 12:44:20 +0000 (14:44 +0200)]
tree-optimization/49955 - BB reduction with odd number of lanes

The following enhances BB reduction vectorization to support
vectorizing only a subset of the lanes, keeping the rest as
scalar ops.  For now we try to make the number of lanes even
by leaving alone the "last" lane.  That's because SLP discovery
with all lanes will fail too soon to get us any hint on which
lane to strip and likewise we don't know what vector modes the
target supports so restricting ourselves to power-of-two or
other cases isn't easy.

This is enough to get at the vectorization opportunity for the
testcase in the PR - albeit with the chosen lanes not optimal
but at least vectorizable.

PR tree-optimization/49955
* tree-vectorizer.h (_slp_instance::remain_stmts): New.
(SLP_INSTANCE_REMAIN_STMTS): Likewise.
* tree-vect-slp.cc (vect_free_slp_instance): Release
SLP_INSTANCE_REMAIN_STMTS.
(vect_build_slp_instance): Make the number of lanes of
a BB reduction even.
(vectorize_slp_instance_root_stmt): Handle unvectorized
defs of a BB reduction.

* gfortran.dg/vect/pr49955.f: New testcase.

14 months agoVECT: Support CALL vectorization for COND_LEN_*
Ju-Zhe Zhong [Mon, 7 Aug 2023 09:38:12 +0000 (17:38 +0800)]
VECT: Support CALL vectorization for COND_LEN_*

Hi, Richard and Richi.

Base on the suggestions from Richard:
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/625396.html

This patch choose (1) approach that Richard provided, meaning:

RVV implements cond_* optabs as expanders.  RVV therefore supports
both IFN_COND_ADD and IFN_COND_LEN_ADD.  No dummy length arguments
are needed at the gimple level.

Such approach can make codes much cleaner and reasonable.

Consider this following case:
void foo (float * __restrict a, float * __restrict b, int * __restrict cond, int n)
{
  for (int i = 0; i < n; i++)
    if (cond[i])
      a[i] = b[i] + a[i];
}

Output of RISC-V (32-bits) gcc (trunk) (Compiler #3)
<source>:5:21: missed: couldn't vectorize loop
<source>:5:21: missed: not vectorized: control flow in loop.

ARM SVE:

...
mask__27.10_51 = vect__4.9_49 != { 0, ... };
...
vec_mask_and_55 = loop_mask_49 & mask__27.10_51;
...
vect__9.17_62 = .COND_ADD (vec_mask_and_55, vect__6.13_56, vect__8.16_60, vect__6.13_56);

For RVV, we want IR as follows:

...
_68 = .SELECT_VL (ivtmp_66, POLY_INT_CST [4, 4]);
...
mask__27.10_51 = vect__4.9_49 != { 0, ... };
...
vect__9.17_60 = .COND_LEN_ADD (mask__27.10_51, vect__6.13_55, vect__8.16_59, vect__6.13_55, _68, 0);
...

Both len and mask of COND_LEN_ADD are real not dummy.

This patch has been fully tested in RISC-V port with supporting both COND_* and COND_LEN_*.

And also, Bootstrap and Regression on X86 passed.

OK for trunk?

gcc/ChangeLog:

* internal-fn.cc (get_len_internal_fn): New function.
(DEF_INTERNAL_COND_FN): Ditto.
(DEF_INTERNAL_SIGNED_COND_FN): Ditto.
* internal-fn.h (get_len_internal_fn): Ditto.
* tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.

14 months agotree-optimization/110924 - fix vop liveness for noreturn const CFG parts
Richard Biener [Tue, 8 Aug 2023 10:46:42 +0000 (12:46 +0200)]
tree-optimization/110924 - fix vop liveness for noreturn const CFG parts

The virtual operand live problem used by sinking assumes we have
virtual uses at each end point of the CFG but as shown in the PR
this isn't true for parts for example ending in __builtin_unreachable.
The following removes the optimization made possible by this and
now requires marking backedges.

PR tree-optimization/110924
* tree-ssa-live.h (virtual_operand_live): Update comment.
* tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
optimization, look at each predecessor.
* tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.

* gcc.dg/torture/pr110924.c: New testcase.

14 months agoRISC-V: Fix a bug that causes an error insn.
yulong [Tue, 8 Aug 2023 04:12:32 +0000 (12:12 +0800)]
RISC-V: Fix a bug that causes an error insn.

I test the following rvv intrinsics.
vint64m1_t test_vslide1up_vx_i64m1_m(vbool64_t mask, vint64m1_t src, int64_t value, size_t vl) {
  return __riscv_vslide1up_vx_i64m1_m(mask, src, value, vl);
}
And I got an error info,t hat is error:
  unrecognizable insn:(insn 17 16 18 2
    (set (reg:RVVMIDI 134 [ _1 ])(if_then_else:RVVMIDI
      (unspec:RVVMF64BI [(reg/v:SI 142 [ vl ])(const_int 2 [x2])(const_int 日 [o])(reg:SI 66 vl)(reg:SI 67 vtype)] UNSPEC_VPREDICATE
   (vec_merge:RVVMIDI (reg:RVVMIDI 134 [ _1 ])(unspec:RVVMIDI [(reg:sI 日 zero)] UNSPEC_VUNDEF)
   (reg/v:RVVMF64BI 137 [ mask ]))
   (unspec:RVVM1DI[(reg:sI 日 zero)] UNSPEC_VUNDEF)))

This patch fix it.

gcc/ChangeLog:

* config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/vslide1down-1.c: New test.
* gcc.target/riscv/rvv/base/vslide1down-2.c: New test.
* gcc.target/riscv/rvv/base/vslide1down-3.c: New test.
* gcc.target/riscv/rvv/base/vslide1up-1.c: New test.
* gcc.target/riscv/rvv/base/vslide1up-2.c: New test.
* gcc.target/riscv/rvv/base/vslide1up-3.c: New test.

14 months agortl-optimization/110869 Fix tests cmp-mem-const-*.c for sparc
Stefan Schulze Frielinghaus [Tue, 8 Aug 2023 06:53:12 +0000 (08:53 +0200)]
rtl-optimization/110869 Fix tests cmp-mem-const-*.c for sparc

This fixes the rather new tests cmp-mem-const-{1,2,3,4,5,6}.c for sparc.
For -1 and -2 we need at least optimization level 2 on sparc.  For the
sake of homogeneity, change all test cases to -O2.  For -3 and -4 we do
not end up with a comparison of memory and a constant, and finally for
-5 and -6 the constants are reduced by a prior optimization which means
there is nothing left to do.  Thus excluding sparc from those tests.

gcc/testsuite/ChangeLog:

PR rtl-optimization/110869
* gcc.dg/cmp-mem-const-1.c: Use optimization level 2.
* gcc.dg/cmp-mem-const-2.c: Dito.
* gcc.dg/cmp-mem-const-3.c: Exclude sparc from this test.
* gcc.dg/cmp-mem-const-4.c: Dito.
* gcc.dg/cmp-mem-const-5.c: Dito.
* gcc.dg/cmp-mem-const-6.c: Dito.

14 months agoRISC-V: Support neg VLS auto-vectorization
Juzhe-Zhong [Tue, 8 Aug 2023 03:06:24 +0000 (11:06 +0800)]
RISC-V: Support neg VLS auto-vectorization

#include "riscv_vector.h"

#define DEF_OP_V(PREFIX, NUM, TYPE, OP)                                        \
  void __attribute__ ((noinline, noclone))                                     \
  PREFIX##_##TYPE##NUM (TYPE *restrict a, TYPE *restrict b)                    \
  {                                                                            \
    for (int i = 0; i < NUM; ++i)                                              \
      a[i] = OP b[i];                                                          \
  }

DEF_OP_V (neg, 16, int32_t, -)

After this patch:

neg_int32_t16:
vsetivli zero,16,e32,mf2,ta,ma
vle32.v v1,0(a1)
vneg.v v1,v1
vse32.v v1,0(a0)
ret

gcc/ChangeLog:

* config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
* config/riscv/vector.md: Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vls/def.h: Ditto.
* gcc.target/riscv/rvv/autovec/vls/neg-1.c: New test.

14 months agoRISC-V: Support VLS shift vectorization
Juzhe-Zhong [Tue, 8 Aug 2023 01:33:05 +0000 (09:33 +0800)]
RISC-V: Support VLS shift vectorization

After this patch, this following case will be well optimized:

  void __attribute__ ((noinline, noclone))                                     \
  PREFIX##_##TYPE##NUM (TYPE *restrict a, TYPE *restrict b, TYPE *restrict c)  \
  {                                                                            \
    for (int i = 0; i < NUM; ++i)                                              \
      a[i] = b[i] OP c[i];                                                     \
  }

DEF_OP_VV (shift, 16, int32_t, >>)

ASM:
shift_int32_t16:
vsetivli zero,16,e32,mf2,ta,ma
vle32.v v1,0(a1)
vle32.v v2,0(a2)
vsra.vv v1,v1,v2
vse32.v v1,0(a0)
ret

gcc/ChangeLog:

* config/riscv/autovec.md: Add VLS shift.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vls/def.h: Add VLS shift.
* gcc.target/riscv/rvv/autovec/vls/shift-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/shift-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/shift-3.c: New test.
* gcc.target/riscv/rvv/autovec/vls/shift-4.c: New test.
* gcc.target/riscv/rvv/autovec/vls/shift-5.c: New test.
* gcc.target/riscv/rvv/autovec/vls/shift-6.c: New test.

14 months agoDaily bump.
GCC Administrator [Tue, 8 Aug 2023 00:17:37 +0000 (00:17 +0000)]
Daily bump.

14 months agoRISC-V: Support VLS basic operation auto-vectorization
Juzhe-Zhong [Mon, 7 Aug 2023 09:27:15 +0000 (17:27 +0800)]
RISC-V: Support VLS basic operation auto-vectorization

This patch support VLS modes auto-vectorization to enhance VLA auto-vectorization
when niters is known.

Consider this following case:

  void __attribute__ ((noinline, noclone))                                     \
  PREFIX##_##TYPE##NUM (TYPE *__restrict a, TYPE *__restrict b, TYPE *__restrict c)  \
  {                                                                            \
    for (int i = 0; i < NUM; ++i)                                              \
      a[i] = b[i] OP c[i];                                                     \
  }

DEF_OP_VV (plus, 16, int8_t, +)

Before this patch:

plus_int8_t16(signed char*, signed char*, signed char*):
        li      a5,16
        csrr    a4,vlenb
        bleu    a5,a4,.L2
        mv      a5,a4
.L2:
        vsetvli zero,a5,e8,m1,ta,ma
        vle8.v  v2,0(a1)
        vle8.v  v1,0(a2)
        vsetvli a4,zero,e8,m1,ta,ma
        vadd.vv v1,v1,v2
        vsetvli zero,a5,e8,m1,ta,ma
        vse8.v  v1,0(a0)
        ret

After this patch:

plus_int8_t16:
vsetivli zero,16,e8,m1,ta,ma
vle8.v v1,0(a2)
vle8.v v2,0(a1)
vadd.vv v1,v1,v2
vse8.v v1,0(a0)
ret

gcc/ChangeLog:

* config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
* config/riscv/vector-iterators.md: Ditto.
* config/riscv/vector.md: Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vls/def.h: Add basic operations.
* gcc.target/riscv/rvv/autovec/vls/and-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/and-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/and-3.c: New test.
* gcc.target/riscv/rvv/autovec/vls/div-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/ior-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/ior-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/ior-3.c: New test.
* gcc.target/riscv/rvv/autovec/vls/max-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/min-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/minus-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/minus-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/minus-3.c: New test.
* gcc.target/riscv/rvv/autovec/vls/mod-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/mult-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/plus-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/plus-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/plus-3.c: New test.

14 months agolibstdc++: Fix incorrect use of abs and log10 in std::format [PR110860]
Jonathan Wakely [Mon, 7 Aug 2023 14:30:03 +0000 (15:30 +0100)]
libstdc++: Fix incorrect use of abs and log10 in std::format [PR110860]

The std::formatter implementation for floating-point types uses
__builtin_abs and __builtin_log10 to avoid including all of <cmath>, but
those functions are not generic. The result of abs(2e304) is -INT_MIN
which is undefined, and then log10(INT_MIN) is NaN. As well as being
undefined, we fail to grow the buffer correctly, and then loop more
times than needed to allocate a buffer and try formatting the value into
it again.

We can use if-constexpr to choose the correct form of log10 to use for
the type, and avoid using abs entirely. This avoids the undefined
behaviour and should mean we only reallocate and retry std::to_chars
once.

libstdc++-v3/ChangeLog:

PR libstdc++/110860
* include/std/format (__formatter_fp::format): Do not use
__builtin_abs and __builtin_log10 with arbitrary floating-point
types.

14 months agolibstdc++: Constrain __format::_Iter_sink for contiguous iterators [PR110917]
Jonathan Wakely [Mon, 7 Aug 2023 13:37:25 +0000 (14:37 +0100)]
libstdc++: Constrain __format::_Iter_sink for contiguous iterators [PR110917]

We can't write to a span<_CharT> if the contiguous iterator has a value
type that isn't _CharT.

libstdc++-v3/ChangeLog:

PR libstdc++/110917
* include/std/format (__format::_Iter_sink<CharT, OutIter>):
Constrain partial specialization for contiguous iterators to
require the value type to be CharT.
* testsuite/std/format/functions/format_to.cc: New test.

14 months agoi386: Fix grammar typo in diagnostic
Jonathan Wakely [Mon, 7 Aug 2023 10:19:23 +0000 (11:19 +0100)]
i386: Fix grammar typo in diagnostic

gcc/ChangeLog:

* config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.

14 months agolibstdc++: Fix past-the-end increment in std::format [PR110862]
Jonathan Wakely [Thu, 3 Aug 2023 07:45:43 +0000 (08:45 +0100)]
libstdc++: Fix past-the-end increment in std::format [PR110862]

At the end of a replacement field we should check that the closing brace
is actually present before incrementing past it.

libstdc++-v3/ChangeLog:

PR libstdc++/110862
* include/std/format (_Scanner::_M_on_replacement_field):
Check for expected '}' before incrementing iterator.
* testsuite/std/format/string.cc: Check "{0:{0}" format string.

14 months agotoplevel: Makefile.def: add install-strip dependency on libsframe
Indu Bhagat [Thu, 19 Jan 2023 07:17:49 +0000 (23:17 -0800)]
toplevel: Makefile.def: add install-strip dependency on libsframe

As noted in PR libsframe/30014 - FTBFS: install-strip fails because
bfdlib relinks and fails to find libsframe, the install time
dependencies of libbfd need to be updated.

ChangeLog:

* Makefile.def: Reflect that libsframe needs to installed before
libbfd.  Reorder a bit to better track libsframe dependencies.
* Makefile.in: Regenerate.

14 months agobfd: linker: merge .sframe sections
Indu Bhagat [Tue, 15 Nov 2022 23:07:04 +0000 (15:07 -0800)]
bfd: linker: merge .sframe sections

The linker merges all the input .sframe sections.  When merging, the
linker verifies that all the input .sframe sections have the same
abi/arch.

The linker uses libsframe library to perform key actions on the
.sframe sections - decode, read, and create output data.  This
implies buildsystem changes to make and install libsframe before
libbfd.

The linker places the output .sframe section in a new segment of its
own: PT_GNU_SFRAME.  A new segment is not added, however, if the
generated .sframe section is empty.

When a section is discarded from the final link, the corresponding
entries in the .sframe section for those functions are also deleted.

The linker sorts the SFrame FDEs on start address by default and sets
the SFRAME_F_FDE_SORTED flag in the .sframe section.

This patch also adds support for generation of SFrame unwind
information for the .plt* sections on x86_64.  SFrame unwind info is
generated for IBT enabled PLT, lazy/non-lazy PLT.

The existing linker option --no-ld-generated-unwind-info has been
adapted to include the control of whether .sframe unwind information
will be generated for the linker generated sections like PLT.

Changes to the linker script have been made as necessary.

ChangeLog:

* Makefile.def: Add install dependency on libsframe for libbfd.
* Makefile.in: Regenerated.

14 months agolibtool.m4: augment symcode for Solaris 11
Nick Alcock [Mon, 27 Sep 2021 19:31:21 +0000 (20:31 +0100)]
libtool.m4: augment symcode for Solaris 11

This reports common symbols like GNU nm, via a type code of 'C'.

ChangeLog:

* libtool.m4 (lt_cv_sys_global_symbol_pipe): Augment symcode for
Solaris 11.

gcc/ChangeLog:

* configure: Regenerate.

libatomic/ChangeLog:

* configure: Regenerate.

libbacktrace/ChangeLog:

* configure: Regenerate.

libcc1/ChangeLog:

* configure: Regenerate.

libffi/ChangeLog:

* configure: Regenerate.

libgfortran/ChangeLog:

* configure: Regenerate.

libgm2/ChangeLog:

* configure: Regenerate.

libgomp/ChangeLog:

* configure: Regenerate.

libitm/ChangeLog:

* configure: Regenerate.

libobjc/ChangeLog:

* configure: Regenerate.

libphobos/ChangeLog:

* configure: Regenerate.

libquadmath/ChangeLog:

* configure: Regenerate.

libsanitizer/ChangeLog:

* configure: Regenerate.

libssp/ChangeLog:

* configure: Regenerate.

libstdc++-v3/ChangeLog:

* configure: Regenerate.

libvtv/ChangeLog:

* configure: Regenerate.

lto-plugin/ChangeLog:

* configure: Regenerate.

zlib/ChangeLog:

* configure: Regenerate.

14 months agoPKG_CHECK_MODULES: Properly check if $pkg_cv_[]$1[]_LIBS works
H.J. Lu [Tue, 28 Jul 2020 13:59:20 +0000 (06:59 -0700)]
PKG_CHECK_MODULES: Properly check if $pkg_cv_[]$1[]_LIBS works

There is no need to check $pkg_cv_[]$1[]_LIBS works if package check
failed.

config/ChangeLog:

* pkg.m4 (PKG_CHECK_MODULES): Use AC_TRY_LINK only if
$pkg_failed = no.

14 months agoPKG_CHECK_MODULES: Check if $pkg_cv_[]$1[]_LIBS works
H.J. Lu [Tue, 28 Jul 2020 10:50:10 +0000 (03:50 -0700)]
PKG_CHECK_MODULES: Check if $pkg_cv_[]$1[]_LIBS works

It is quite normal to have headers without library on multilib OSes.
Add AC_TRY_LINK to PKG_CHECK_MODULES to check if $pkg_cv_[]$1[]_LIBS
works.

config/ChangeLog:

* pkg.m4 (PKG_CHECK_MODULES): Add AC_TRY_LINK to check if
$pkg_cv_[]$1[]_LIBS works.

14 months agoDeprecate a.out support for NetBSD targets.
John Ericson [Wed, 11 Aug 2021 12:17:54 +0000 (13:17 +0100)]
Deprecate a.out support for NetBSD targets.

As discussed previously, a.out support is now quite deprecated, and in
some cases removed, in both Binutils itself and NetBSD, so this legacy
default makes little sense. `netbsdelf*` and `netbsdaout*` still work
allowing the user to be explicit about there choice. Additionally, the
configure script warns about the change as Nick Clifton requested.

One possible concern was the status of NetBSD on NS32K, where only a.out
was supported. But per [1] NetBSD has removed support, and if it were to
come back, it would be with ELF. The binutils implementation is
therefore marked obsolete, per the instructions in the last message.

With that patch and this one applied, I have confirmed the following:

--target=i686-unknown-netbsd
--target=i686-unknown-netbsdelf
  builds completely

--target=i686-unknown-netbsdaout
  properly fails because target is deprecated.

--target=vax-unknown-netbsdaout builds completely except for gas, where
the target is deprecated.

[1]: https://mail-index.netbsd.org/tech-toolchain/2021/07/19/msg004025.html

config/ChangeLog:

* picflag.m4: Simplify SHmedia NetBSD match by presuming ELF.

gcc/ChangeLog:

* configure: Regenerate.

libada/ChangeLog:

* configure: Regenerate.

libgcc/ChangeLog:

* configure: Regenerate.

libiberty/ChangeLog:

* configure: Regenerate.

14 months agoPR27116, Spelling errors found by Debian style checker
Alan Modra [Fri, 1 Jan 2021 03:51:52 +0000 (14:21 +1030)]
PR27116, Spelling errors found by Debian style checker

config/ChangeLog:

* override.m4: Correct comment grammar.

14 months agoegrep in binutils
Alan Modra [Wed, 28 Sep 2022 04:07:31 +0000 (13:37 +0930)]
egrep in binutils

Apparently some distros have a nagging egrep that helpfully tells you
egrep is deprecated and to use "grep -E".  The nag message causes a ld
testsuite failure.  What's more the advice isn't that good.  The "-E"
flag may not be available with older versions of grep.

This patch fixes bare invocation of egrep within binutils, replacing
it with the autoconf $EGREP or with grep.

config/ChangeLog:

* lib-ld.m4 (AC_LIB_PROG_LD_GNU): Require AC_PROG_EGREP and
invoke $EGREP.
(AC_LIB_PROG_LD): Likewise.

gcc/ChangeLog:

* configure: Regenerate.

intl/ChangeLog:

* configure: Regenerate.

libcpp/ChangeLog:

* configure: Regenerate.

libgcc/ChangeLog:

* configure: Regenerate.

libstdc++-v3/ChangeLog:

* configure: Regenerate.

14 months agoAdd support for the haiku operating system
Alexander von Gluck IV [Thu, 2 Sep 2021 11:19:14 +0000 (12:19 +0100)]
Add support for the haiku operating system

These are the os support patches we have been grooming and maintaining
for quite a few years over on git.haiku-os.org.  All of these
architectures are working and most have been stable for quite some time.

ChangeLog:

* configure: Regenerate.
* configure.ac: Add Haiku to list of ELF OSes
* libtool.m4: Update sys_lib_dlsearch_path_spec on Haiku.

gcc/ChangeLog:

* configure: Regenerate.

libatomic/ChangeLog:

* configure: Regenerate.

libbacktrace/ChangeLog:

* configure: Regenerate.

libcc1/ChangeLog:

* configure: Regenerate.

libffi/ChangeLog:

* configure: Regenerate.

libgfortran/ChangeLog:

* configure: Regenerate.

libgm2/ChangeLog:

* configure: Regenerate.

libgomp/ChangeLog:

* configure: Regenerate.

libitm/ChangeLog:

* configure: Regenerate.

libobjc/ChangeLog:

* configure: Regenerate.

libphobos/ChangeLog:

* configure: Regenerate.

libquadmath/ChangeLog:

* configure: Regenerate.

libsanitizer/ChangeLog:

* configure: Regenerate.

libssp/ChangeLog:

* configure: Regenerate.

libstdc++-v3/ChangeLog:

* configure: Regenerate.

libvtv/ChangeLog:

* configure: Regenerate.

lto-plugin/ChangeLog:

* configure: Regenerate.

zlib/ChangeLog:

* configure: Regenerate.

14 months agolibtool.m4: fix the NM="/nm/over/here -B/option/with/path" case
Nick Alcock [Fri, 3 Dec 2021 16:33:25 +0000 (16:33 +0000)]
libtool.m4: fix the NM="/nm/over/here -B/option/with/path" case

My previous nm patch handled all cases but one -- if the user set NM in
the environment to a path which contained an option, libtool's nm
detection tries to run nm against a copy of nm with the options in it:
e.g. if NM was set to "nm --blargle", and nm was found in /usr/bin, the
test would try to run "/usr/bin/nm --blargle /usr/bin/nm --blargle".
This is unlikely to be desirable: in this case we should run
"/usr/bin/nm --blargle /usr/bin/nm".

Furthermore, as part of this nm has to detect when the passed-in $NM
contains a path, and in that case avoid doing a path search itself.
This too was thrown off if an option contained something that looked
like a path, e.g. NM="nm -B../prev-gcc"; libtool then tries to run
"nm -B../prev-gcc nm" which rarely works well (and indeed it looks
to see whether that nm exists, finds it doesn't, and wrongly concludes
that nm -p or whatever does not work).

Fix all of these by clipping all options (defined as everything
including and after the first " -") before deciding whether nm
contains a path (but not using the clipped value for anything else),
and then removing all options from the path-modified nm before
looking to see whether that nm existed.

NM=my-nm now does a path search and runs e.g.
  /usr/bin/my-nm -B /usr/bin/my-nm

NM=/usr/bin/my-nm now avoids a path search and runs e.g.
  /usr/bin/my-nm -B /usr/bin/my-nm

NM="my-nm -p../wombat" now does a path search and runs e.g.
  /usr/bin/my-nm -p../wombat -B /usr/bin/my-nm

NM="../prev-binutils/new-nm -B../prev-gcc" now avoids a path search:
  ../prev-binutils/my-nm -B../prev-gcc -B ../prev-binutils/my-nm

This seems to be all combinations, including those used by GCC bootstrap
(which, before this commit, fails to bootstrap when configured
--with-build-config=bootstrap-lto, because the lto plugin is now using
--export-symbols-regex, which requires libtool to find a working nm,
while also using -B../prev-gcc to point at the lto plugin associated
with the GCC just built.)

Regenerate all affected configure scripts.

ChangeLog:

* libtool.m4 (LT_PATH_NM): Handle user-specified NM with
options, including options containing paths.

gcc/ChangeLog:

* configure: Regenerate.

libatomic/ChangeLog:

* configure: Regenerate.

libbacktrace/ChangeLog:

* configure: Regenerate.

libcc1/ChangeLog:

* configure: Regenerate.

libffi/ChangeLog:

* configure: Regenerate.

libgfortran/ChangeLog:

* configure: Regenerate.

libgm2/ChangeLog:

* configure: Regenerate.

libgomp/ChangeLog:

* configure: Regenerate.

libitm/ChangeLog:

* configure: Regenerate.

libobjc/ChangeLog:

* configure: Regenerate.

libphobos/ChangeLog:

* configure: Regenerate.

libquadmath/ChangeLog:

* configure: Regenerate.

libsanitizer/ChangeLog:

* configure: Regenerate.

libssp/ChangeLog:

* configure: Regenerate.

libstdc++-v3/ChangeLog:

* configure: Regenerate.

libvtv/ChangeLog:

* configure: Regenerate.

lto-plugin/ChangeLog:

* configure: Regenerate.

zlib/ChangeLog:

* configure: Regenerate.

14 months agolibtool.m4: fix nm BSD flag detection
Nick Alcock [Mon, 27 Sep 2021 19:31:21 +0000 (20:31 +0100)]
libtool.m4: fix nm BSD flag detection

Libtool needs to get BSD-format (or MS-format) output out of the system
nm, so that it can scan generated object files for symbol names for
-export-symbols-regex support.  Some nms need specific flags to turn on
BSD-formatted output, so libtool checks for this in its AC_PATH_NM.
Unfortunately the code to do this has a pair of interlocking flaws:

 - it runs the test by doing an nm of /dev/null.  Some platforms
   reasonably refuse to do an nm on a device file, but before now this
   has only been worked around by assuming that the error message has a
   specific textual form emitted by Tru64 nm, and that getting this
   error means this is Tru64 nm and that nm -B would work to produce
   BSD-format output, even though the test never actually got anything
   but an error message out of nm -B.  This is fixable by nm'ing *nm
   itself* (since we necessarily have a path to it).

 - the test is entirely skipped if NM is set in the environment, on the
   grounds that the user has overridden the test: but the user cannot
   reasonably be expected to know that libtool wants not only nm but
   also flags forcing BSD-format output.  Worse yet, one such "user" is
   the top-level Cygnus configure script, which neither tests for
   nor specifies any BSD-format flags.  So platforms needing BSD-format
   flags always fail to set them when run in a Cygnus tree, breaking
   -export-symbols-regex on such platforms.  Libtool also needs to
   augment $LD on some platforms, but this is done unconditionally,
   augmenting whatever the user specified: the nm check should do the
   same.

   One wrinkle: if the user has overridden $NM, a path might have been
   provided: so we use the user-specified path if there was one, and
   otherwise do the path search as usual.  (If the nm specified doesn't
   work, this might lead to a few extra pointless path searches -- but
   the test is going to fail anyway, so that's not a problem.)

(Tested with NM unset, and set to nm, /usr/bin/nm, my-nm where my-nm is a
symlink to /usr/bin/nm on the PATH, and /not-on-the-path/my-nm where
*that* is a symlink to /usr/bin/nm.)

ChangeLog:

* libtool.m4 (LT_PATH_NM): Try BSDization flags with a user-provided
NM, if there is one.  Run nm on itself, not on /dev/null, to avoid
errors from nms that refuse to work on non-regular files.  Remove
other workarounds for this problem.  Strip out blank lines from the
nm output.

fixincludes/ChangeLog:

* configure: Regenerate.

gcc/ChangeLog:

* configure: Regenerate.

libatomic/ChangeLog:

* configure: Regenerate.

libbacktrace/ChangeLog:

* configure: Regenerate.

libcc1/ChangeLog:

* configure: Regenerate.

libffi/ChangeLog:

* configure: Regenerate.

libgfortran/ChangeLog:

* configure: Regenerate.

libgm2/ChangeLog:

* configure: Regenerate.

libgomp/ChangeLog:

* configure: Regenerate.

libitm/ChangeLog:

* configure: Regenerate.

libobjc/ChangeLog:

* configure: Regenerate.

libphobos/ChangeLog:

* configure: Regenerate.

libquadmath/ChangeLog:

* configure: Regenerate.

libsanitizer/ChangeLog:

* configure: Regenerate.

libssp/ChangeLog:

* configure: Regenerate.

libstdc++-v3/ChangeLog:

* configure: Regenerate.

libvtv/ChangeLog:

* configure: Regenerate.

lto-plugin/ChangeLog:

* configure: Regenerate.

zlib/ChangeLog:

* configure: Regenerate.

14 months agoconfigure: reinstate 32b PA-RISC HP-UX target in toplevel
Arsen Arsenović [Wed, 2 Aug 2023 14:09:29 +0000 (16:09 +0200)]
configure: reinstate 32b PA-RISC HP-UX target in toplevel

The Binutils still support this target.

ChangeLog:

* configure.ac: Reinstate 32b PA-RISC HP-UX targets
* configure: Regenerate.

14 months agoPass PKG_CONFIG_PATH down from top-level Makefile
Simon Marchi [Fri, 8 Apr 2022 14:56:41 +0000 (10:56 -0400)]
Pass PKG_CONFIG_PATH down from top-level Makefile

[Sending to binutils, gdb-patches and gcc-patches, since it touches the
top-level Makefile/configure]

I have my debuginfod library installed in a non-standard location
(/opt/debuginfod), which requires me to set
PKG_CONFIG_PATH=/opt/debuginfod/lib/pkg-config.  If I just set it during
configure:

    $ PKG_CONFIG_PATH=/opt/debuginfod/lib/pkg-config ./configure --with-debuginfod
    $ make

or

    $ ./configure --with-debuginfod PKG_CONFIG_PATH=/opt/debuginfod/lib/pkg-config
    $ make

Then PKG_CONFIG_PATH is only present (and ignored) during the top-level
configure.  When running make (which runs gdb's and binutils'
configure), PKG_CONFIG_PATH is not set, which results in their configure
script not finding the library:

    checking for libdebuginfod >= 0.179... no
    configure: error: "--with-debuginfod was given, but libdebuginfod is missing or unusable."

Change the top-level configure/Makefile system to capture the value
passed when configuring the top-level and pass it down to
subdirectories (similar to CFLAGS, LDFLAGS, etc).

I don't know much about the top-level build system, so I really don't
know if I did this correctly.  The changes are:

 - Use AC_SUBST(PKG_CONFIG_PATH) in configure.ac, so that
   @PKG_CONFIG_PATH@ gets replaced with the actual PKG_CONFIG_PATH value
   in config files (i.e. Makefile)
 - Add a PKG_CONFIG_PATH Makefile variable in Makefile.tpl, initialized
   to @PKG_CONFIG_PATH@
 - Add PKG_CONFIG_PATH to HOST_EXPORTS in Makefile.tpl, which are the
   variables set when running the sub-configures

I initially added PKG_CONFIG_PATH to flags_to_pass, in Makefile.def, but
I don't think it's needed.  AFAIU, this defines the flags to pass down
when calling "make" in subdirectories.  We only need PKG_CONFIG_PATH to
be passed down during configure.  After that, it's captured in
gdb/config.status, so even if a "make" causes a re-configure later
(because gdb/configure has changed, for example), the PKG_CONFIG_PATH
value will be remembered.

Change-Id: I91138dfca41c43b05e53e445f62e4b27882536bf

ChangeLog:

* configure.ac: Add AC_SUBST(PKG_CONFIG_PATH).
* configure: Re-generate.
* Makefile.tpl (HOST_EXPORTS): Pass PKG_CONFIG_PATH.
(PKG_CONFIG_PATH): New.
* Makefile.in: Re-generate.

14 months agoDisable year 2038 support on 32-bit hosts by default
Luis Machado [Mon, 25 Jul 2022 23:17:38 +0000 (00:17 +0100)]
Disable year 2038 support on 32-bit hosts by default

With a recent import of gnulib, code has been pulled that tests and enables
64-bit time_t by default on 32-bit hosts that support it.

Although gdb can use the gnulib support, bfd doesn't use gnulib and currently
doesn't do these checks.

As a consequence, if we have a 32-bit host that supports 64-bit time_t, we'll
have a mismatch between gdb's notion of time_t and bfd's notion of time_t.

This will lead to mismatches in the struct stat size, leading to memory
corruption and crashes.

This patch disables the year 2038 check for now, which makes things work
reliably again.

I'd consider this a temporary fix until we have proper bfd checks for the year
2038, if it makes sense.  64-bit hosts seems to be more common these days, so
I'm not sure how important it is to have this support enabled and how soon
we want to enable it.

Thoughts?

ChangeLog:

* configure.ac: Disable year2038 by default on 32-bit hosts.
* configure: Regenerate.

14 months agogprofng: a new GNU profiler
Vladimir Mezentsev [Fri, 11 Mar 2022 08:58:31 +0000 (08:58 +0000)]
gprofng: a new GNU profiler

ChangeLog:

* Makefile.def: Add gprofng module.
* configure.ac: Add --enable-gprofng option.
* Makefile.in: Regenerate.
* configure: Regenerate.

include/ChangeLog:

* collectorAPI.h: New file.
* libcollector.h: New file.
* libfcollector.h: New file.

14 months agoadd --enable-default-compressed-debug-sections-algorithm configure option
Martin Liska [Mon, 3 Oct 2022 07:42:20 +0000 (09:42 +0200)]
add --enable-default-compressed-debug-sections-algorithm configure option

ChangeLog:

* configure.ac: Add --enable-default-compressed-debug-sections-algorithm.
* configure: Regenerate.

14 months agoconfigure: require libzstd >= 1.4.0
Christophe Lyon [Fri, 4 Nov 2022 10:06:47 +0000 (11:06 +0100)]
configure: require libzstd >= 1.4.0

gas uses ZSTD_compressStream2 which is only available with libzstd >=
1.4.0, leading to build errors when an older version is installed.

This patch updates the check libzstd presence to check its version is
>= 1.4.0. However, since gas seems to be the only component requiring
such a recent version this may imply that we disable ZSTD support for
all components although some would still benefit from an older
version.

I ran 'autoreconf -f' in all directories containing a configure.ac
file, using vanilla autoconf-2.69 and automake-1.15.1. I noticed
several errors from autoheader in readline, as well as warnings in
intl, but they are unrelated to this patch.

This should fix some of the buildbots.

OK for trunk?

Thanks,

Christophe

config/ChangeLog:

* zstd.m4: Add minimum version requirement of 1.4.0.

14 months agobinutils, gdb: support zstd compressed debug sections
Fangrui Song [Tue, 27 Sep 2022 02:50:13 +0000 (19:50 -0700)]
binutils, gdb: support zstd compressed debug sections

PR29397 PR29563: Add new configure option --with-zstd which defaults to
auto.  If pkgconfig/libzstd.pc is found, define HAVE_ZSTD and support
zstd compressed debug sections for most tools.

* bfd: for addr2line, objdump --dwarf, gdb, etc
* gas: support --compress-debug-sections=zstd
* ld: support ELFCOMPRESS_ZSTD input and --compress-debug-sections=zstd
* objcopy: support ELFCOMPRESS_ZSTD input for
  --decompress-debug-sections and --compress-debug-sections=zstd
* gdb: support ELFCOMPRESS_ZSTD input.  The bfd change references zstd
  symbols, so gdb has to link against -lzstd in this patch.

If zstd is not supported, ELFCOMPRESS_ZSTD input triggers an error.  We
can avoid HAVE_ZSTD if binutils-gdb imports zstd/ like zlib/, but this
is too heavyweight, so don't do it for now.

```
% ld/ld-new a.o
ld/ld-new: a.o: section .debug_abbrev is compressed with zstd, but BFD is not built with zstd support
...

% ld/ld-new a.o --compress-debug-sections=zstd
ld/ld-new: --compress-debug-sections=zstd: ld is not built with zstd support

% binutils/objcopy --compress-debug-sections=zstd a.o b.o
binutils/objcopy: --compress-debug-sections=zstd: binutils is not built with zstd support

% binutils/objcopy b.o --decompress-debug-sections
binutils/objcopy: zstd.o: section .debug_abbrev is compressed with zstd, but BFD is not built with zstd support
...
```

config/ChangeLog:

* zstd.m4: New file.

ChangeLog:
* configure: Regenerate.
* configure.ac: Add --with-zstd.

14 months agotoplevel: Recover tilegx/tilepro targets
Arsen Arsenović [Sat, 29 Jul 2023 18:29:13 +0000 (20:29 +0200)]
toplevel: Recover tilegx/tilepro targets

These are still supported in Binutils.

ChangeLog:

* configure: Regenerate.
* configure.ac: Recover tilegx/tilepro targets.

14 months agoGCC: Check if AR works with --plugin and rc
H.J. Lu [Tue, 12 Jan 2021 00:26:39 +0000 (16:26 -0800)]
GCC: Check if AR works with --plugin and rc

AR from older binutils doesn't work with --plugin and rc:

[hjl@gnu-cfl-2 bin]$ touch foo.c
[hjl@gnu-cfl-2 bin]$ ar --plugin /usr/libexec/gcc/x86_64-redhat-linux/10/liblto_plugin.so rc libfoo.a foo.c
[hjl@gnu-cfl-2 bin]$ ./ar --plugin /usr/libexec/gcc/x86_64-redhat-linux/10/liblto_plugin.so rc libfoo.a foo.c
./ar: no operation specified
[hjl@gnu-cfl-2 bin]$ ./ar --version
GNU ar (Linux/GNU Binutils) 2.29.51.0.1.20180112
Copyright (C) 2018 Free Software Foundation, Inc.
This program is free software; you may redistribute it under the terms of
the GNU General Public License version 3 or (at your option) any later version.
This program has absolutely no warranty.
[hjl@gnu-cfl-2 bin]$

Check if AR works with --plugin and rc before passing --plugin to AR and
RANLIB.

ChangeLog:

* configure: Regenerated.
* libtool.m4 (_LT_CMD_OLD_ARCHIVE): Check if AR works with
--plugin and rc before enabling --plugin.

config/ChangeLog:

* gcc-plugin.m4 (GCC_PLUGIN_OPTION): Check if AR works with
--plugin and rc before enabling --plugin.

gcc/ChangeLog:

* configure: Regenerate.

libatomic/ChangeLog:

* configure: Regenerate.

libbacktrace/ChangeLog:

* configure: Regenerate.

libcc1/ChangeLog:

* configure: Regenerate.

libffi/ChangeLog:

* configure: Regenerate.

libgfortran/ChangeLog:

* configure: Regenerate.

libgm2/ChangeLog:

* configure: Regenerate.

libgomp/ChangeLog:

* configure: Regenerate.

libiberty/ChangeLog:

* configure: Regenerate.

libitm/ChangeLog:

* configure: Regenerate.

libobjc/ChangeLog:

* configure: Regenerate.

libphobos/ChangeLog:

* configure: Regenerate.

libquadmath/ChangeLog:

* configure: Regenerate.

libsanitizer/ChangeLog:

* configure: Regenerate.

libssp/ChangeLog:

* configure: Regenerate.

libstdc++-v3/ChangeLog:

* configure: Regenerate.

libvtv/ChangeLog:

* configure: Regenerate.

lto-plugin/ChangeLog:

* configure: Regenerate.

zlib/ChangeLog:

* configure: Regenerate.

14 months agoSync with binutils: GCC: Pass --plugin to AR and RANLIB
H.J. Lu [Sat, 13 Nov 2021 14:11:41 +0000 (06:11 -0800)]
Sync with binutils: GCC: Pass --plugin to AR and RANLIB

Sync with binutils for building binutils with LTO:

50ad1254d50 GCC: Pass --plugin to AR and RANLIB

Detect GCC LTO plugin.  Pass --plugin to AR and RANLIB to support LTO
build.

ChangeLog:

* Makefile.tpl (AR): Add @AR_PLUGIN_OPTION@
(RANLIB): Add @RANLIB_PLUGIN_OPTION@.
* configure.ac: Include config/gcc-plugin.m4.
AC_SUBST AR_PLUGIN_OPTION and RANLIB_PLUGIN_OPTION.
* libtool.m4 (_LT_CMD_OLD_ARCHIVE): Pass --plugin to AR and
RANLIB if possible.
* Makefile.in: Regenerated.
* configure: Likewise.

config/ChangeLog:

* gcc-plugin.m4 (GCC_PLUGIN_OPTION): New.

libiberty/ChangeLog:

* Makefile.in (AR): Add @AR_PLUGIN_OPTION@
(RANLIB): Add @RANLIB_PLUGIN_OPTION@.
(configure_deps): Depend on ../config/gcc-plugin.m4.
* configure.ac: AC_SUBST AR_PLUGIN_OPTION and
RANLIB_PLUGIN_OPTION.
* aclocal.m4: Regenerated.
* configure: Likewise.

zlib/ChangeLog:

* configure: Regenerated.

gcc/ChangeLog:

* configure: Regenerate.

libatomic/ChangeLog:

* configure: Regenerate.

libbacktrace/ChangeLog:

* configure: Regenerate.

libcc1/ChangeLog:

* configure: Regenerate.

libffi/ChangeLog:

* configure: Regenerate.

libgfortran/ChangeLog:

* configure: Regenerate.

libgm2/ChangeLog:

* configure: Regenerate.

libgomp/ChangeLog:

* configure: Regenerate.

libitm/ChangeLog:

* configure: Regenerate.

libobjc/ChangeLog:

* configure: Regenerate.

libphobos/ChangeLog:

* configure: Regenerate.

libquadmath/ChangeLog:

* configure: Regenerate.

libsanitizer/ChangeLog:

* configure: Regenerate.

libssp/ChangeLog:

* configure: Regenerate.

libstdc++-v3/ChangeLog:

* configure: Regenerate.

libvtv/ChangeLog:

* configure: Regenerate.

lto-plugin/ChangeLog:

* configure: Regenerate.

14 months agogcc-4.5 build fixes
Alan Modra [Mon, 15 May 2023 13:23:21 +0000 (22:53 +0930)]
gcc-4.5 build fixes

Trying to build binutils with an older gcc currently fails.  Working
around these gcc bugs is not onerous so let's fix them.

include/ChangeLog:

* xtensa-dynconfig.h (xtensa_isa_internal): Delete unnecessary
forward declaration.

14 months agoPR29961, plugin-api.h: "Could not detect architecture endianess"
Alan Modra [Mon, 15 May 2023 13:02:32 +0000 (22:32 +0930)]
PR29961, plugin-api.h: "Could not detect architecture endianess"

Found when attempting to build binutils on sparc sunos-5.8 where
sys/byteorder.h defines _BIG_ENDIAN but not any of the BYTE_ORDER
variants.  This patch adds the extra tests to cope with the old
machine, and tidies the header a little.

include/ChangeLog:

* plugin-api.h: When handling non-gcc or gcc < 4.6.0 include
necessary header files before testing macros.  Make more use
of #elif.  Test _LITTLE_ENDIAN and _BIG_ENDIAN in final tests.

14 months agotoplevel: Substitute GDCFLAGS instead of using CFLAGS
Arsen Arsenović [Sat, 5 Aug 2023 13:02:06 +0000 (15:02 +0200)]
toplevel: Substitute GDCFLAGS instead of using CFLAGS

r14-2875-g1ed21e23d6d4da ("Use substituted GDCFLAGS") already
implemented this change, but only on the generated file rather than in
the template it is generated from.

ChangeLog:

* Makefile.tpl: Substitute @GDCFLAGS@ instead of using
$(CFLAGS).

14 months ago[committed][RISC-V]Don't reject constants in cmov condition
Jeff Law [Mon, 7 Aug 2023 20:34:40 +0000 (14:34 -0600)]
[committed][RISC-V]Don't reject constants in cmov condition

This test is too aggressive.  Constants have VOIDmode, so we need to let the
through this phase of conditional move support.

Fixes several missed conditional moves with the trunk.

gcc/
* config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
VOIDmode operands to conditional before canonicalization.

14 months agocprop_hardreg: Allow propagation of stack pointer in more cases.
Manolis Tsamis [Mon, 7 Aug 2023 10:10:16 +0000 (12:10 +0200)]
cprop_hardreg: Allow propagation of stack pointer in more cases.

The stack pointer propagation fix 736f8fd3 turned out to be more
restrictive than needed by rejecting propagation of the stack pointer
when REG_POINTER didn't match.

This commit removes this check:
  When the stack pointer is propagated it is fine for this to result in
  REG_POINTER becoming true from false, which is what the original code
  checked.

This simplification makes the previously introduced function
maybe_copy_reg_attrs obsolete and the logic can be inlined at the call
sites, as it was before 736f8fd3.

gcc/ChangeLog:

* regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
(find_oldest_value_reg): Inline stack_pointer_rtx check.
(copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.

14 months agoMAINTAINERS: Add myself as a BPF port reviewer
David Faust [Mon, 7 Aug 2023 17:17:48 +0000 (10:17 -0700)]
MAINTAINERS: Add myself as a BPF port reviewer

ChangeLog:

* MAINTAINERS: Add the BPF port to my reviewer listing.

14 months agoipa-sra: Don't consider CLOBBERS as writes preventing splitting
Martin Jambor [Mon, 7 Aug 2023 17:13:41 +0000 (19:13 +0200)]
ipa-sra: Don't consider CLOBBERS as writes preventing splitting

When IPA-SRA detects whether a parameter passed by reference is
written to, it does not special case CLOBBERs which means it often
bails out unnecessarily, especially when dealing with C++ destructors.
Fixed by the obvious continue in the two relevant loops and by adding
a simple function that marks the clobbers in the transformation code
as statements to be removed.

gcc/ChangeLog:

2023-08-04  Martin Jambor  <mjambor@suse.cz>

PR ipa/110378
* ipa-param-manipulation.h (class ipa_param_body_adjustments): New
members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
* ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
(ptr_parm_has_nonarg_uses): Likewise.
* ipa-param-manipulation.cc
(ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
(ipa_param_body_adjustments::mark_dead_statements): Move initial
checks to get_ddef_if_exists_and_is_used.
(ipa_param_body_adjustments::mark_clobbers_dead): New.
(ipa_param_body_adjustments::common_initialization): Call
mark_clobbers_dead when splitting.

gcc/testsuite/ChangeLog:

2023-07-31  Martin Jambor  <mjambor@suse.cz>

PR ipa/110378
* g++.dg/ipa/pr110378-1.C: New test.

14 months ago[committed] [RISC-V] Handle more cases in riscv_expand_conditional_move
Raphael Zinsly [Mon, 7 Aug 2023 14:26:24 +0000 (10:26 -0400)]
[committed] [RISC-V] Handle more cases in riscv_expand_conditional_move

As I've mentioned in the main zicond thread, Ventana has had patches
that support more cases by first emitting a suitable scc instruction
essentially as a canonicalization step of the condition for zicond.

For example if we have

(set (target) (if_then_else (op (reg1) (reg2))
                            (true_value)
                            (false_value)))

The two register comparison isn't handled by zicond directly.  But we
can generate something like this instead

(set (temp) (op (reg1) (reg2)))
(set (target) (if_then_else (op (temp) (const_int 0))
                            (true_value)
                            (false_value)

Then let the remaining code from Xiao handle the true_value/false_value
to make sure it's zicond compatible.

This is primarily Raphael's work.  My involvement has been mostly to
move it from its original location (in the .md file) into the expander
function and fix minor problems with the FP case.

gcc/
* config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
as an argument and pass it to riscv_emit_int_order_test.
(riscv_expand_conditional_move): Handle cases where the condition
is not EQ/NE or the second argument to the conditional is not
(const_int 0).
* config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.

Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
14 months agoMATCH: [PR109959] `(uns <= 1) & uns` could be optimized to `uns == 1`
Andrew Pinski [Sun, 6 Aug 2023 20:57:35 +0000 (13:57 -0700)]
MATCH: [PR109959] `(uns <= 1) & uns` could be optimized to `uns == 1`

I noticed while looking into some code generation of bitmap_single_bit_set_p,
that sometimes:
```
  if (uns > 1)
    return 0;
  return uns == 1;
```
Would not optimize down to just:
```
return uns == 1;
```

In this case, VRP likes to change `a == 1` into `(bool)a` if
a has a range of [0,1] due to `a <= 1` side of the branch.
We might end up with this similar code even without VRP,
in the case of builtin-sprintf-warn-23.c (and Wrestrict.c), we had:
```
if (s < 0 || 1 < s)
  s = 0;
```
Which is the same as `s = ((unsigned)s) <= 1 ? s : 0`;
So we should be able to catch that also.

This adds 2 patterns to catch `(uns <= 1) & uns` and
`(uns > 1) ? 0 : uns` and convert those into:
`(convert) uns == 1`.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/109959

gcc/ChangeLog:

* match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
New patterns.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/builtin-sprintf-warn-23.c: Remove xfail.
* c-c++-common/Wrestrict.c: Update test and remove some xfail.
* gcc.dg/tree-ssa/cmpeq-1.c: New test.
* gcc.dg/tree-ssa/cmpeq-2.c: New test.
* gcc.dg/tree-ssa/cmpeq-3.c: New test.

14 months agoUse RPO order for sinking
Richard Biener [Thu, 3 Aug 2023 13:41:16 +0000 (15:41 +0200)]
Use RPO order for sinking

The following makes us use RPO order instead of walking post-dominators.
This ensures we visit a block before any predecessors.  I've seen
some extra sinking because of this in a larger testcase but failed
to reduce a smaller one (processing of post-dominator sons is unordered
so I failed to have "luck").

* tree-ssa-sink.cc (pass_sink_code::execute): Do not
calculate post-dominators.  Calculate RPO on the inverted
graph and process blocks in that order.

14 months agoFix ICE in rtl check when bootstrap.
liuhongt [Mon, 7 Aug 2023 03:10:52 +0000 (11:10 +0800)]
Fix ICE in rtl check when bootstrap.

/var/tmp/portage/sys-devel/gcc-14.0.0_pre20230806/work/gcc-14-20230806/libgfortran/generated/matmul_i1.c: In function ‘matmul_i1_avx512f’:
/var/tmp/portage/sys-devel/gcc-14.0.0_pre20230806/work/gcc-14-20230806/libgfortran/generated/matmul_i1.c:1781:1: internal compiler error: RTL check: expected elt 0 type 'i' or 'n', have 'w' (rtx const_int) in vpternlog_redundant_operand_mask, at config/i386/i386.cc:19460
 1781 | }
      | ^
0x5559de26dc2d rtl_check_failed_type2(rtx_def const*, int, int, int, char const*, int, char const*)
        /var/tmp/portage/sys-devel/gcc-14.0.0_pre20230806/work/gcc-14-20230806/gcc/rtl.cc:761
0x5559de340bfe vpternlog_redundant_operand_mask(rtx_def**)
        /var/tmp/portage/sys-devel/gcc-14.0.0_pre20230806/work/gcc-14-20230806/gcc/config/i386/i386.cc:19460
0x5559dfec67a6 split_44
        /var/tmp/portage/sys-devel/gcc-14.0.0_pre20230806/work/gcc-14-20230806/gcc/config/i386/sse.md:12730
0x5559dfec67a6 split_63
        /var/tmp/portage/sys-devel/gcc-14.0.0_pre20230806/work/gcc-14-20230806/gcc/config/i386/sse.md:28428
0x5559deb8a682 try_split(rtx_def*, rtx_insn*, int)
        /var/tmp/portage/sys-devel/gcc-14.0.0_pre20230806/work/gcc-14-20230806/gcc/emit-rtl.cc:3800
0x5559deb8adf2 try_split(rtx_def*, rtx_insn*, int)
        /var/tmp/portage/sys-devel/gcc-14.0.0_pre20230806/work/gcc-14-20230806/gcc/emit-rtl.cc:3972
0x5559def69194 split_insn
        /var/tmp/portage/sys-devel/gcc-14.0.0_pre20230806/work/gcc-14-20230806/gcc/recog.cc:3385
0x5559def70c57 split_all_insns()
        /var/tmp/portage/sys-devel/gcc-14.0.0_pre20230806/work/gcc-14-20230806/gcc/recog.cc:3489
0x5559def70d0c execute
        /var/tmp/portage/sys-devel/gcc-14.0.0_pre20230806/work/gcc-14-20230806/gcc/recog.cc:4413

Use INTVAL (imm_op) instead of XINT (imm_op, 0).

gcc/ChangeLog:

PR target/110926
* config/i386/i386-protos.h
(vpternlog_redundant_operand_mask): Adjust parameter type.
* config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
INTVAL instead of XINT, also adjust parameter type from rtx*
to rtx since the function only needs operands[4] in vpternlog
pattern.
(substitute_vpternlog_operands): Pass operands[4] instead of
operands to vpternlog_redundant_operand_mask.
* config/i386/sse.md: Ditto.

14 months agoImprove -fopt-info-vec for basic-block vectorization
Richard Biener [Mon, 7 Aug 2023 11:53:59 +0000 (13:53 +0200)]
Improve -fopt-info-vec for basic-block vectorization

We currently dump notes like

flow_lam.f:65:72: optimized: basic block part vectorized using 32 byte vectors
flow_lam.f:65:72: optimized: basic block part vectorized using 32 byte vectors
flow_lam.f:65:72: optimized: basic block part vectorized using 32 byte vectors
flow_lam.f:65:72: optimized: basic block part vectorized using 32 byte vectors
..

repeating the same location for multiple instances because we
clobber vect_location during BB vectorization.  The following
avoids this, improving things to

flow_lam.f:15:72: optimized: basic block part vectorized using 32 byte vectors
flow_lam.f:16:72: optimized: basic block part vectorized using 32 byte vectors
flow_lam.f:17:72: optimized: basic block part vectorized using 32 byte vectors
flow_lam.f:18:72: optimized: basic block part vectorized using 32 byte vectors
...

* tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
around dumping code.

14 months agoi386: Clear upper bits of XMM register for V4HFmode/V2HFmode operations [PR110762]
liuhongt [Fri, 4 Aug 2023 07:35:54 +0000 (15:35 +0800)]
i386: Clear upper bits of XMM register for V4HFmode/V2HFmode operations [PR110762]

Similar like r14-2786-gade30fad6669e5, the patch is for V4HF/V2HFmode.

gcc/ChangeLog:

PR target/110762
* config/i386/mmx.md (<insn><mode>3): Changed from define_insn
to define_expand and break into ..
(<insn>v4hf3): .. this.
(divv4hf3): .. this.
(<insn>v2hf3): .. this.
(divv2hf3): .. this.
(movd_v2hf_to_sse): New define_expand.
(movq_<mode>_to_sse): Extend to V4HFmode.
(mmxdoublevecmode): Ditto.
(V2FI_V4HF): New mode iterator.
* config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
by using mode iterator V4SF_V8HF, renamed to ..
(*vec_concat<mode>): .. this.
(*vec_concatv4sf_0): Extend to handle V8HF by using mode
iterator V4SF_V8HF, renamed to ..
(*vec_concat<mode>_0): .. this.
(*vec_concatv8hf_movss): New define_insn.
(V4SF_V8HF): New mode iterator.

gcc/testsuite/ChangeLog:

* gcc.target/i386/pr110762-v4hf.c: New test.

14 months agoada: Refactor multiple returns
Sheri Bernstein [Thu, 27 Jul 2023 17:12:37 +0000 (17:12 +0000)]
ada: Refactor multiple returns

Replace multiple returns by a single return statement with a conditional
expression. This is more readable and maintainable, and also conformant with
a Highly Recommended design principle of ISO 26262-6.

gcc/ada/

* libgnat/s-parame__qnx.adb: Refactor multiple returns.

14 months agoada: Extend precondition of Interfaces.C.String.Value with Length
Piotr Trojanek [Fri, 28 Jul 2023 10:13:28 +0000 (12:13 +0200)]
ada: Extend precondition of Interfaces.C.String.Value with Length

The existing precondition guarded against exception Dereference_Error,
but not against Constraint_Error.

The RM rule B.3.1(36/3) only mentions Constraint_Error for the Value
function which returns char_array, but the one which returns String
has the same restriction, because it is equivalent to calling the
variant which returns char_array and then converted.

gcc/ada/

* libgnat/i-cstrin.ads (Value): Extend preconditions; adapt comment for
the package.

14 months agoada: Crash in GNATprove due to wrong detection of inlining
Yannick Moy [Fri, 28 Jul 2023 07:17:41 +0000 (09:17 +0200)]
ada: Crash in GNATprove due to wrong detection of inlining

When a function is called in a predicate, it was not properly detected
as not always inlined in GNATprove mode, which led to crashes later during
analysis. Fixed now.

gcc/ada/

* sem_res.adb (Resolve_Call): Always call Cannot_Inline so that
subprogram called is marked as not always inlined.

14 months agoada: Spurious error on class-wide preconditions
Javier Miranda [Thu, 27 Jul 2023 11:02:20 +0000 (11:02 +0000)]
ada: Spurious error on class-wide preconditions

The compiler reports an spurious error when a class-wide precondition
expression has a class-wide type conversion.

gcc/ada/

* sem_res.adb (Resolve_Type_Conversion): Do not warn on conversion
to class-wide type on internally build helpers of class-wide
preconditions.

14 months agotree-optimization/110897 - Fix missed vectorization of shift on both RISC-V and aarch64
Juzhe-Zhong [Mon, 7 Aug 2023 01:54:31 +0000 (09:54 +0800)]
tree-optimization/110897 - Fix missed vectorization of shift on both RISC-V and aarch64

Consider this following case:

#include <stdint.h>

#define TEST2_TYPE(TYPE) \
  __attribute__((noipa)) \
  void vshiftr_##TYPE (TYPE *__restrict dst, TYPE *__restrict a, TYPE *__restrict b, int n) \
  { \
    for (int i = 0; i < n; i++) \
      dst[i] = (a[i]) >> b[i]; \
  }

#define TEST_ALL() \
 TEST2_TYPE(uint8_t) \
 TEST2_TYPE(uint16_t) \
 TEST2_TYPE(uint32_t) \
 TEST2_TYPE(uint64_t) \

TEST_ALL()

Both RISC-V and aarch64 of trunk GCC failed vectorize uint8_t/uint16_t with following missed report:

<source>:17:1: missed: couldn't vectorize loop
<source>:17:1: missed: not vectorized: relevant stmt not supported: patt_46 = MIN_EXPR <_6, 7>;
<source>:17:1: missed: couldn't vectorize loop
<source>:17:1: missed: not vectorized: relevant stmt not supported: patt_47 = MIN_EXPR <_7, 15>;
Compiler returned: 0

Both GCC 13.1 can vectorize, see:

https://godbolt.org/z/6vaMK5M1o

Bootstrap and regression on X86 passed.

Ok for trunk ?

gcc/ChangeLog:

* tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/binop/narrow-1.c: Adapt testcase.

14 months agox86: drop redundant "prefix_data16" attributes
Jan Beulich [Mon, 7 Aug 2023 09:53:17 +0000 (11:53 +0200)]
x86: drop redundant "prefix_data16" attributes

The attribute defaults to 1 for TI-mode insns of type sselog, sselog1,
sseiadd, sseimul, and sseishft.

In *<code>v8hi3 [smaxmin] and *<code>v16qi3 [umaxmin] also drop the
similarly stray "prefix_extra" at this occasion. These two max/min
flavors are encoded in 0f space.

gcc/

* config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
(*mmx_pinsrb): Likewise.
(*mmx_pextrb): Likewise.
(*mmx_pextrb_zext): Likewise.
(mmx_pshufbv8qi3): Likewise.
(mmx_pshufbv4qi3): Likewise.
(mmx_pswapdv2si2): Likewise.
(*pinsrb): Likewise.
(*pextrb): Likewise.
(*pextrb_zext): Likewise.
* config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
(*sse2_eq<mode>3): Likewise.
(*sse2_gt<mode>3): Likewise.
(<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
(*vec_extract<mode>): Likewise.
(*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
(*vec_extractv16qi_zext): Likewise.
(ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
(ssse3_pmaddubsw128): Likewise.
(*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
(<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
(<ssse3_avx2>_psign<mode>3): Likewise.
(<ssse3_avx2>_palignr<mode>): Likewise.
(*abs<mode>2): Likewise.
(sse4_2_pcmpestr): Likewise.
(sse4_2_pcmpestri): Likewise.
(sse4_2_pcmpestrm): Likewise.
(sse4_2_pcmpestr_cconly): Likewise.
(sse4_2_pcmpistr): Likewise.
(sse4_2_pcmpistri): Likewise.
(sse4_2_pcmpistrm): Likewise.
(sse4_2_pcmpistr_cconly): Likewise.
(vgf2p8affineinvqb_<mode><mask_name>): Likewise.
(vgf2p8affineqb_<mode><mask_name>): Likewise.
(vgf2p8mulb_<mode><mask_name>): Likewise.
(*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
"prefix_extra".
(*<code>v16qi3 [umaxmin]): Likewise.

14 months agox86: correct "length_immediate" in a few cases
Jan Beulich [Mon, 7 Aug 2023 09:52:14 +0000 (11:52 +0200)]
x86: correct "length_immediate" in a few cases

When first added explicitly in 3ddffba914b2 ("i386.md
(sse4_1_round<mode>2): Add avx512f alternative"), "*" should not have
been used for the pre-existing alternative. The attribute was plain
missing. Subsequent changes adding more alternatives then generously
extended the bogus pattern.

Apparently something similar happened to the two mmx_pblendvb_* insns.

gcc/

* config/i386/i386.md (sse4_1_round<mode>2): Make
"length_immediate" uniformly 1.
* config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
(mmx_pblendvb_<mode>): Likewise.

14 months agox86: add missing "prefix" attribute to VF{,C}MULC
Jan Beulich [Mon, 7 Aug 2023 09:50:42 +0000 (11:50 +0200)]
x86: add missing "prefix" attribute to VF{,C}MULC

gcc/

* config/i386/sse.md
(<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
"prefix" attribute.
(avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
Likewise.

14 months agox86: add (adjust) XOP insn attributes
Jan Beulich [Mon, 7 Aug 2023 09:49:55 +0000 (11:49 +0200)]
x86: add (adjust) XOP insn attributes

Many were lacking "prefix" and "prefix_extra", some had a bogus value of
2 for "prefix_extra" (presumably inherited from their SSE5 counterparts,
which are long gone) and a meaningless "prefix_data16" one. Where
missing, "mode" attributes are also added. (Note that "sse4arg" and
"ssemuladd" ones don't need further adjustment in this regard.)

gcc/

* config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
"prefix_extra", and "mode" attributes.
(xop_phadd<u>bd): Likewise.
(xop_phadd<u>bq): Likewise.
(xop_phadd<u>wd): Likewise.
(xop_phadd<u>wq): Likewise.
(xop_phadd<u>dq): Likewise.
(xop_phsubbw): Likewise.
(xop_phsubwd): Likewise.
(xop_phsubdq): Likewise.
(xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
(xop_rotr<mode>3): Likewise.
(xop_frcz<mode>2): Likewise.
(*xop_vmfrcz<mode>2): Likewise.
(xop_vrotl<mode>3): Add "prefix" attribute. Change
"prefix_extra" to 1.
(xop_sha<mode>3): Likewise.
(xop_shl<mode>3): Likewise.

14 months agox86: drop stray "prefix_extra"
Jan Beulich [Mon, 7 Aug 2023 09:48:12 +0000 (11:48 +0200)]
x86: drop stray "prefix_extra"

While the attribute is relevant for legacy- and VEX-encoded insns, it is
of no relevance for EVEX-encoded ones.

While there in <mask_codefor>avx512dq_broadcast<mode><mask_name>_1 add
the missing "length_immediate".

gcc/

* config/i386/sse.md
(*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
"prefix_extra".
(avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
(*avx512dq_vextract<shuffletype>64x2_1): Likewise.
(avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
(*avx512f_vextract<shuffletype>32x4_1): Likewise.
(vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
(vec_extract_lo_<mode> [AVX512 forms]): Likewise.
(vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
(vec_extract_hi_<mode> [AVX512 forms]): Likewise.
(@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
(@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
(vec_extract_lo_v64qi): Likewise.
(vec_extract_hi_v64qi): Likewise.
(*vec_widen_umult_even_v16si<mask_name>): Likewise.
(*vec_widen_smult_even_v16si<mask_name>): Likewise.
(*avx512f_<code><mode>3<mask_name>): Likewise.
(*vec_extractv4ti): Likewise.
(avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
(<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
Add "length_immediate".

14 months agox86: replace/correct bogus "prefix_extra"
Jan Beulich [Mon, 7 Aug 2023 09:47:27 +0000 (11:47 +0200)]
x86: replace/correct bogus "prefix_extra"

In the rdrand and rdseed cases "prefix_0f" is meant instead. For
mmx_floatv2siv2sf2 1 is correct only for the first alternative. For
the integer min/max cases 1 uniformly applies to legacy and VEX
encodings (the UB and SW variants are dealt with separately anyway).
Same for {,V}MOVNTDQA.

Unlike {,V}PEXTRW, which has two encoding forms, {,V}PINSRW only has
a single form in 0f space. (In *vec_extract<mode> note that the
dropped part if the condition also referenced non-existing alternative
2.)

Of the integer compare insns, only the 64-bit element forms are encoded
in 0f38 space.

gcc/

* config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
"prefix_extra".
(@rdseed<mode>): Likewise.
* config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
Adjust "prefix_extra".
* config/i386/sse.md (@vec_set<mode>_0): Likewise.
(*sse4_1_<code><mode>3<mask_name>): Likewise.
(*avx2_eq<mode>3): Likewise.
(avx2_gt<mode>3): Likewise.
(<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
(*vec_extract<mode>): Likewise.
(<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.

14 months agox86: "prefix_extra" can't really be "2"
Jan Beulich [Mon, 7 Aug 2023 09:46:44 +0000 (11:46 +0200)]
x86: "prefix_extra" can't really be "2"

In the three remaining instances separate "prefix_0f" and "prefix_rep"
are what is wanted instead.

gcc/

* config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
"prefix_rep". Drop "prefix_extra".
(wr<fsgs>base<mode>): Likewise.
(ptwrite<mode>): Likewise.

14 months agox86: "ssemuladd" adjustments
Jan Beulich [Mon, 7 Aug 2023 09:45:20 +0000 (11:45 +0200)]
x86: "ssemuladd" adjustments

They're all VEX3- (also covering XOP) or EVEX-encoded. Express that in
the default calculation of "prefix". FMA4 insns also all have a 1-byte
immediate operand.

Where the default calculation is not sufficient / applicable, add
explicit "prefix" attributes. While there also add a "mode" attribute to
fma_<complexpairopname>_<mode>_pair.

gcc/

* config/i386/i386.md (isa): Move up.
(length_immediate): Handle "fma4".
(prefix): Handle "ssemuladd".
* config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
(<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
Likewise.
(<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
(<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
(<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
Likewise.
(<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
(<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
(*fma_fnmadd_<mode>): Likewise.
(<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
Likewise.
(<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
(<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
(<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
Likewise.
(<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
(<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
(<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
Likewise.
(<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
(<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
(<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
Likewise.
(<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
(<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
(*fmai_fmadd_<mode>): Likewise.
(*fmai_fmsub_<mode>): Likewise.
(*fmai_fnmadd_<mode><round_name>): Likewise.
(*fmai_fnmsub_<mode><round_name>): Likewise.
(avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
(avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
(avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
(*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
(avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
(*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
(avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
(avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
(avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
(*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
(*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
(*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
(*fma4i_vmfmadd_<mode>): Likewise.
(*fma4i_vmfmsub_<mode>): Likewise.
(*fma4i_vmfnmadd_<mode>): Likewise.
(*fma4i_vmfnmsub_<mode>): Likewise.
(fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
(<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
(avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
Likewise.
(avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
(xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
(xop_p<macs>dql): Likewise.
(xop_p<macs>dqh): Likewise.
(xop_p<macs>wd): Likewise.
(xop_p<madcs>wd): Likewise.
(fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.

14 months agox86: "sse4arg" adjustments
Jan Beulich [Mon, 7 Aug 2023 09:44:37 +0000 (11:44 +0200)]
x86: "sse4arg" adjustments

Record common properties in other attributes' default calculations:
There's always a 1-byte immediate, and they're always encoded in a VEX3-
like manner (note that "prefix_extra" already evaluates to 1 in this
case). The drop now (or already previously) redundant explicit
attributes, adding "mode" ones where they were missing.

Furthermore use "sse4arg" consistently for all VPCOM* insns; so far
signed comparisons did use it, while unsigned ones used "ssecmp". Note
that while they have (not counting the explicit or implicit immediate
operand) they really only have 3 operands, the operator is also counted
in those patterns. That's relevant for establishing the "memory"
attribute's value, and at the same time benign when there are only
register operands.

Note that despite also having 4 operands, multiply-add insns aren't
affected by this change, as they use "ssemuladd" for "type".

gcc/

* config/i386/i386.md (length_immediate): Handle "sse4arg".
(prefix): Likewise.
(*xop_pcmov_<mode>): Add "mode" attribute.
* config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
"prefix_rep", "prefix_extra", and "length_immediate" attributes.
(*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
(*xop_pcmov_<mode>): Add "mode" attribute.
* config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
attribute.
(xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
"prefix_extra", and "length_immediate" attributes.
(xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
(xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
and "length_immediate" attributes. Switch "type" to "sse4arg".
(xop_pcom_tf<mode>3): Likewise.
(xop_vpermil2<mode>3): Drop "length_immediate" attribute.

14 months agox86: "prefix_extra" tidying
Jan Beulich [Mon, 7 Aug 2023 09:43:55 +0000 (11:43 +0200)]
x86: "prefix_extra" tidying

Drop SSE5 leftovers from both its comment and its default calculation.
A value of 2 simply cannot occur anymore. Instead extend the comment to
mention the use of the attribute in "length_vex", clarifying why
"prefix_extra" can actually be meaningful on VEX-encoded insns despite
those not having any real prefixes except possibly segment overrides.

gcc/

* config/i386/i386.md (prefix_extra): Correct comment. Fold
cases yielding 2 into ones yielding 1.

14 months agolibsanitizer: Fix SPARC stacktraces
Rainer Orth [Mon, 7 Aug 2023 09:29:02 +0000 (11:29 +0200)]
libsanitizer: Fix SPARC stacktraces

As detailed in LLVM Issue #57624
(https://github.com/llvm/llvm-project/issues/57624), a patch to
sanitizer_internal_defs.h broke SPARC stacktraces in the sanitizers.
The issue has now been fixed upstream (https://reviews.llvm.org/D156504)
and I'd like to cherry-pick that patch.

Bootstrapped without regressions on sparc-sun-solaris2.11.

2023-07-27  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

libsanitizer:
* sanitizer_common/sanitizer_stacktrace_sparc.cpp,
sanitizer_common/sanitizer_unwind_linux_libcdep.cpp: Cherry-pick
llvm-project revision 679c076ae446af81eba81ce9b94203a273d4b88a.

14 months agoFix profile update after versioning ifconverted loop
Jan Hubicka [Mon, 7 Aug 2023 08:55:58 +0000 (10:55 +0200)]
Fix profile update after versioning ifconverted loop

If loop is ifconverted and later versioning by vectorizer, vectorizer will
reuse the scalar loop produced by ifconvert. Curiously enough it does not seem
to do so for versions produced by loop distribution while for loop distribution
this matters (since since both ldist versions survive to final code) while
after ifcvt it does not (since we remove non-vectorized path).

This patch fixes associated profile update.  Here it is necessary to scale both
arms of the conditional according to runtime checks inserted.  We got partly
right the loop body, but not the preheader block and block after exit.  The
first is particularly bad since it changes loop iterations estimates.

So we now turn 4 original loops:
  loop 1: iterations by profile: 473.497707 (reliable) entry count:84821 (precise, freq 0.9979)
  loop 2: iterations by profile: 100.000000 (reliable) entry count:39848881 (precise, freq 468.8104)
  loop 3: iterations by profile: 100.000000 (reliable) entry count:39848881 (precise, freq 468.8104)
  loop 4: iterations by profile: 100.999596 (reliable) entry count:84167 (precise, freq 0.9902)

Into following loops
  iterations by profile: 5.312499 (unreliable, maybe flat) entry count:12742188 (guessed, freq 149.9081)
     vectorized and split loop 1, peeled
  iterations by profile: 0.009496 (unreliable, maybe flat) entry count:374798 (guessed, freq 4.4094)
     split loop 1 (last iteration), peeled
  iterations by profile: 100.000008 (unreliable) entry count:3945039 (guessed, freq 46.4122)
     scalar version of loop 1
  iterations by profile: 100.000007 (unreliable) entry count:7101070 (guessed, freq 83.5420)
     redundant scalar version of loop 1 which we could eliminate if vectorizer understood ldist
  iterations by profile: 100.000000 (unreliable) entry count:35505353 (guessed, freq 417.7100)
     unvectorized loop 2
  iterations by profile: 5.312500 (unreliable) entry count:25563855 (guessed, freq 300.7512)
     vectorized loop 2, not peeled (hits max-peel-insns)
  iterations by profile: 100.000007 (unreliable) entry count:7101070 (guessed, freq 83.5420)
     unvectorized loop 3
  iterations by profile: 5.312500 (unreliable) entry count:25563855 (guessed, freq 300.7512)
     vectorized loop 3, not peeled (hits max-peel-insns)
  iterations by profile: 473.497707 (reliable) entry count:84821 (precise, freq 0.9979)
     loop 1
  iterations by profile: 100.999596 (reliable) entry count:84167 (precise, freq 0.9902)
     loop 4

With this change we are on 0 profile erros on hmmer benchmark:

Pass dump id |dynamic mismatch          |overall                              |
             |in count                  |size            |time                |
172t ch_vect |            0             |      996       | 385812023346       |
173t ifcvt   |     71010686    +71010686|     1021  +2.5%| 468361969416 +21.4%|
174t vect    |    210830784   +139820098|     1497 +46.6%| 216073467874 -53.9%|
175t dce     |    210830784             |     1387  -7.3%| 205273170281  -5.0%|
176t pcom    |    210830784             |     1387       | 201722634966  -1.7%|
177t cunroll |            0   -210830784|     1443  +4.0%| 180441501289 -10.5%|
182t ivopts  |            0             |     1385  -4.0%| 136412345683 -24.4%|
183t lim     |            0             |     1389  +0.3%| 135093950836  -1.0%|
192t reassoc |            0             |     1381  -0.6%| 134778347700  -0.2%|
193t slsr    |            0             |     1380  -0.1%| 134738100330  -0.0%|
195t tracer  |            0             |     1521 +10.2%| 134738179146  +0.0%|
196t fre     |      2680654     +2680654|     1489  -2.1%| 134659672725  -0.1%|
198t dom     |      5361308     +2680654|     1473  -1.1%| 134449553658  -0.2%|
201t vrp     |      5361308             |     1474  +0.1%| 134489004050  +0.0%|
202t ccp     |      5361308             |     1472  -0.1%| 134440752274  -0.0%|
204t dse     |      5361308             |     1444  -1.9%| 133802300525  -0.5%|
206t forwprop|      5361308             |     1433  -0.8%| 133542828370  -0.2%|
207t sink    |      5361308             |     1431  -0.1%| 133542658728  -0.0%|
211t store-me|      5361308             |     1430  -0.1%| 133542573728  -0.0%|
212t cddce   |      5361308             |     1428  -0.1%| 133541776728  -0.0%|
258r expand  |      5361308             |----------------|--------------------|
260r into_cfg|      5361308             |     9334  -0.8%| 885820707913  -0.6%|
261r jump    |      5361308             |     9330  -0.0%| 885820367913  -0.0%|
265r fwprop1 |      5361308             |     9206  -1.3%| 876756504385  -1.0%|
267r rtl pre |      5361308             |     9210  +0.0%| 876914305953  +0.0%|
269r cprop   |      5361308             |     9202  -0.1%| 876756165101  -0.0%|
271r cse_loca|      5361308             |     9198  -0.0%| 876727760821  -0.0%|
272r ce1     |      5361308             |     9126  -0.8%| 875726815885  -0.1%|
276r loop2_in|      5361308             |     9167  +0.4%| 873573110570  -0.2%|
282r cprop   |      5361308             |     9095  -0.8%| 871937317262  -0.2%|
284r cse2    |      5361308             |     9091  -0.0%| 871936977978  -0.0%|
285r dse1    |      5361308             |     9067  -0.3%| 871437031602  -0.1%|
290r combine |      5361308             |     9071  +0.0%| 869206278202  -0.3%|
292r stv     |      5361308             |    17157 +89.1%| 2111071925708+142.9%|
295r bbpart  |      5361308             |    17161  +0.0%| 2111071925708       |
296r outof_cf|      5361308             |    17233  +0.4%| 2111655121000  +0.0%|
297r split1  |      5361308             |    17245  +0.1%| 2111656138852  +0.0%|
306r ira     |      5361308             |    19189 +11.3%| 2136098398308  +1.2%|
307r reload  |      5361308             |    12101 -36.9%| 981091222830 -54.1%|
309r postrelo|      5361308             |    12019  -0.7%| 978750345475  -0.2%|
310r gcse2   |      5361308             |    12027  +0.1%| 978329108320  -0.0%|
311r split2  |      5361308             |    12023  -0.0%| 978507631352  +0.0%|
312r ree     |      5361308             |    12027  +0.0%| 978505414244  -0.0%|
313r cmpelim |      5361308             |    11979  -0.4%| 977531601988  -0.1%|
314r pro_and_|      5361308             |    12091  +0.9%| 977541801988  +0.0%|
315r dse2    |      5361308             |    12091       | 977541801988       |
316r csa     |      5361308             |    12087  -0.0%| 977541461988  -0.0%|
317r jump2   |      5361308             |    12039  -0.4%| 977683176572  +0.0%|
318r compgoto|      5361308             |    12039       | 977683176572       |
320r peephole|      5361308             |    12047  +0.1%| 977362727612  -0.0%|
321r ce3     |      5361308             |    12047       | 977362727612       |
323r cprop_ha|      5361308             |    11907  -1.2%| 968751076676  -0.9%|
324r rtl_dce |      5361308             |    11903  -0.0%| 968593274820  -0.0%|
325r bbro    |      5361308             |    11883  -0.2%| 967964046644  -0.1%|

Bootstrapped/regtested x86_64-linux, plan to commit it tomorrow if there are no
complains.

gcc/ChangeLog:

PR tree-optimization/106293
* tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
* tree-vect-loop.cc (vect_transform_loop): Likewise.

gcc/testsuite/ChangeLog:

PR tree-optimization/106293
* gcc.dg/vect/vect-cond-11.c: Check profile consistency.
* gcc.dg/vect/vect-widen-mult-extern-1.c: Check profile consistency.

14 months agoMATCH: Extend min_value/max_value to pointer types
Andrew Pinski [Sat, 5 Aug 2023 16:23:26 +0000 (09:23 -0700)]
MATCH: Extend min_value/max_value to pointer types

Since we already had the infrastructure to optimize
`(x == 0) && (x > y)` to false for integer types,
this extends the same to pointer types as indirectly
requested by PR 96695.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

gcc/ChangeLog:

PR tree-optimization/96695
* match.pd (min_value, max_value): Extend to
pointer types too.

gcc/testsuite/ChangeLog:

PR tree-optimization/96695
* gcc.dg/pr96695-1.c: New test.
* gcc.dg/pr96695-10.c: New test.
* gcc.dg/pr96695-11.c: New test.
* gcc.dg/pr96695-12.c: New test.
* gcc.dg/pr96695-2.c: New test.
* gcc.dg/pr96695-3.c: New test.
* gcc.dg/pr96695-4.c: New test.
* gcc.dg/pr96695-5.c: New test.
* gcc.dg/pr96695-6.c: New test.
* gcc.dg/pr96695-7.c: New test.
* gcc.dg/pr96695-8.c: New test.
* gcc.dg/pr96695-9.c: New test.

14 months agoDaily bump.
GCC Administrator [Mon, 7 Aug 2023 00:16:55 +0000 (00:16 +0000)]
Daily bump.

14 months ago[Committed] Avoid FAIL of gcc.target/i386/pr110792.c
Roger Sayle [Sun, 6 Aug 2023 22:19:10 +0000 (23:19 +0100)]
[Committed] Avoid FAIL of gcc.target/i386/pr110792.c

My apologies (again), I managed to mess up the 64-bit version of the
test case for PR 110792.  Unlike the 32-bit version, the 64-bit case
contains exactly the same load instructions, just in a different order
making the correct and incorrect behaviours impossible to distinguish
with a scan-assembler-not.  Somewhere between checking that this test
failed in a clean tree without the patch, and getting the escaping
correct, I'd failed to notice that this also FAILs in the patched tree.
Doh!  Instead of removing the test completely, I've left it as a
compilation test.

The original fix is tested by the 32-bit test case.

Committed to mainline as obvious.  Sorry for the incovenience.

2023-08-06  Roger Sayle  <roger@nextmovesoftware.com>

gcc/testsuite/ChangeLog
PR target/110792
* gcc.target/i386/pr110792.c: Remove dg-final scan-assembler-not.

14 months agoAdd builtin_expect to predict that CPU supports cpuid to cpuid.h
Jan Hubicka [Sun, 6 Aug 2023 20:53:14 +0000 (22:53 +0200)]
Add builtin_expect to predict that CPU supports cpuid to cpuid.h

This is needed to avoid impossible threading update in vectorizer testcase,
but should also reflect reality on most CPUs we care about.

gcc/ChangeLog:

* config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
__builtin_expect that CPU likely supports cpuid.

14 months agoDisable loop distribution for loops with estimated iterations 0
Jan Hubicka [Sun, 6 Aug 2023 20:33:33 +0000 (22:33 +0200)]
Disable loop distribution for loops with estimated iterations 0

This prevents useless loop distribiton produced in hmmer.  With FDO we now
correctly work out that the loop created for last iteraiton is not going to
iterate however loop distribution still produces a verioned loop that has no
chance to survive loop vectorizer since we only keep distributed loops
when loop vectorization suceeds and it requires number of (header) iterations
to exceed the vectorization factor.

gcc/ChangeLog:

* tree-loop-distribution.cc (loop_distribution::execute): Disable
distribution for loops with estimated iterations 0.

14 months agoFix profile update after peeled epilogues
Jan Hubicka [Sun, 6 Aug 2023 19:23:31 +0000 (21:23 +0200)]
Fix profile update after peeled epilogues

Epilogue peeling expects the scalar loop to have same number of executions as
the vector loop which is true at the beggining of vectorization. However if the
epilogues are vectorized, this is no longer the case.  In this situation the
loop preheader is replaced by new guard code with correct profile, however
loop body is left unscaled.  This leads to loop that exists more often then
it is entered.

This patch add slogic to scale the frequencies down and also to fix profile
of original preheader where necesary.

Bootstrapped/regtested x86_64-linux, comitted.

gcc/ChangeLog:

* tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.

gcc/testsuite/ChangeLog:

* gcc.dg/vect/vect-bitfield-read-1.c: Check profile consistency.
* gcc.dg/vect/vect-bitfield-read-2.c: Check profile consistency.
* gcc.dg/vect/vect-bitfield-read-3.c: Check profile consistency.
* gcc.dg/vect/vect-bitfield-read-4.c: Check profile consistency.
* gcc.dg/vect/vect-bitfield-read-5.c: Check profile consistency.
* gcc.dg/vect/vect-bitfield-read-6.c: Check profile consistency.
* gcc.dg/vect/vect-bitfield-read-7.c: Check profile consistency.
* gcc.dg/vect/vect-bitfield-write-1.c: Check profile consistency.
* gcc.dg/vect/vect-bitfield-write-2.c: Check profile consistency.
* gcc.dg/vect/vect-bitfield-write-3.c: Check profile consistency.
* gcc.dg/vect/vect-bitfield-write-4.c: Check profile consistency.
* gcc.dg/vect/vect-bitfield-write-5.c: Check profile consistency.
* gcc.dg/vect/vect-epilogues-2.c: Check profile consistency.
* gcc.dg/vect/vect-epilogues.c: Check profile consistency.
* gcc.dg/vect/vect-mask-store-move-1.c: Check profile consistency.

14 months agolibstdc++: [_GLIBCXX_INLINE_VERSION] Add __cxa_call_terminate symbol export
François Dumont [Sat, 5 Aug 2023 15:18:16 +0000 (17:18 +0200)]
libstdc++: [_GLIBCXX_INLINE_VERSION] Add __cxa_call_terminate symbol export

libstdc++-v3/ChangeLog:

* config/abi/pre/gnu-versioned-namespace.ver: Add __cxa_call_terminate
symbol export.

15 months agoDaily bump.
GCC Administrator [Sun, 6 Aug 2023 00:16:37 +0000 (00:16 +0000)]
Daily bump.

15 months agoPR modula2/110779 SysClock can not read the clock
Gaius Mulley [Sat, 5 Aug 2023 16:35:12 +0000 (17:35 +0100)]
PR modula2/110779 SysClock can not read the clock

This patch completes the implementation of the ISO module
SysClock.mod.  Three new testcases are provided.  wrapclock.{cc,def}
are new support files providing access to clock_settime, clock_gettime
and glibc timezone variables.

gcc/m2/ChangeLog:

PR modula2/110779
* gm2-libs-iso/SysClock.mod: Re-implement using wrapclock.
* gm2-libs-iso/wrapclock.def: New file.

libgm2/ChangeLog:

PR modula2/110779
* config.h.in: Regenerate.
* configure: Regenerate.
* configure.ac (GM2_CHECK_LIB): Check for clock_gettime
and clock_settime.
* libm2iso/Makefile.am (M2DEFS): Add wrapclock.def.
* libm2iso/Makefile.in: Regenerate.
* libm2iso/wraptime.cc: Replace HAVE_TIMEVAL with
HAVE_STRUCT_TIMEVAL.
* libm2iso/wrapclock.cc: New file.

gcc/testsuite/ChangeLog:

PR modula2/110779
* gm2/iso/run/pass/m2date.mod: New test.
* gm2/iso/run/pass/testclock.mod: New test.
* gm2/iso/run/pass/testclock2.mod: New test.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
15 months agoc: Less warnings for parameters declared as arrays [PR98536]
Martin Uecker [Thu, 13 Apr 2023 17:35:15 +0000 (19:35 +0200)]
c: Less warnings for parameters declared as arrays [PR98536]

To avoid false positivies, tune the warnings for parameters declared
as arrays with size expressions.  Do not warn when more bounds are
specified in the declaration than before.

PR c/98536

gcc/c-family/:
* c-warn.cc (warn_parm_array_mismatch): Do not warn if more
bounds are specified.

gcc/testsuite:
* gcc.dg/Wvla-parameter-4.c: Adapt test.
* gcc.dg/attr-access-2.c: Adapt test.

15 months agoc: _Generic should not warn in non-active branches [PR68193,PR97100,PR110703]
Martin Uecker [Fri, 4 Aug 2023 05:48:21 +0000 (07:48 +0200)]
c: _Generic should not warn in non-active branches [PR68193,PR97100,PR110703]

To avoid false diagnostics, use c_inhibit_evaluation_warnings when
a generic association is known to not match during parsing.  We may
still generate false positives if the default branch comes earler than
a specific association that matches.

PR c/68193
PR c/97100
PR c/110703

gcc/c/:
* c-parser.cc (c_parser_generic_selection): Inhibit evaluation
warnings branches that are known not be taken during parsing.

gcc/testsuite/ChangeLog:
* gcc.dg/pr68193.c: New test.

15 months agoDaily bump.
GCC Administrator [Sat, 5 Aug 2023 00:17:11 +0000 (00:17 +0000)]
Daily bump.

15 months ago[PATCH v3] [RISC-V] Generate Zicond instruction for select pattern with condition...
Xiao Zeng [Fri, 4 Aug 2023 21:23:56 +0000 (17:23 -0400)]
[PATCH v3] [RISC-V] Generate Zicond instruction for select pattern with condition eq or neq to 0

This patch recognizes Zicond patterns when the select pattern
with condition eq or neq to 0 (using eq as an example), namely:

1 rd = (rs2 == 0) ? non-imm : 0
2 rd = (rs2 == 0) ? non-imm : non-imm
3 rd = (rs2 == 0) ? reg : non-imm
4 rd = (rs2 == 0) ? reg : reg

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
more Zicond patterns.  Fix whitespace typo.
(riscv_rtx_costs): Remove accidental code duplication.

Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
15 months agoanalyzer: handle function attribute "alloc_size" [PR110426]
David Malcolm [Fri, 4 Aug 2023 20:18:40 +0000 (16:18 -0400)]
analyzer: handle function attribute "alloc_size" [PR110426]

This patch makes -fanalyzer make use of the function attribute
"alloc_size", allowing -fanalyzer to emit -Wanalyzer-allocation-size,
-Wanalyzer-out-of-bounds, and -Wanalyzer-tainted-allocation-size on
execution paths involving allocations using such functions.

gcc/analyzer/ChangeLog:
PR analyzer/110426
* bounds-checking.cc (region_model::check_region_bounds): Handle
symbolic base regions.
* call-details.cc: Include "stringpool.h" and "attribs.h".
(call_details::lookup_function_attribute): New function.
* call-details.h (call_details::lookup_function_attribute): New
function decl.
* region-model-manager.cc
(region_model_manager::maybe_fold_binop): Add reference to
PR analyzer/110902.
* region-model-reachability.cc (reachable_regions::handle_sval):
Add symbolic regions for pointers that are conjured svalues for
the LHS of a stmt.
* region-model.cc (region_model::canonicalize): Purge dynamic
extents for regions that aren't referenced.
(get_result_size_in_bytes): New function.
(region_model::on_call_pre): Use get_result_size_in_bytes and
potentially set the dynamic extents of the region pointed to by
the return value.
(region_model::deref_rvalue): Add param "add_nonnull_constraint"
and use it to conditionalize adding the constraint.
(pending_diagnostic_subclass::dubious_allocation_size): Add "stmt"
param to both ctors and use it to initialize new "m_stmt" field.
(pending_diagnostic_subclass::operator==): Use m_stmt; don't use
m_lhs or m_rhs.
(pending_diagnostic_subclass::m_stmt): New field.
(region_model::check_region_size): Generalize to any kind of
pointer svalue by using deref_rvalue rather than checking for
region_svalue.  Pass stmt to dubious_allocation_size ctor.
* region-model.h (region_model::deref_rvalue): Add param
"add_nonnull_constraint".
* svalue.cc (conjured_svalue::lhs_value_p): New function.
* svalue.h (conjured_svalue::lhs_value_p): New decl.

gcc/testsuite/ChangeLog:
PR analyzer/110426
* gcc.dg/analyzer/allocation-size-1.c: Update expected message to
reflect consolidation of size and assignment into a single event.
* gcc.dg/analyzer/allocation-size-2.c: Likewise.
* gcc.dg/analyzer/allocation-size-3.c: Likewise.
* gcc.dg/analyzer/allocation-size-4.c: Likewise.
* gcc.dg/analyzer/allocation-size-multiline-1.c: Likewise.
* gcc.dg/analyzer/allocation-size-multiline-2.c: Likewise.
* gcc.dg/analyzer/allocation-size-multiline-3.c: Likewise.
* gcc.dg/analyzer/attr-alloc_size-1.c: New test.
* gcc.dg/analyzer/attr-alloc_size-2.c: New test.
* gcc.dg/analyzer/attr-alloc_size-3.c: New test.
* gcc.dg/analyzer/explode-4.c: New test.
* gcc.dg/analyzer/taint-size-1.c: Add test coverage for
__attribute__ alloc_size.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
This page took 0.130092 seconds and 5 git commands to generate.