Jason Merrill [Wed, 3 Apr 2019 20:09:17 +0000 (16:09 -0400)]
PR c++/89331 - ICE with offsetof in incomplete class.
We were aborting when build_base_path returned an error because of the
derived class not being complete yet, which wasn't considered by the assert.
Fixed by checking for complete type first. The semantics.c change avoids
a duplicate error message.
* semantics.c (finish_offsetof): Handle error_mark_node.
* typeck.c (build_class_member_access_expr): Call
complete_type_or_maybe_complain before converting to base.
re PR tree-optimization/89730 (-flive-patching=inline-only-static should grant always_inline attribute for extern function)
2019-04-03 qing zhao <qing.zhao@oracle.com>
PR tree-optimization/89730
* ipa-inline.c (can_inline_edge_p): Delete the checking for
-flive-patching=inline-only-static.
(can_inline_edge_by_limits_p): Add the checking for
-flive-patching=inline-only-static and grant always_inline
even when -flive-patching=inline-only-static is specified.
Richard Biener [Wed, 3 Apr 2019 12:30:16 +0000 (12:30 +0000)]
re PR rtl-optimization/84101 (-O3 and -ftree-vectorize trying too hard for function returning trivial pair-of-uint64_t-structure)
2019-04-03 Richard Biener <rguenther@suse.de>
PR tree-optimization/84101
* tree-vect-stmts.c: Include explow.h for hard_function_value,
regs.h for hard_regno_nregs.
(cfun_returns): New helper.
(vect_model_store_cost): When vectorizing a store to a decl
we return and the function ABI returns in a multi-reg location
account for the possible spilling that will happen.
Andreas Krebbel [Wed, 3 Apr 2019 11:26:09 +0000 (11:26 +0000)]
S/390: Reject long disp for vector load/store early
The vector memory instructions only support short displacements.
Reject invalid displacements early to prevent plenty of lay
instructions to be generated later which then cannot be merged
properly.
gcc/ChangeLog:
2019-04-03 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390.c (s390_legitimate_address_p): Reject long
displacement addresses for vector mode operands.
Sudakshina Das [Wed, 3 Apr 2019 10:02:23 +0000 (10:02 +0000)]
[GCC, DOCS, AArch64] Add missing documenation for mbranch-protection
This patch add the missing documentation bits for -mbranch-protection in both
extend.texi and invoke.texi.
*** gcc/ChangeLog ***
2019-04-03 Sudakshina Das <sudi.das@arm.com>
* doc/extend.texi: Add deprecated comment on sign-return-address
function attribute and add mbranch-protection.
* doc/invoke.texi: Add bti to the options for mbranch-protection.
The printf eventually called into glibc stdlib/divrem.c:__mpn_divrem()
which uses the __arc__ specific inline asm macros from longlong.h which
were causing miscompilation.
Jonathan Wakely [Wed, 3 Apr 2019 09:47:51 +0000 (10:47 +0100)]
PR libstdc++/85184 remove debug assertions from std::variant
The __glibcxx_assert macro should be used to check preconditions that
users must meet, not to check postconditions that the implementation
must meet. We have tests to verify std::variant meets its
postconditions, users shouldn't pay for those checks at runtime.
PR libstdc++/85184
* include/std/variant (_Copy_assign_base, _Move_assign_base, variant):
Remove assertions.
(variant::emplace<_Tp>): Remove result of emplace<N> directly.
Jonathan Wakely [Wed, 3 Apr 2019 09:47:47 +0000 (10:47 +0100)]
Define std::hash specializations for C++17 PMR strings
These hash specializations should have been added when the pmr::string
and related typedefs were added.
* include/std/string (__hash_string_base): New class template defining
operator() for hashing strings.
(hash<pmr::string>, hash<pmr::u8string>, hash<pmr::u16string>)
(hash<pmr::u32string>, hash<pmr::wstring>): Define for C++17.
* testsuite/21_strings/basic_string/hash/hash.cc: New test.
* testsuite/21_strings/basic_string/hash/hash_char8_t.cc: New test.
re PR target/89902 (ICE: in extract_insn, at recog.c:2310: unrecognizable insn with -mavx512bitalg)
PR target/89902
PR target/89903
* config/i386/i386.c (dimode_scalar_to_vector_candidate_p):
Return false for variable DImode shifts.
(dimode_scalar_chain::compute_convert_gain): Do not handle
register count operand in variable DImode shifts.
(dimode_scalar_chain::make_vector_copies): Remove support to copy
count argument of a variable shift instruction to a vector register.
(dimode_scalar_chain::convert_reg): Remove support to convert
count argument of a variable shift instruction.
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390-builtin-types.def: New builtin function type
definitions. Remove unused types.
* config/s390/s390-builtins.def (s390_vcdgb, s390_vcdlgb)
(s390_vcgdb, s390_vclgdb): Remove low-level builtin definitions.
(s390_vec_float, s390_vec_signed, s390_vec_unsigned): New
overloaded builtins.
(s390_vcefb, s390_vcdgb, s390_vcelfb, s390_vcdlgb, s390_vcfeb)
(s390_vcgdb, s390_vclfeb, s390_vclgdb): New low-level builtins.
* config/s390/vecintrin.h (vec_float): New builtin macro definition.
(vec_double, vec_signed, vec_unsigned): Define to use the new
overloaded builtins.
* config/s390/vx-builtins.md ("vec_double_s64", "vec_double_u64"):
Remove expanders.
gcc/testsuite/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* gcc.target/s390/zvector/vec-double-compile.c: New test.
* gcc.target/s390/zvector/vec-float-compile.c: New test.
* gcc.target/s390/zvector/vec-signed-compile.c: New test.
* gcc.target/s390/zvector/vec-unsigned-compile.c: New test.
Andreas Krebbel [Tue, 2 Apr 2019 11:08:54 +0000 (11:08 +0000)]
S/390: arch13: vector string search builtins
gcc/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390-builtin-types.def: New builtin function type
definitions.
* config/s390/s390-builtins.def (s390_vec_search_string_cc)
(s390_vec_search_string_until_zero_cc): New overloaded builtins.
(s390_vstrsb, s390_vstrsh, s390_vstrsf, s390_vstrszb)
(s390_vstrszh, s390_vstrszf): New low-level builtins.
* config/s390/s390.md (UNSPEC_VEC_VSTRS, UNSPEC_VEC_VSTRSCC): New
constant definitions.
* config/s390/vecintrin.h (vec_search_string_cc)
(vec_search_string_until_zero_cc): New builtin name definitions.
* config/s390/vx-builtins.md ("vstrs<mode>", "vstrsz<mode>"): New
expanders.
("vec_vstrs<mode>"): New insn definition.
gcc/testsuite/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* gcc.target/s390/zvector/vec-search-string-cc-1.c: New test.
* gcc.target/s390/zvector/vec-search-string-cc-compile.c: New test.
* gcc.target/s390/zvector/vec-search-string-until-zero-cc-1.c: New test.
* gcc.target/s390/zvector/vec-search-string-until-zero-cc-compile.c: New test.
Andreas Krebbel [Tue, 2 Apr 2019 11:03:40 +0000 (11:03 +0000)]
S/390: arch13: vector load/store byte reversed element for builtins
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/vecintrin.h: Map vec_vster low-level builtins to vec_vler.
* config/s390/vx-builtins.md ("*vec_insert_and_zero_bswap<mode>")
("*vec_set_bswap_elem<mode>", "*vec_set_bswap_vec<mode>")
("*vec_extract_bswap_vec<mode>", "*vec_extract_bswap_elem<mode>"):
New insn definitions.
gcc/testsuite/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* gcc.target/s390/zvector/bswap-and-replicate-1.c: New test.
* gcc.target/s390/zvector/get-element-bswap-1.c: New test.
* gcc.target/s390/zvector/get-element-bswap-2.c: New test.
* gcc.target/s390/zvector/get-element-bswap-3.c: New test.
* gcc.target/s390/zvector/get-element-bswap-4.c: New test.
* gcc.target/s390/zvector/set-element-bswap-1.c: New test.
* gcc.target/s390/zvector/set-element-bswap-2.c: New test.
* gcc.target/s390/zvector/set-element-bswap-3.c: New test.
Andreas Krebbel [Tue, 2 Apr 2019 11:02:22 +0000 (11:02 +0000)]
S/390: arch13: vec_reve element order reversal builtins
gcc/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390-builtin-types.def: Add new builtin function type.
* config/s390/s390-builtins.def: Add overloaded builtin
s390_vec_reve and low-level builtins for s390_vler and s390_vster.
* config/s390/s390.md (UNSPEC_VEC_ELTSWAP): New constant definition.
* config/s390/vecintrin.h (vec_reve): New builtin name definition.
* config/s390/vx-builtins.md (V_HW_HSD): New mode iterator.
("eltswap<mode>"): New expander.
("*eltswapv16qi", "*eltswap<mode>", "*eltswap<mode>_emu"): New
insn definitions.
gcc/testsuite/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* gcc.target/s390/zvector/vec-reve-load-byte-z14.c: New test.
* gcc.target/s390/zvector/vec-reve-load-byte.c: New test.
* gcc.target/s390/zvector/vec-reve-load-halfword-z14.c: New test.
* gcc.target/s390/zvector/vec-reve-load-halfword.c: New test.
* gcc.target/s390/zvector/vec-reve-store-byte-z14.c: New test.
* gcc.target/s390/zvector/vec-reve-store-byte.c: New test.
Andreas Krebbel [Tue, 2 Apr 2019 11:01:06 +0000 (11:01 +0000)]
S/390: arch13: vec_revb vector byte swap builtin
gcc/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390-builtin-types.def: Add new builtin function types.
* config/s390/s390-builtins.def: Add overloaded builtin
s390_vec_revb. Add low-level builtins for vlbr and vstbr
instructions.
* config/s390/vecintrin.h (vec_revb): New builtin name definition.
* config/s390/vector.md (VT_HW_HSDT): New mode iterator.
("bswap<mode>"): New expander.
("*bswap<mode>", "*bswap<mode>_emu"): New insn definitions.
gcc/testsuite/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* gcc.target/s390/zvector/vec-revb-load-double-z14.c: New test.
* gcc.target/s390/zvector/vec-revb-load-double.c: New test.
* gcc.target/s390/zvector/vec-revb-store-double-z14.c: New test.
* gcc.target/s390/zvector/vec-revb-store-double.c: New test.
Andreas Krebbel [Tue, 2 Apr 2019 10:59:30 +0000 (10:59 +0000)]
S/390: arch13: New vector builtins - preparation
gcc/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390-builtins.def (B_VXE2): New builtin flag definition.
* config/s390/s390-c.c (s390_cpu_cpp_builtins_internal): Increment
vector builtin version number in __VEC__.
Andreas Krebbel [Tue, 2 Apr 2019 10:58:33 +0000 (10:58 +0000)]
S/390: arch13: Support 32 bit fp-int scalar converts
gcc/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390.md (VX_CONV_BFP, VX_CONV_INT): New mode
iterators.
(SFSI): New mode attribute.
("*fixuns_truncdfdi2_vx", "*fix_truncdfdi2_bfp_z13")
("*floatunsdidf2_z13", ): Add support for 32 bit conversions and
rename to ...
("*fixuns_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_z13")
("*fix_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_bfp_z13")
("*floatuns<VX_CONV_INT:mode><VX_CONV_BFP:mode>2_z13"): ... these.
("floatsi<mode>2"): Add wcefb instruction.
Andreas Krebbel [Tue, 2 Apr 2019 10:57:39 +0000 (10:57 +0000)]
S/390: arch13: Support 32 bit fp-int vector converts
gcc/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390.md ("xde"): Extend mode attribute to vector
types.
* config/s390/vector.md (VX_VEC_CONV_BFP, VX_VEC_CONV_INT): New
mode iterators.
("floatv2div2df2", "floatunsv2div2df2", "fix_truncv2dfv2di2")
("fixuns_truncv2dfv2di2"): Enhance with mode iterator to also
support 32 bit fp-int conversions. Rename to ...
("float<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2")
("floatuns<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2")
("fix_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2")
("fixuns_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2"):
... to these.
gcc/testsuite/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* gcc.target/s390/arch13/fp-signedint-convert-1.c: New test.
* gcc.target/s390/arch13/fp-unsignedint-convert-1.c: New test.
Andreas Krebbel [Tue, 2 Apr 2019 10:56:34 +0000 (10:56 +0000)]
S/390: arch13: Add support for new select instruction
Compared to the load on condition instructions we already have the new
select instruction allows to have a THEN and and ELSE source operand -
but only for register to register loads.
gcc/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390.c (s390_rtx_costs): Do not add extra costs for
if-then-else constructs if we can use the select instruction.
* config/s390/s390.md ("*mov<mode>cc"): Add the new instructions.
gcc/testsuite/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
Andreas Krebbel [Tue, 2 Apr 2019 10:51:53 +0000 (10:51 +0000)]
S/390: arch13: Support new bit operations
Make use of the new bit operation instructions when generating code
for the arch13 level.
gcc/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390.c (s390_canonicalize_comparison): Convert
certain compares for arch13 in order to make use of the condition
code result produced by the new instructions.
(s390_rtx_costs): Adjust the costs for nnrk, nngrk, nork, nogrk,
nxrk, and nxgrk instruction patterns.
* config/s390/s390.md (ANDOR, bitops_name, inv_bitops_name)
(inv_no): Add new code iterator together with some attributes.
("*andc_split_<mode>"): Disable splitter for arch13.
("*<ANDOR:bitops_name>c<GPR:mode>_cc")
("*<ANDOR:bitops_name>c<GPR:mode>_cconly")
("*<ANDOR:bitops_name>c<GPR:mode>")
("*n<ANDOR:inv_bitops_name><GPR:mode>_cc")
("*n<ANDOR:inv_bitops_name><mode>_cconly")
("*n<ANDOR:inv_bitops_name><mode>", "*nxor<GPR:mode>_cc")
("*nxor<mode>_cconly", "*nxor<mode>"): New insn definitions.
gcc/testsuite/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* gcc.target/s390/arch13/bitops-1.c: New test.
* gcc.target/s390/arch13/bitops-2.c: New test.
* gcc.target/s390/md/andc-splitter-1.c: Add -march=z14 build
option and adjust line numbers.
* gcc.target/s390/md/andc-splitter-2.c: Likewise.
Andreas Krebbel [Tue, 2 Apr 2019 10:50:03 +0000 (10:50 +0000)]
S/390: arch13: Add arch13 as architecture option
This patch enables the command line options and provides the proper
macros for checking.
gcc/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* common/config/s390/s390-common.c (processor_flags_table): New
entry for arch13.
* config.gcc: Support arch13 with the --with-arch= configure flag.
* config/s390/driver-native.c (s390_host_detect_local_cpu):
* config/s390/s390-opts.h (enum processor_type): Add PROCESSOR_ARCH13.
* config/s390/s390.c (s390_get_sched_attrmask)
(s390_get_unit_mask): Add PROCESSOR_ARCH13.
* config/s390/s390.h (enum processor_flags): Add PF_VXE2 and PF_ARCH13.
* config/s390/s390.md (TARGET_CPU_ARCH13, TARGET_CPU_ARCH13_P)
(TARGET_CPU_VXE2, TARGET_CPU_VXE2_P, TARGET_ARCH13)
(TARGET_ARCH13_P, TARGET_VXE2, TARGET_VXE2_P): New macro
definitions.
* config/s390/s390.opt: Support arch13 as processor type in
command line options.
gcc/testsuite/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* gcc.target/s390/s390.exp: Run tests in arch13 subdir.
* lib/target-supports.exp (check_effective_target_s390_vxe2): New
runtime check for the vxe2 hardware feature on IBM Z.
Eric Botcazou [Tue, 2 Apr 2019 07:40:30 +0000 (07:40 +0000)]
linux64.h (ASAN_REJECT_SPEC): New macro.
* config/sparc/linux64.h (ASAN_REJECT_SPEC): New macro.
(ASAN_CC1_SPEC): Use it in 64-bit mode.
* config/sparc/sol2.h (ASAN_REJECT_SPEC): Remove superfluous colon.
Jason Merrill [Mon, 1 Apr 2019 20:43:13 +0000 (16:43 -0400)]
PR c++/86946 - ICE with function call in template argument.
DR 1321 clarified that two dependent names are equivalent if the names are
the same, even if the result of name lookup is different. We need to
implement that in hashing like we already do in comparison and mangling.
* pt.c (iterative_hash_template_arg) [CALL_EXPR]: Use
dependent_name.
Use single-visitation in variant assignment and swap and relops.
Also use indices instead of types when checking whether
variants hold the same thing.
* include/std/variant (__do_visit): Add a template parameter
for index visitation, invoke with indices if index visitation
is used.
(__variant_idx_cookie): New.
(__visit_with_index): Likewise.
(_Copy_assign_base::operator=): Do single-visitation with
an index visitor.
(_Move_assign_base::operator=): Likewise.
(_Extra_visit_slot_needed): Adjust.
(__visit_invoke): Call with indices if it's an index visitor.
(relops): Do single-visitation with an index visitor.
(swap): Likewise.
(__visitor_result_type): New.
Martin Liska [Mon, 1 Apr 2019 07:17:38 +0000 (09:17 +0200)]
Enhance option suggestion for options expected an argument (PR driver/89861).
2019-04-01 Martin Liska <mliska@suse.cz>
PR driver/89861
* opt-suggestions.c (option_proposer::build_option_suggestions):
Add variant without any argument in order to provide better
hints.
2019-04-01 Martin Liska <mliska@suse.cz>
PR driver/89861
* gcc.dg/spellcheck-options-18.c: New test.
* gcc.dg/spellcheck-options-19.c: New test.
* gcc.dg/spellcheck-options-20.c: New test.
* gcc.dg/spellcheck-options-13.c: Adjust expected output.
* gcc.dg/completion-2.c: Add one variant with no argument.
The D2 testsuite script has been updated to handle EXTRA_SOURCES and
EXTRA_FILES settings being split across multiple lines, which is how
they appear in upstream.
* gdc.test/gdc-test.exp (gdc-copy-extra): Append copied files to
cleanup_extra_files.
(dmd2dg): Copy additional files after test is processed.
(gdc-do-test): Remove all copied files after test.
Paul Thomas [Sat, 30 Mar 2019 15:39:00 +0000 (15:39 +0000)]
re PR fortran/89841 (improper descriptor information passed to C)
2019-03-30 Paul Thomas <pault@gcc.gnu.org>
PR fortran/89841
* trans-expr.c (gfc_conv_gfc_desc_to_cfi_desc): Use the formal
argument attributes rather than those of the actual argument.
PR fortran/89842
* trans-expr.c (gfc_conv_gfc_desc_to_cfi_desc): Call
'set_dtype_for_unallocated' for any type of arrayspec.
2019-03-30 Paul Thomas <pault@gcc.gnu.org>
PR fortran/89841
* gfortran.dg/ISO_Fortran_binding_1.f90: Change the interfaces
for c_deallocate, c_allocate and c_assumed_size so that the
attributes of the array arguments are correct and are typed.
* gfortran.dg/ISO_Fortran_binding_7.f90: New test.
* gfortran.dg/ISO_Fortran_binding_7.c: Additional source.
PR fortran/89842
* gfortran.dg/ISO_Fortran_binding_8.f90: New test.
* gfortran.dg/ISO_Fortran_binding_8.c: Additional source.
Jason Merrill [Sat, 30 Mar 2019 15:23:37 +0000 (11:23 -0400)]
PR c++/89744 - ICE with specialization of member class template.
My fix five years ago for PR 60241 was incomplete: when we reassign implicit
instances of a partial instantiation of a member template to the explicit
specialization of that partial instantiation, we also need to adjust the
CLASSTYPE_TI_ARGS to match what we'd get when looking up that instance after
the explicit specialization. We also need to do this when we later look up
the instance in a way that only finds the explicit specialization halfway
through lookup_template_class_1.
* pt.c (lookup_template_class_1): If the partial instantiation is
explicitly specialized, adjust.
(maybe_process_partial_specialization): Also adjust
CLASSTYPE_TI_ARGS.
re PR rtl-optimization/89862 (LTO bootstrap fails for ARM)
2019-03-29 Kugan Vivekanandarajah <kuganv@linaro.org>
Eric Botcazou <ebotcazou@adacore.com>
PR rtl-optimization/89862
* rtl.h (word_register_operation_p): Exclude CONST_INT from operations
that operates on the full registers for WORD_REGISTER_OPERATIONS
architectures.
Co-Authored-By: Eric Botcazou <ebotcazou@adacore.com>
From-SVN: r270030
Jim Wilson [Fri, 29 Mar 2019 21:51:58 +0000 (21:51 +0000)]
RISC-V: Fix __riscv_compressed regression.
This was accidentally broken by the patch adding ELF attribute support.
The __riscv_compressed predefined macro is not being defined when the
target supports the C extension. The fix adds testcases to verify that
all of the predefined macros are correct for various option combinations.
gcc/
* common/config/riscv/riscv-common.c (riscv_parse_arch_string):
Clear MASK_RVC and then set if C subset supported.
Jakub Jelinek [Fri, 29 Mar 2019 20:51:15 +0000 (21:51 +0100)]
re PR rtl-optimization/89865 (FAIL: gcc.target/i386/pr49095.c scan-assembler-times \\\\), % 45)
PR rtl-optimization/89865
* gcc.target/i386/pr49095.c: Include in scan-assembler-times patterns
the first argument register, so that occassional spills/fills are
ignored.
Jakub Jelinek [Fri, 29 Mar 2019 20:10:19 +0000 (21:10 +0100)]
re PR sanitizer/89869 (-fsanitize=undefined miscompilation)
PR sanitizer/89869
* typeck.c: Include gimplify.h.
(cp_build_modify_expr) <case COND_EXPR>: Unshare rhs before using it
for second time. Formatting fixes.
Martin Liska [Fri, 29 Mar 2019 11:45:39 +0000 (12:45 +0100)]
Fix multiple values for -fdbg-cnt.
2019-03-29 Martin Liska <mliska@suse.cz>
* dbgcnt.c (dbg_cnt_process_single_pair): Fix GNU coding style.
(dbg_cnt_process_opt): Parse first tokens aas
dbg_cnt_process_single_pair is also using strtok.
Jakub Jelinek [Thu, 28 Mar 2019 22:33:29 +0000 (23:33 +0100)]
re PR middle-end/89621 (ICE with allocatable character and openmp)
PR middle-end/89621
* tree-inline.h (struct copy_body_data): Add
dont_remap_vla_if_no_change flag.
* tree-inline.c (remap_type_3, remap_type_2): New functions.
(remap_type): Don't remap vla types if id->dont_remap_vla_if_no_change
and remap_type_2 returns false.
* omp-low.c (new_omp_context): Set ctx->cb.dont_remap_vla_if_no_change.
Move ctx->cb.adjust_array_error_bounds setting to the outermost ctx
only from where it is copied to nested contexts.
Marek Polacek [Thu, 28 Mar 2019 20:24:48 +0000 (20:24 +0000)]
PR c++/89612 - ICE with member friend template with noexcept.
* pt.c (maybe_instantiate_noexcept): For function templates, use their
template result (function decl). Don't set up local specializations.
Temporarily turn on processing_template_decl. Update the template type
too.
* g++.dg/cpp0x/noexcept38.C: New test.
* g++.dg/cpp0x/noexcept39.C: New test.
* g++.dg/cpp1z/noexcept-type21.C: New test.
Jakub Jelinek [Thu, 28 Mar 2019 14:47:47 +0000 (15:47 +0100)]
re PR c++/89785 (Incorrect "not a constant expression" error with switch statement that returns)
PR c++/89785
* constexpr.c (struct check_for_return_continue_data): New type.
(check_for_return_continue): New function.
(potential_constant_expression_1) <case SWITCH_STMT>: Walk
SWITCH_STMT_BODY to find RETURN_EXPRs or CONTINUE_STMTs not nested
in loop bodies and set *jump_target to that if found.
* g++.dg/cpp1y/constexpr-89785-1.C: New test.
* g++.dg/cpp1y/constexpr-89785-2.C: New test.
optrecord_json_writer::optinfo_to_json can in theory be called from any
optimization pass, but currently uses get_fnname_from_decl, which
is RTL-specific.
In that PR, Jakub suggested using either DECL_ASSEMBLER_NAME or the
"printable name" (via current_function_name).
This patch makes it use DECL_ASSEMBLER_NAME.
gcc/ChangeLog:
PR middle-end/89725
* optinfo-emit-json.cc (optrecord_json_writer::optinfo_to_json):
Use DECL_ASSEMBLER_NAME rather than get_fnname_from_decl.
* regcprop.c (copyprop_hardreg_forward_1): Remove redundant INSN_P
test.
(cprop_hardreg_bb, cprop_hardreg_debug): New functions.
(pass_cprop_hardreg::execute): Use those. Don't repeat bb processing
immediately after first one with df_analyze in between, but rather
process all bbs, queueing ones that need second pass in a worklist,
df_analyze, process queued debug insn changes and if second pass is
needed, process bbs from worklist, df_analyze, process queued debug
insns again.
Jakub Jelinek [Thu, 28 Mar 2019 14:07:40 +0000 (15:07 +0100)]
rtl.h (NONDEBUG_INSN_P): Define as NONJUMP_INSN_P or JUMP_P or CALL_P instead of INSN_P && !DEBUG_INSN_P.
* rtl.h (NONDEBUG_INSN_P): Define as NONJUMP_INSN_P or JUMP_P
or CALL_P instead of INSN_P && !DEBUG_INSN_P.
(INSN_P): Define using NONDEBUG_INSN_P or DEBUG_INSN_P.
git://gcc.gnu.org / gcc.git / log