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12 months agoDisable LRA for MMIX.
Hans-Peter Nilsson [Sat, 12 Aug 2023 21:01:25 +0000 (23:01 +0200)]
Disable LRA for MMIX.

Since the change r14-383-gfaf8bea79b6256 "Enable LRA on
several ports", mmix has been broken building libstdc++-v3:

libtool: compile: /obj/./gcc/xgcc -shared-libgcc -B/obj/./gcc
-nostdinc++ -L/obj/mmix/libstdc++-v3/src
-L/obj/mmix/libstdc++-v3/src/.libs
-L/obj/mmix/libstdc++-v3/libsupc++/.libs -nostdinc -B/obj/mmix/newlib/
-isystem /obj/mmix/newlib/targ-include -isystem
/gcctop/newlib/libc/include -B/obj/mmix/libgloss/mmix
-L/obj/mmix/libgloss/libnosys -L/gcctop/libgloss/mmix
-B/home/hp/tmp/mmix230811-00/pre/mmix/bin/
-B/home/hp/tmp/mmix230811-00/pre/mmix/lib/ -isystem
/home/hp/tmp/mmix230811-00/pre/mmix/include -isystem
/home/hp/tmp/mmix230811-00/pre/mmix/sys-include
-I/gcctop/libstdc++-v3/../libgcc -I/obj/mmix/libstdc++-v3/include/mmix
-I/obj/mmix/libstdc++-v3/include -I/gcctop/libstdc++-v3/libsupc++
-fno-implicit-templates -Wall -Wextra -Wwrite-strings -Wcast-qual
-Wabi=2 -fdiagnostics-show-location=once -ffunction-sections
-fdata-sections -frandom-seed=eh_type.lo -g -O2 -c
/gcctop/libstdc++-v3/libsupc++/eh_type.cc -o eh_type.o
/gcctop/libstdc++-v3/libsupc++/eh_terminate.cc: In function 'void
__cxxabiv1::__terminate(std::terminate_handler)':
/gcctop/libstdc++-v3/libsupc++/eh_terminate.cc:53:1: error: unable to
generate reloads for:

   53 | }
      | ^
(insn 31 36 44 4 (parallel [
            (unspec_volatile [
                    (plus:DI (reg/f:DI 253 $253)
                        (const_int 24 [0x18]))
                ] 1)
            (clobber (reg:DI 275))
            (clobber (reg:DI 259 rJ))
        ]) "/gcctop/libstdc++-v3/libsupc++/eh_terminate.cc":51:3
 discrim 1 63 {*nonlocal_goto_receiver_expanded}
     (expr_list:REG_UNUSED (reg:DI 275)
        (expr_list:REG_UNUSED (reg:DI 259 rJ)
            (nil))))
during RTL pass: reload
/gcctop/libstdc++-v3/libsupc++/eh_terminate.cc:53:1:
internal compiler error: in curr_insn_transform, at lra-constraints.cc:4281

This commit temporarily reverts the MMIX part of
r14-383-gfaf8bea79b6256 back to reload.

* config/mmix/mmix.cc: Disable LRA for MMIX.

12 months agoRISC-V: Support RVV VFWMACC rounding mode intrinsic API
Pan Li [Sun, 13 Aug 2023 07:58:28 +0000 (15:58 +0800)]
RISC-V: Support RVV VFWMACC rounding mode intrinsic API

This patch would like to support the rounding mode API for the
VFWMACC as the below samples.

* __riscv_vfwmacc_vv_f64m2_rm
* __riscv_vfwmacc_vv_f64m2_rm_m
* __riscv_vfwmacc_vf_f64m2_rm
* __riscv_vfwmacc_vf_f64m2_rm_m

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:

* config/riscv/riscv-vector-builtins-bases.cc
(class vfwmacc_frm): New class for vfwmacc frm.
(vfwmacc_frm_obj): New declaration.
(BASE): Ditto.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def
(vfwmacc_frm): Function definition for vfwmacc.
* config/riscv/riscv-vector-builtins.cc
(function_expander::use_widen_ternop_insn): Add frm support.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/float-point-fwmacc.c: New test.

12 months agoRISC-V: Support RVV VFNMSUB rounding mode intrinsic API
Pan Li [Sat, 12 Aug 2023 04:32:43 +0000 (12:32 +0800)]
RISC-V: Support RVV VFNMSUB rounding mode intrinsic API

This patch would like to support the rounding mode API for the
VFNMSUB as the below samples.

* __riscv_vfnmsub_vv_f32m1_rm
* __riscv_vfnmsub_vv_f32m1_rm_m
* __riscv_vfnmsub_vf_f32m1_rm
* __riscv_vfnmsub_vf_f32m1_rm_m

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:

* config/riscv/riscv-vector-builtins-bases.cc
(class vfnmsub_frm): New class for vfnmsub frm.
(vfnmsub_frm): New declaration.
(BASE): Ditto.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def
(vfnmsub_frm): New function declaration.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/float-point-nmsub.c: New test.

12 months ago[LRA]: Fix asserts for output stack pointer reloads
Vladimir N. Makarov [Mon, 14 Aug 2023 00:54:58 +0000 (20:54 -0400)]
[LRA]: Fix asserts for output stack pointer reloads

The patch implementing output stack pointer reloads contained superfluous
asserts.  The patch makes them useful.

gcc/ChangeLog:

* lra-constraints.cc (curr_insn_transform): Set done_p up and
check it on true after processing output stack pointer reload.

12 months agoDaily bump.
GCC Administrator [Mon, 14 Aug 2023 00:16:37 +0000 (00:16 +0000)]
Daily bump.

12 months agomodula-2, plugin: Fix Darwin bootstrap issues.
Iain Sandoe [Sun, 13 Aug 2023 09:51:42 +0000 (10:51 +0100)]
modula-2, plugin: Fix Darwin bootstrap issues.

This corrects some typos in the suffix of the m2rte pluing that
lead to a bootstrap fail on Darwin, where the suffix is not '.so'.

On some versions of Darwin, the linker complains if libSystem is not
linked, so we disable all the default libs, but add libc back.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
gcc/m2/ChangeLog:

* Make-lang.in: Update suffix spellings to use 'soext'.
Add libc to the plugin link.

12 months agoDaily bump.
GCC Administrator [Sun, 13 Aug 2023 00:16:46 +0000 (00:16 +0000)]
Daily bump.

12 months agoPR modula2/110779 SysClock can not read the clock (Darwin portability fixes)
Gaius Mulley [Sat, 12 Aug 2023 17:17:41 +0000 (18:17 +0100)]
PR modula2/110779 SysClock can not read the clock (Darwin portability fixes)

This patch adds corrections to defensively check against glibc functions,
structures and contains fallbacks.  These fixes were required under Darwin.

gcc/m2/ChangeLog:

PR modula2/110779
* gm2-libs-iso/SysClock.mod (EpochTime): New procedure.
(GetClock): Call EpochTime if the C time functions are
unavailable.
* gm2-libs-iso/wrapclock.def (istimezone): New function
definition.

libgm2/ChangeLog:

PR modula2/110779
* configure: Regenerate.
* configure.ac: Provide special case test for Darwin cross
configuration.
(GLIBCXX_CONFIGURE): New statement.
(GLIBCXX_CHECK_GETTIMEOFDAY): New statement.
(GLIBCXX_ENABLE_LIBSTDCXX_TIME): New statement.
* libm2iso/wrapclock.cc: New sys/time.h conditional include.
(sys/syscall.h): Conditional include.
(unistd.h): Conditional include.
(GetTimeRealtime): Re-implement.
(SetTimeRealtime): Re-implement.
(timezone): Re-implement.
(istimezone): New function.
(daylight): Re-implement.
(isdst): Re-implement.
(tzname): Re-implement.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
12 months agoPR modula2/108119 disable m2rte plugin by default
Gaius Mulley [Sat, 12 Aug 2023 12:43:14 +0000 (13:43 +0100)]
PR modula2/108119 disable m2rte plugin by default

This patch disables the m2rte plugin by default.  The driver
will only append the -fplugin=m2rte command line option for cc1gm2
if -fm2-plugin is present.  It only enabled providing ENABLE_PLUGIN
is defined.  gcc/m2/Make-file.in will only build and install m2rte
if enable_plugin is yes.

gcc/m2/ChangeLog:

PR modula2/108119
* Make-lang.in (M2RTE_PLUGIN_SO): Assigned to
plugin/m2rte$(exeext).so if enable_plugin is yes.
(m2.all.cross): Replace plugin/m2rte$(soext) with
$(M2RTE_PLUGIN_SO).
(m2.all.encap): Replace plugin/m2rte$(soext) with
$(M2RTE_PLUGIN_SO).
(m2.install-plugin): Add dummy rule when enable_plugin
is not yes.
(plugin/m2rte$(exeext).so): Add dummy rule when enable_plugin
is not yes.
(m2/stage2/cc1gm2$(exeext)): Replace plugin/m2rte$(soext) with
$(M2RTE_PLUGIN_SO).
(m2/stage1/cc1gm2$(exeext)): Replace plugin/m2rte$(soext) with
$(M2RTE_PLUGIN_SO).
* gm2spec.cc (lang_specific_driver): Set need_plugin to false
by default.

gcc/testsuite/ChangeLog:

PR modula2/108119
* gm2/iso/check/fail/iso-check-fail.exp (gm2_init_iso): Add -fm2-plugin.
* gm2/switches/auto-init/fail/switches-auto-init-fail.exp
(gm2_init_iso): Add -fm2-plugin.
* gm2/switches/check-all/pim2/fail/switches-check-all-pim2-fail.exp
(gm2_init_pim2): Add -fm2-plugin.
* gm2/switches/check-all/plugin/iso/fail/switches-check-all-plugin-iso-fail.exp
(gm2_init_iso): Add -fm2-plugin.
* gm2/switches/check-all/plugin/pim2/fail/switches-check-all-plugin-pim2-fail.exp
(gm2_init_pim2): Add -fm2-plugin.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
12 months agoAdd stdckdint.h header for C23
Jakub Jelinek [Sat, 12 Aug 2023 07:42:58 +0000 (09:42 +0200)]
Add stdckdint.h header for C23

This patch adds <stdckdint.h> header, which defines ckd_{add,sub,mul}
using __builtin_{add,sub,mul}_overflow.  As requested, it doesn't
pedantically diagnose things which work just fine, e.g. inputs with
plain char, bool, bit-precise integer or enumerated types and
result pointer to plain char or bit-precise integer.
The header will #include_next <stdckdint.h> so that C library can supply
its part if the header implementation in the future needs to be split
between parts under the control of the compiler and parts under the
control of C library.

2023-08-12  Jakub Jelinek  <jakub@redhat.com>

* Makefile.in (USER_H): Add stdckdint.h.
* ginclude/stdckdint.h: New file.

* gcc.dg/stdckdint-1.c: New test.
* gcc.dg/stdckdint-2.c: New test.

12 months agoRISC-V: Add TAREGT_VECTOR check into VLS modes
Juzhe-Zhong [Sat, 12 Aug 2023 02:30:02 +0000 (10:30 +0800)]
RISC-V: Add TAREGT_VECTOR check into VLS modes

This patch fixes bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110994

This is caused VLS modes incorrect codes int register allocation.

The original case trigger the ICE is fortran code but I can reproduce
with a C code.

gcc/ChangeLog:

PR target/110994
* config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.

gcc/testsuite/ChangeLog:

PR target/110994
* gcc.target/riscv/rvv/autovec/vls/pr110994.c: New test.

12 months agotree-pretty-print: delimit TREE_VEC with braces
Patrick Palka [Sat, 12 Aug 2023 01:13:52 +0000 (21:13 -0400)]
tree-pretty-print: delimit TREE_VEC with braces

This makes the generic pretty printer print braces around a TREE_VEC,
like we do for CONSTRUCTOR.  This should improve readability of nested
TREE_VECs in particular.

gcc/ChangeLog:

* tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
Delimit output with braces.

12 months agoc++: bogus warning w/ deduction guide in anon ns [PR106604]
Patrick Palka [Sat, 12 Aug 2023 01:13:23 +0000 (21:13 -0400)]
c++: bogus warning w/ deduction guide in anon ns [PR106604]

Here we're unintentionally issuing a "declared static but never defined"
warning from wrapup_namespace_globals for a deduction guide declared in
an anonymous namespace.  This patch fixes this by giving deduction guides
a dummy DECL_INITIAL, which suppresses the warning and also allows us to
simplify redeclaration checking for them.

Co-authored-by: Jason Merrill <jason@redhat.com>
PR c++/106604

gcc/cp/ChangeLog:

* decl.cc (redeclaration_error_message): Remove special handling
for deduction guides.
(grokfndecl): Give deduction guides a dummy DECL_INITIAL.

gcc/testsuite/ChangeLog:

* g++.dg/cpp1z/class-deduction74.C: Expect "defined" instead
of "declared" in the repeated deduction guide diagnostics.
* g++.dg/cpp1z/class-deduction116.C: New test.

12 months agolibstdc++: Use __bool_constant entirely
Ken Matsui [Sat, 15 Jul 2023 02:55:35 +0000 (19:55 -0700)]
libstdc++: Use __bool_constant entirely

This patch uses __bool_constant entirely instead of integral_constant<bool>
in the type_traits header, specifically for true_type, false_type,
and bool_constant.

libstdc++-v3/ChangeLog:

* include/std/type_traits (true_type): Use __bool_constant
instead.
(false_type): Likewise.
(bool_constant): Likewise.

Signed-off-by: Ken Matsui <kmatsui@gcc.gnu.org>
Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
12 months agoRISC-V: Fix vec_series expander[PR110985]
Juzhe-Zhong [Fri, 11 Aug 2023 08:45:26 +0000 (16:45 +0800)]
RISC-V: Fix vec_series expander[PR110985]

This patch fix bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110985

gcc/ChangeLog:
PR target/110985
* config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.

gcc/testsuite/ChangeLog:
PR target/110985
* gcc.target/riscv/rvv/autovec/vls-vlmax/pr110985.c: New test.

12 months agoRISC-V: Allow CONST_VECTOR for VLS modes
Juzhe-Zhong [Fri, 11 Aug 2023 09:56:01 +0000 (17:56 +0800)]
RISC-V: Allow CONST_VECTOR for VLS modes

This patch enables COSNT_VECTOR for VLS modes.

void foo1 (int * __restrict a)
{
    for (int i = 0; i < 16; i++)
      a[i] = 8;
}

void foo2 (int * __restrict a)
{
    for (int i = 0; i < 16; i++)
      a[i] = i;
}

Compile option: -O3 --param=riscv-autovec-preference=scalable

Before this patch:

foo1:
        lui     a5,%hi(.LC0)
        addi    a5,a5,%lo(.LC0)
        vsetivli        zero,4,e32,m1,ta,ma
        addi    a4,a0,16
        vle32.v v1,0(a5)
        vse32.v v1,0(a0)
        vse32.v v1,0(a4)
        addi    a4,a0,32
        vse32.v v1,0(a4)
        addi    a0,a0,48
        vse32.v v1,0(a0)
        ret
foo2:
        lui     a5,%hi(.LC1)
        addi    a5,a5,%lo(.LC1)
        vsetivli        zero,4,e32,m1,ta,ma
        vle32.v v1,0(a5)
        lui     a5,%hi(.LC2)
        addi    a5,a5,%lo(.LC2)
        vse32.v v1,0(a0)
        vle32.v v1,0(a5)
        lui     a5,%hi(.LC3)
        addi    a4,a0,16
        addi    a5,a5,%lo(.LC3)
        vse32.v v1,0(a4)
        vle32.v v1,0(a5)
        addi    a4,a0,32
        lui     a5,%hi(.LC4)
        vse32.v v1,0(a4)
        addi    a0,a0,48
        addi    a5,a5,%lo(.LC4)
        vle32.v v1,0(a5)
        vse32.v v1,0(a0)
        ret

After this patch:

foo1:
vsetivli zero,16,e32,mf2,ta,ma
vmv.v.i v1,8
vse32.v v1,0(a0)
ret
.size foo1, .-foo1
.align 1
.globl foo2
.type foo2, @function
foo2:
vsetivli zero,16,e32,mf2,ta,ma
vid.v v1
vse32.v v1,0(a0)
ret

gcc/ChangeLog:

* config/riscv/autovec.md: Add VLS CONST_VECTOR.
* config/riscv/riscv.cc (riscv_const_insns): Ditto.
* config/riscv/vector.md: Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vls/def.h: Add VLS CONST_VECTOR tests.
* gcc.target/riscv/rvv/autovec/vls/const-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/const-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/const-3.c: New test.
* gcc.target/riscv/rvv/autovec/vls/const-4.c: New test.
* gcc.target/riscv/rvv/autovec/vls/const-5.c: New test.
* gcc.target/riscv/rvv/autovec/vls/series-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/series-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/series-3.c: New test.
* gcc.target/riscv/rvv/autovec/vls/series-4.c: New test.

12 months agoDaily bump.
GCC Administrator [Sat, 12 Aug 2023 00:17:36 +0000 (00:17 +0000)]
Daily bump.

12 months agolibstdc++: Fix std::format_to_n return value [PR110990]
Jonathan Wakely [Fri, 11 Aug 2023 22:02:44 +0000 (23:02 +0100)]
libstdc++: Fix std::format_to_n return value [PR110990]

When writing to a contiguous iterator, std::format_to_n(out, n, ...)
always returns out + n, even if it wrote fewer than n characters to the
iterator.

The problem is in the _M_finish() member function of the _Iter_sink
specialization for contiguous iterators. _M_finish() calls _M_overflow()
to update its count of characters written, so it can return the count of
characters that would be written if there was room. But _M_overflow()
assumes it's only called when the buffer is full, and so switches to the
internal buffer. _M_finish() then thinks that if the internal buffer is
in use, we already wrote at least n characters and so returns out+n as
the output position.

We can fix the problem by adding a check in _M_overflow() so that we
don't update the count and switch to the internal buffer unless we've
run out of room, i.e. _M_unused().size() is zero. The caller then needs
to be prepared for _M_count not being the final total, and so add
_M_used.size() to it.

However, there's not actually any need for _M_finish() to call
_M_overflow() to get the count. We now need to use _M_count and
_M_used.size() to get the total anyway so _M_overflow() doesn't help
with that. And we don't need to use _M_overflow() to flush unwritten
characters to the output, because the specialization for contiguous
iterators always writes directly to the output without buffering (except
when we've exceeded the maximum number of characters, in which case we
want to discard the buffered characters anyway). So _M_finish() can be
simplified and can avoid calling _M_overflow().

This change also fixes some member functions of other sink classes to
only call _M_overflow() when there are characters in the buffer, which
is needed to meet _M_overflow's precondition that _M_used().size()!=0.

libstdc++-v3/ChangeLog:

PR libstdc++/110990
* include/std/format (_Seq_sink::get): Only call _M_overflow if
its precondition is met.
(_Iter_sink::_M_finish): Likewise.
(_Iter_sink<C, ContigIter>::_M_overflow): Only switch to the
internal buffer after running out of space.
(_Iter_sink<C, ContigIter>::_M_finish): Do not use _M_overflow.
(_Counting_sink::count): Likewise.
* testsuite/std/format/functions/format_to_n.cc: Check cases
where the output fits into the buffer.

12 months agoanalyzer: new warning: -Wanalyzer-unterminated-string [PR105899]
David Malcolm [Fri, 11 Aug 2023 22:05:48 +0000 (18:05 -0400)]
analyzer: new warning: -Wanalyzer-unterminated-string [PR105899]

This patch adds new functions to the analyzer for checking that
an argument at a callsite is a pointer to a valid null-terminated
string, and uses this for the following known functions:

- error (param 3, the format string)
- error_at_line (param 5, the format string)
- putenv
- strchr (1st param)
- strcpy (2nd param)
- strdup

Currently the check merely detects pointers to unterminated string
constants, and adds a new -Wanalyzer-unterminated-string to complain
about that.  I'm experimenting with detecting other ways in which
a buffer can fail to be null-terminated, and for other problems with
such buffers, but this patch at least adds the framework for wiring
up the check to specific parameters of known_functions.

gcc/analyzer/ChangeLog:
PR analyzer/105899
* analyzer.opt (Wanalyzer-unterminated-string): New.
* call-details.cc
(call_details::check_for_null_terminated_string_arg): New.
* call-details.h
(call_details::check_for_null_terminated_string_arg): New decl.
* kf-analyzer.cc (class kf_analyzer_get_strlen): New.
(register_known_analyzer_functions): Register it.
* kf.cc (kf_error::impl_call_pre): Check that format arg is a
valid null-terminated string.
(kf_putenv::impl_call_pre): Likewise for the sole param.
(kf_strchr::impl_call_pre): Likewise for the first param.
(kf_strcpy::impl_call_pre): Likewise for the second param.
(kf_strdup::impl_call_pre): Likewise for the sole param.
* region-model.cc (get_strlen): New.
(struct call_arg_details): New.
(inform_about_expected_null_terminated_string_arg): New.
(class unterminated_string_arg): New.
(region_model::check_for_null_terminated_string_arg): New.
* region-model.h
(region_model::check_for_null_terminated_string_arg): New decl.

gcc/ChangeLog:
PR analyzer/105899
* doc/analyzer.texi (__analyzer_get_strlen): New.
* doc/invoke.texi: Add -Wanalyzer-unterminated-string.

gcc/testsuite/ChangeLog:
PR analyzer/105899
* gcc.dg/analyzer/analyzer-decls.h (__analyzer_get_strlen): New.
* gcc.dg/analyzer/error-1.c (test_error_unterminated): New.
(test_error_at_line_unterminated): New.
* gcc.dg/analyzer/null-terminated-strings-1.c: New test.
* gcc.dg/analyzer/putenv-1.c (test_unterminated): New.
* gcc.dg/analyzer/strchr-1.c (test_unterminated): New.
* gcc.dg/analyzer/strcpy-1.c (test_unterminated): New.
* gcc.dg/analyzer/strdup-1.c (test_unterminated): New.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
12 months ago[committed] Fix subdi3 synthesis on rx port
Jeff Law [Fri, 11 Aug 2023 21:52:57 +0000 (15:52 -0600)]
[committed] Fix subdi3 synthesis on rx port

Some of Andrew's recent match.pd changes triggered a regression in my tester
for the rx processor for c-torture/execute/pr66940.c which would be exposed
only during an LTO compilation.

Specifically the subdi3_internal pattern had the wrong idiom to detect a carry
from the high word into the low word.  It had the wrong opcode and the operands
were reversed.

This resulted in combine doing a simplification that was valid according to the
presented RTL, but which ultimately got the wrong result.

I would often say this was a latent bug.  But the testsuite shows
builtin-arith-overflow-14 and builtin-arith-overflow-p18 failures are fixed as
well.  So it's been visible indefinitely, but nobody's ever looked into those
failures.

Committed to the trunk.

gcc/
* config/rx/rx.md (subdi3): Fix test for borrow.

12 months agoVECT: Fix ICE on MASK_LEN_{LOAD, STORE} when no LEN recorded[PR110989]
Juzhe-Zhong [Fri, 11 Aug 2023 13:55:42 +0000 (21:55 +0800)]
VECT: Fix ICE on MASK_LEN_{LOAD, STORE} when no LEN recorded[PR110989]

This ICE is caused because of this situation:

mask__49.21_99 = vect__17.19_96 == { 0.0, ... };
...
vect__6.24_107 = .MASK_LEN_LOAD (vectp.22_105, 32B, mask__49.21_99, POLY_INT_CST [2, 2], 0);

The MASK_LEN_LOAD is using real MASK which is produced by the EQ comparison wheras the LEN
is the dummy LEN which is the vectorization factor.

In this situation, we didn't enter 'vect_record_loop_len' since there is no LEN loop control.
Then 'LOOP_VINFO_RGROUP_IV_TYPE' is not suitable type for 'build_int_cst' used for producing
LEN argument for 'MASK_LEN_LOAD', so use sizetype instead which is perfectly matching
RVV length requirement.

gcc/ChangeLog:
PR middle-end/110989
* tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
(vectorizable_load): Ditto.

gcc/testsuite/ChangeLog:
PR middle-end/110989
* gcc.target/riscv/rvv/autovec/pr110989.c: New test.

12 months agoRISC-V: Specify -mabi for ztso testcases
Patrick O'Neill [Fri, 11 Aug 2023 18:53:14 +0000 (11:53 -0700)]
RISC-V: Specify -mabi for ztso testcases

On rv32 targets, this patch fixes ztso testcases errors like this:
cc1: error: ABI requires '-march=rv32'

2023-08-11 Patrick O'Neill <patrick@rivosinc.com>

gcc/testsuite/ChangeLog:

* gcc.target/riscv/amo-table-ztso-amo-add-1.c: Add -mabi=lp64d
to dg-options.
* gcc.target/riscv/amo-table-ztso-amo-add-2.c: Ditto.
* gcc.target/riscv/amo-table-ztso-amo-add-3.c: Ditto.
* gcc.target/riscv/amo-table-ztso-amo-add-4.c: Ditto.
* gcc.target/riscv/amo-table-ztso-amo-add-5.c: Ditto.
* gcc.target/riscv/amo-table-ztso-compare-exchange-1.c: Ditto.
* gcc.target/riscv/amo-table-ztso-compare-exchange-2.c: Ditto.
* gcc.target/riscv/amo-table-ztso-compare-exchange-3.c: Ditto.
* gcc.target/riscv/amo-table-ztso-compare-exchange-4.c: Ditto.
* gcc.target/riscv/amo-table-ztso-compare-exchange-5.c: Ditto.
* gcc.target/riscv/amo-table-ztso-compare-exchange-6.c: Ditto.
* gcc.target/riscv/amo-table-ztso-compare-exchange-7.c: Ditto.
* gcc.target/riscv/amo-table-ztso-fence-1.c: Ditto.
* gcc.target/riscv/amo-table-ztso-fence-2.c: Ditto.
* gcc.target/riscv/amo-table-ztso-fence-3.c: Ditto.
* gcc.target/riscv/amo-table-ztso-fence-4.c: Ditto.
* gcc.target/riscv/amo-table-ztso-fence-5.c: Ditto.
* gcc.target/riscv/amo-table-ztso-load-1.c: Ditto.
* gcc.target/riscv/amo-table-ztso-load-2.c: Ditto.
* gcc.target/riscv/amo-table-ztso-load-3.c: Ditto.
* gcc.target/riscv/amo-table-ztso-store-1.c: Ditto.
* gcc.target/riscv/amo-table-ztso-store-2.c: Ditto.
* gcc.target/riscv/amo-table-ztso-store-3.c: Ditto.
* gcc.target/riscv/amo-table-ztso-subword-amo-add-1.c: Ditto.
* gcc.target/riscv/amo-table-ztso-subword-amo-add-2.c: Ditto.
* gcc.target/riscv/amo-table-ztso-subword-amo-add-3.c: Ditto.
* gcc.target/riscv/amo-table-ztso-subword-amo-add-4.c: Ditto.
* gcc.target/riscv/amo-table-ztso-subword-amo-add-5.c: Ditto.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
12 months agolibstdc++: Implement C++20 std::chrono::parse [PR104167]
Jonathan Wakely [Fri, 21 Jul 2023 16:19:08 +0000 (17:19 +0100)]
libstdc++: Implement C++20 std::chrono::parse [PR104167]

This adds the missing C++20 features to <chrono>.

I've implemented my proposed resolutions to LWG issues 3960, 3961, and
3962. There are some unimplemented flags such as %OI which I think are
not implementable in general. It might be possible to use na_llanginfo
with ALT_DIGITS, but that isn't available on all targets. I intend to
file another LWG issue about that.

libstdc++-v3/ChangeLog:

PR libstdc++/104167
* include/bits/chrono_io.h (operator|=, operator|): Add noexcept
to _ChronoParts operators.
(from_stream, parse): Define new functions.
(__detail::_Parse, __detail::_Parser): New class templates.
* include/std/chrono (__cpp_lib_chrono): Define to 201907L for
C++20.
* include/std/version (__cpp_lib_chrono): Likewise.
* testsuite/20_util/duration/arithmetic/constexpr_c++17.cc:
Adjust expected value of feature test macro.
* testsuite/20_util/duration/io.cc: Test parsing.
* testsuite/std/time/clock/file/io.cc: Likewise.
* testsuite/std/time/clock/gps/io.cc: Likewise.
* testsuite/std/time/clock/system/io.cc: Likewise.
* testsuite/std/time/clock/tai/io.cc: Likewise.
* testsuite/std/time/clock/utc/io.cc: Likewise.
* testsuite/std/time/day/io.cc: Likewise.
* testsuite/std/time/month/io.cc: Likewise.
* testsuite/std/time/month_day/io.cc: Likewise.
* testsuite/std/time/weekday/io.cc: Likewise.
* testsuite/std/time/year/io.cc: Likewise.
* testsuite/std/time/year_month/io.cc: Likewise.
* testsuite/std/time/year_month_day/io.cc: Likewise.
* testsuite/std/time/syn_c++20.cc: Check value of macro and for
the existence of parse and from_stream in namespace chrono.
* testsuite/std/time/clock/local/io.cc: New test.
* testsuite/std/time/parse.cc: New test.

12 months agobpf: liberate R9 for general register allocation
Jose E. Marchesi [Thu, 10 Aug 2023 19:17:53 +0000 (21:17 +0200)]
bpf: liberate R9 for general register allocation

We were reserving one of the hard registers in BPF in order to
implement dynamic stack allocation: alloca and VLAs. However, there is
kernel code that has inline assembly that requires all the non-fixed
registers to be available for register allocation.

This patch:

1. Liberates r9 that is now available for register allocation.

2. Adds a check to GCC so it errors out if the user tries to do
   dynamic stack allocation.  A couple of tests are added for this.

3. Changes xbpf so it no longer saves and restores callee-saved
   registers.  A couple of tests for this have been removed.

4. Adds bpf-*-* to the list of targets that do not support alloca in
   target-support.exp.

Tested in host x86_64-linux-gnu and target bpf-unknown-none.

gcc/ChangeLog

* config/bpf/bpf.md (allocate_stack): Define.
* config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
stack pointer register.
(FIXED_REGISTERS): Adjust accordingly.
(CALL_USED_REGISTERS): Likewise.
(REG_CLASS_CONTENTS): Likewise.
(REGISTER_NAMES): Likewise.
* config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
space for callee-saved registers.
(bpf_expand_prologue): Do not save callee-saved registers in xbpf.
(bpf_expand_epilogue): Do not restore callee-saved registers in
xbpf.

gcc/testsuite/ChangeLog

* lib/target-supports.exp (check_effective_target_alloca): BPF
target does not support alloca.
* gcc.target/bpf/diag-alloca-1.c: New test.
* gcc.target/bpf/diag-alloca-2.c: Likewise.
* gcc.target/bpf/xbpf-callee-saved-regs-1.c: Remove test.
* gcc.target/bpf/xbpf-callee-saved-regs-2.c: Likewise.
* gcc.target/bpf/regs-availability-1.c: Likewise.

12 months agobpf: allow exceeding max num of args in BPF when always_inline
Jose E. Marchesi [Thu, 10 Aug 2023 08:53:16 +0000 (10:53 +0200)]
bpf: allow exceeding max num of args in BPF when always_inline

BPF currently limits the number of registers used to pass arguments to
functions to five registers.  There is a check for this at function
expansion time.  However, if a function is guaranteed to be always
inlined (and its body never generated) by virtue of the always_inline
attribute, it can "receive" any number of arguments.

Tested in host x86_64-linux-gnu and target bpf-unknown-none.

gcc/ChangeLog

* config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
about too many arguments if function is always inlined.

gcc/testsuite/ChangeLog

* gcc.target/bpf/diag-funargs-inline-1.c: New test.
* gcc.target/bpf/diag-funargs.c: Adapt test.

12 months agoanalyzer: More features for CPython analyzer plugin [PR107646]
Eric Feng [Fri, 11 Aug 2023 16:30:43 +0000 (12:30 -0400)]
analyzer: More features for CPython analyzer plugin [PR107646]

This patch adds known function subclasses for Python/C API functions
PyList_New, PyLong_FromLong, and PyList_Append. It also adds new
optional parameters for
region_model::get_or_create_region_for_heap_alloc, allowing for the
newly allocated region to immediately transition from the start state to
the assumed non-null state in the malloc state machine if desired.
Finally, it adds a new procedure, dg-require-python-h, intended as a
directive in Python-related analyzer tests, to append necessary Python
flags during the tests' build process.

The main warnings we gain in this patch with respect to the known function
subclasses mentioned are leak related. For example:

rc3.c: In function ‘create_py_object’:

rc3.c:21:10: warning: leak of ‘item’ [CWE-401] [-Wanalyzer-malloc-leak]

   21 |   return list;
      │
      |          ^~~~

  ‘create_py_object’: events 1-4

    |

    |    4 |   PyObject* item = PyLong_FromLong(10);

    |      |                    ^~~~~~~~~~~~~~~~~~~

    |      |                    |

    |      |                    (1) allocated here

    |      |                    (2) when ‘PyLong_FromLong’ succeeds

    |    5 |   PyObject* list = PyList_New(2);

    |      |                    ~~~~~~~~~~~~~

    |      |                    |

    |      |                    (3) when ‘PyList_New’ fails

    |......

    |   21 |   return list;

    |      |          ~~~~

    |      |          |

    |      |          (4) ‘item’ leaks here; was allocated at (1)


Some concessions were made to
simplify the analysis process when comparing kf_PyList_Append with the
real implementation. In particular, PyList_Append performs some
optimization internally to try and avoid calls to realloc if
possible. For simplicity, we assume that realloc is called every time.
Also, we grow the size by just 1 (to ensure enough space for adding a
new element) rather than abide by the heuristics that the actual implementation
follows.

gcc/analyzer/ChangeLog:
PR analyzer/107646
* call-details.h: New function.
* region-model.cc (region_model::get_or_create_region_for_heap_alloc):
New optional parameters.
* region-model.h (class region_model): New optional parameters.
* sm-malloc.cc (on_realloc_with_move): New function.
(region_model::transition_ptr_sval_non_null): New function.

gcc/testsuite/ChangeLog:
PR analyzer/107646
* gcc.dg/plugin/analyzer_cpython_plugin.c: Analyzer support for
PyList_New, PyList_Append, PyLong_FromLong
* gcc.dg/plugin/plugin.exp: New test.
* lib/target-supports.exp: New procedure.
* gcc.dg/plugin/cpython-plugin-test-2.c: New test.

Signed-off-by: Eric Feng <ef2648@columbia.edu>
12 months agoc++: dependently scoped template-id in type-req [PR110927]
Patrick Palka [Fri, 11 Aug 2023 17:26:02 +0000 (13:26 -0400)]
c++: dependently scoped template-id in type-req [PR110927]

Here we're incorrectly rejecting the first type-requirement at parse
time with

  concepts-requires35.C:14:56: error: ‘typename A<T>::B’ is not a template [-fpermissive]

We also incorrectly reject the second type-requirement at satisfaction time
with

  concepts-requires35.C:17:34: error: ‘typename A<int>::B’ names ‘template<class U> struct A<int>::B’, which is not a type

and similarly for the third type-requirement.  This seems to happen only
within a type-requirement; if we instead use e.g. an alias template then
it works as expected.

The difference ultimately seems to be that during parsing of a using-decl,
we pass check_dependency_p=true to cp_parser_nested_name_specifier_opt
whereas for a type-requirement we pass check_dependency_p=false.
Passing =false causes cp_parser_template_id for the dependently-scoped
template-id B<bool> to create a TYPE_DECL of TYPENAME_TYPE (with
TYPENAME_IS_CLASS_P unexpectedly set in the last two cases) whereas
passing =true causes it to return a TEMPLATE_ID_EXPR.  We then call
make_typename_type on this TYPE_DECL which does the wrong thing.

Since there seems to be no justification for using check_dependency_p=false
here, the simplest fix seems to be to pass check_dependency_p=true instead,
matching the behavior of cp_parser_elaborated_type_specifier.

PR c++/110927

gcc/cp/ChangeLog:

* parser.cc (cp_parser_type_requirement): Pass
check_dependency_p=true instead of =false.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/concepts-requires35.C: New test.

12 months agoc++: recognize in-class var tmpl partial spec [PR71954]
Patrick Palka [Fri, 11 Aug 2023 17:25:58 +0000 (13:25 -0400)]
c++: recognize in-class var tmpl partial spec [PR71954]

This makes us recognize member variable template partial specializations
defined directly inside the class body.  It seems we mainly just need to
call check_explicit_specialization when we see a static TEMPLATE_ID_EXPR
data member, which sets SET_DECL_TEMPLATE_SPECIALIZATION for us and which
we otherwise don't call (for the out-of-class case we call it from
grokvardecl).

We also need to make finish_member_template_decl return NULL_TREE for
such partial specializations, matching its behavior for class template
partial specializations, so that later we don't try to register it as a
separate member declaration.

PR c++/71954

gcc/cp/ChangeLog:

* decl.cc (grokdeclarator): Pass 'dname' instead of
'unqualified_id' as the name when building the VAR_DECL for a
static data member.  Call check_explicit_specialization for a
TEMPLATE_ID_EXPR such member.
* pt.cc (finish_member_template_decl): Return NULL_TREE
instead of 'decl' when DECL_TEMPLATE_SPECIALIZATION is not
set.

gcc/testsuite/ChangeLog:

* g++.dg/cpp1y/var-templ84.C: New test.
* g++.dg/cpp1y/var-templ84a.C: New test.

12 months agolibstdc++: Do not call log10(0.0) in std::format [PR110860]
Jonathan Wakely [Fri, 11 Aug 2023 17:10:29 +0000 (18:10 +0100)]
libstdc++: Do not call log10(0.0) in std::format [PR110860]

Calling log10(0.0) returns -inf which has undefined behaviour when
converted to an integer. We only need to use log10 for large values
anyway. If the value is zero then the larger buffer is only needed due
to a large precision, so we don't need to use log10 to estimate the
number of digits for the significand.

libstdc++-v3/ChangeLog:

PR libstdc++/110860
* include/std/format (__formatter_fp::format): Do not call log10
with zero values.

12 months agoMAINTAINERS: Add myself to write after approval
Eric Feng [Fri, 11 Aug 2023 17:04:59 +0000 (13:04 -0400)]
MAINTAINERS: Add myself to write after approval

ChangeLog:

* MAINTAINERS: Add myself.

Signed-off-by: Eric Feng <ef2648@columbia.edu>
12 months agoc++: improve debug_tree for templated types/decls
Patrick Palka [Fri, 11 Aug 2023 16:50:52 +0000 (12:50 -0400)]
c++: improve debug_tree for templated types/decls

gcc/cp/ChangeLog:

* ptree.cc (cxx_print_decl): Check for DECL_LANG_SPECIFIC and
TS_DECL_COMMON only when necessary.  Print DECL_TEMPLATE_INFO
for all decls that have it, not just VAR_DECL or FUNCTION_DECL.
Also print DECL_USE_TEMPLATE.
(cxx_print_type): Print TYPE_TEMPLATE_INFO.
<case BOUND_TEMPLATE_TEMPLATE_PARM>: Don't print TYPE_TI_ARGS
anymore.
<case TEMPLATE_TYPE/TEMPLATE_PARM>: Print TEMPLATE_TYPE_PARM_INDEX
instead of printing the index, level and original level
individually.

12 months agotree-pretty-print: handle COMPONENT_REF with non-decl RHS
Patrick Palka [Fri, 11 Aug 2023 16:17:24 +0000 (12:17 -0400)]
tree-pretty-print: handle COMPONENT_REF with non-decl RHS

In the C++ front end, a COMPONENT_REF's second operand isn't always a
decl (at least at template parse time).  This patch makes the generic
pretty printer not ICE when printing such a COMPONENT_REF.

gcc/ChangeLog:

* tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
Don't call component_ref_field_offset if the RHS isn't a decl.

12 months agoUse strtol instead of std::stoi [PR110646]
John David Anglin [Fri, 11 Aug 2023 15:44:37 +0000 (15:44 +0000)]
Use strtol instead of std::stoi [PR110646]

Implementation of std::stoi was overlooked on hppa-hpux, so use
strtol instead.

2023-08-11  John David Anglin  <danglin@gcc.gnu.org>

gcc/ChangeLog:

PR bootstrap/110646
* gensupport.cc(class conlist): Use strtol instead of std::stoi.

12 months agopreserve base pointer for __deregister_frame [PR110956]
Thomas Neumann [Fri, 11 Aug 2023 15:20:27 +0000 (09:20 -0600)]
preserve base pointer for __deregister_frame [PR110956]

Original bug report: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110956
Rainer Orth successfully tested the patch on Solaris with a full bootstrap.

Some uncommon unwinding table encodings need to access the base pointer
for address computations. We do not have that information in calls to
__deregister_frame_info_bases, and previously simply used nullptr as
base pointer. That is usually fine, but for some Solaris i386 shared
libraries that results in wrong address computations.

To fix this problem we now associate the unwinding object with
the table pointer itself, which is always known, in addition to
the PC range. When deregistering a frame, we first locate the object
using the table pointer, and then use the base pointer stored within
the object to compute the PC range.

libgcc/ChangeLog:
PR libgcc/110956
* unwind-dw2-fde.c: Associate object with address of unwinding
table.

12 months ago[LRA]: Implement output stack pointer reloads
Vladimir N. Makarov [Fri, 11 Aug 2023 11:57:37 +0000 (07:57 -0400)]
[LRA]: Implement output stack pointer reloads

LRA prohibited output stack pointer reloads but it resulted in LRA
failure for AVR target which has no arithmetic insns working with the
stack pointer register.  Given patch implements the output stack
pointer reloads.

gcc/ChangeLog:

* lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
(process_alt_operands): Set the flag.
(curr_insn_transform): Modify stack pointer offsets if output
stack pointer reload is generated.

12 months agolibstdc++: Handle invalid values in std::chrono pretty printers
Jonathan Wakely [Fri, 11 Aug 2023 11:27:58 +0000 (12:27 +0100)]
libstdc++: Handle invalid values in std::chrono pretty printers

This avoids an IndexError exception when printing invalid chrono::month
or chrono::weekday values.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py (StdChronoCalendarPrinter):
Check for out-of-range month an weekday indices.
* testsuite/libstdc++-prettyprinters/chrono.cc: Check invalid
month and weekday values.

12 months agolibstdc++: Revert accidentally committed change to bits/stl_iterator.h
Jonathan Wakely [Fri, 11 Aug 2023 13:27:30 +0000 (14:27 +0100)]
libstdc++: Revert accidentally committed change to bits/stl_iterator.h

In commit r14-3134-g9cb2a7c8d54b1f I only meant to change some uses of
__clamp_iter_cat to use __iter_category_t, I didn't mean to commit the
additional change introducing __clamped_iter_cat_t. This reverts that
part.

libstdc++-v3/ChangeLog:

* include/bits/stl_iterator.h (__clamped_iter_cat_t): Remove.

12 months agoconfig: Fix host -rdynamic detection for build != host != target
Joseph Myers [Fri, 11 Aug 2023 13:20:07 +0000 (13:20 +0000)]
config: Fix host -rdynamic detection for build != host != target

The GCC_ENABLE_PLUGINS configure logic for detecting whether -rdynamic
is necessary and supported uses an appropriate objdump for $host
binaries (running on $build) in cases where $host is $build or
$target.

However, it is missing such logic in the case where $host is neither
$build nor $target, resulting in the compilers not being linked with
-rdynamic and plugins not being usable with such a compiler.  In fact
$ac_cv_prog_OBJDUMP, as used when $build = $host, is always an objdump
for $host binaries that runs on $build; that is, it's appropriate to
use in this case as well.

Tested in such a configuration that it does result in cc1 being linked
with -rdynamic as expected.  Also bootstrapped with no regressions for
x86_64-pc-linux-gnu.

config/
* gcc-plugin.m4 (GCC_ENABLE_PLUGINS): Use
export_sym_check="$ac_cv_prog_OBJDUMP -T" also when host is not
build or target.

gcc/
* configure: Regenerate.

libcc1/
* configure: Regenerate.

12 months agotree-optimization/110979 - fold-left reduction and partial vectors
Richard Biener [Fri, 11 Aug 2023 11:00:17 +0000 (13:00 +0200)]
tree-optimization/110979 - fold-left reduction and partial vectors

When we vectorize fold-left reductions with partial vectors but
no target operation available we use a vector conditional to force
excess elements to zero.  But that doesn't correctly preserve
the sign of zero.  The following patch disables partial vector
support when we have to do that and also need to honor rounding
modes other than round-to-nearest.  When round-to-nearest is in
effect and we have to preserve the sign of zero instead use
negative zero for the excess elements.

PR tree-optimization/110979
* tree-vect-loop.cc (vectorizable_reduction): For
FOLD_LEFT_REDUCTION without target support make sure
we don't need to honor signed zeros and sign dependent rounding.

* gcc.dg/torture/pr110979.c: New testcase.

12 months agoImprove BB vectorization opt-info
Richard Biener [Fri, 11 Aug 2023 10:08:10 +0000 (12:08 +0200)]
Improve BB vectorization opt-info

The following makes us more correctly print the used vector size
when doing BB vectorization and also print all involved SLP graph
roots, not just the random one we ended up picking as leader.
In particular the last bit improves diffing opt-info between
different GCC revs but it also requires some testsuite adjustments.

* tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
subgraph entries.  Dump the used vector size based on the
SLP subgraph entry root vector type.

* g++.dg/vect/slp-pr87105.cc: Adjust.
* gcc.dg/vect/bb-slp-17.c: Likewise.
* gcc.dg/vect/bb-slp-20.c: Likewise.
* gcc.dg/vect/bb-slp-21.c: Likewise.
* gcc.dg/vect/bb-slp-22.c: Likewise.
* gcc.dg/vect/bb-slp-subgroups-2.c: Likewise.

12 months agoRISC-V: Support RVV VFMSUB rounding mode intrinsic API
Pan Li [Fri, 11 Aug 2023 10:08:14 +0000 (18:08 +0800)]
RISC-V: Support RVV VFMSUB rounding mode intrinsic API

This patch would like to support the rounding mode API for the
VFMSUB as the below samples.

* __riscv_vfmsub_vv_f32m1_rm
* __riscv_vfmsub_vv_f32m1_rm_m
* __riscv_vfmsub_vf_f32m1_rm
* __riscv_vfmsub_vf_f32m1_rm_m

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:

* config/riscv/riscv-vector-builtins-bases.cc
(class vfmsub_frm): New class for vfmsub frm.
(vfmsub_frm): New declaration.
(BASE): Ditto.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def
(vfmsub_frm): New function declaration.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/float-point-msub.c: New test.

12 months agoVECT: Add vec_mask_len_{load_lanes,store_lanes} patterns
Juzhe-Zhong [Fri, 11 Aug 2023 06:49:10 +0000 (14:49 +0800)]
VECT: Add vec_mask_len_{load_lanes,store_lanes} patterns

This patch is add vec_mask_len_{load_lanes,store_stores} autovectorization patterns.

Here we want to support this following autovectorization:

void
foo (int8_t *__restrict a,
int8_t *__restrict b,
int8_t *__restrict cond,
int n)
{
  for (intptr_t i = 0; i < n; ++i)
    {
      if (cond[i])
        a[i] = b[i * 2] + b[i * 2 + 1];
    }
}

ARM SVE IR:

https://godbolt.org/z/cro1Eqc6a

  # loop_mask_60 = PHI <next_mask_82(4), max_mask_81(3)>
  ...
  mask__39.12_63 = vect__3.11_61 != { 0, ... };
  vec_mask_and_66 = loop_mask_60 & mask__39.12_63;
  ...
  vect_array.15 = .MASK_LOAD_LANES (_57, 8B, vec_mask_and_66);
  ...

For RVV, we would like to see IR:

  loop_len = SELECT_VL;
  ...
  mask__39.12_63 = vect__3.11_61 != { 0, ... };
  ...
  vect_array.15 = .MASK_LEN_LOAD_LANES (_57, 8B, mask__39.12_63, loop_len, bias);
  ...

Bootstrap and Regression on X86 passed.

Ok for trunk ?

gcc/ChangeLog:

* doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
* internal-fn.cc (expand_partial_load_optab_fn): Ditto.
(expand_partial_store_optab_fn): Ditto.
* internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
(MASK_LEN_STORE_LANES): Ditto.
* optabs.def (OPTAB_CD): Ditto.

12 months agoRISC-V: Support RVV VFNMADD rounding mode intrinsic API
Pan Li [Fri, 11 Aug 2023 08:07:45 +0000 (16:07 +0800)]
RISC-V: Support RVV VFNMADD rounding mode intrinsic API

This patch would like to support the rounding mode API for the
VFNMADD as the below samples.

* __riscv_vfnmadd_vv_f32m1_rm
* __riscv_vfnmadd_vv_f32m1_rm_m
* __riscv_vfnmadd_vf_f32m1_rm
* __riscv_vfnmadd_vf_f32m1_rm_m

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:

* config/riscv/riscv-vector-builtins-bases.cc
(class vfnmadd_frm): New class for vfnmadd frm.
(vfnmadd_frm): New declaration.
(BASE): Ditto.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def
(vfnmadd_frm): New function declaration.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/float-point-nmadd.c: New test.

12 months agomatch.pd: Implement missed optimization ((x ^ y) & z) | x -> (z & y) | x [PR109938]
Drew Ross [Fri, 11 Aug 2023 08:17:56 +0000 (10:17 +0200)]
match.pd: Implement missed optimization ((x ^ y) & z) | x -> (z & y) | x [PR109938]

Adds a simplification for ((x ^ y) & z) | x to be folded into
(z & y) | x. Merges this simplification with ((x | y) & z) | x -> (z & y) | x
to prevent duplicate pattern.

2023-08-11  Drew Ross  <drross@redhat.com>
    Jakub Jelinek  <jakub@redhat.com>

PR tree-optimization/109938
* match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.

* gcc.c-torture/execute/pr109938.c: New test.
* gcc.dg/tree-ssa/pr109938.c: New test.

12 months agoRISC-V: Support RVV VFMADD rounding mode intrinsic API
Pan Li [Fri, 11 Aug 2023 07:15:47 +0000 (15:15 +0800)]
RISC-V: Support RVV VFMADD rounding mode intrinsic API

This patch would like to support the rounding mode API for the
VFMADD as the below samples.

* __riscv_vfmadd_vv_f32m1_rm
* __riscv_vfmadd_vv_f32m1_rm_m
* __riscv_vfmadd_vf_f32m1_rm
* __riscv_vfmadd_vf_f32m1_rm_m

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:

* config/riscv/riscv-vector-builtins-bases.cc
(class vfmadd_frm): New class for vfmadd frm.
(vfmadd_frm_obj): New declaration.
(BASE): Ditto.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def
(vfmadd_frm): New function definition.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/float-point-madd.c: New test.

12 months agoRISC-V: Support RVV VFNMSAC rounding mode intrinsic API
Pan Li [Fri, 11 Aug 2023 05:50:55 +0000 (13:50 +0800)]
RISC-V: Support RVV VFNMSAC rounding mode intrinsic API

This patch would like to support the rounding mode API for the
VFNMSAC for the below samples.

* __riscv_vfnmsac_vv_f32m1_rm
* __riscv_vfnmsac_vv_f32m1_rm_m
* __riscv_vfnmsac_vf_f32m1_rm
* __riscv_vfnmsac_vf_f32m1_rm_m

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:

* config/riscv/riscv-vector-builtins-bases.cc
(class vfnmsac_frm): New class for vfnmsac frm.
(vfnmsac_frm_obj): New declaration.
(BASE): Ditto.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def
(vfnmsac_frm): New function definition.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/float-point-nmsac.c: New test.

12 months agoc: Add __typeof_unqual__ and __typeof_unqual support
Jakub Jelinek [Fri, 11 Aug 2023 07:34:15 +0000 (09:34 +0200)]
c: Add __typeof_unqual__ and __typeof_unqual support

As I mentioned in my stdckdint.h mail, I think having __ prefixed
keywords for the typeof_unqual keyword which can be used in earlier
language modes can be useful, not all code can be switched to C23
right away.

The following patch implements that.  It keeps the non-C23 behavior
for it for the _Noreturn functions to stay compatible with how
__typeof__ behaves.

I think we don't need it for C++, in C++ we have standard
traits to remove qualifiers etc.

2023-08-11  Jakub Jelinek  <jakub@redhat.com>

gcc/
* doc/extend.texi (Typeof): Document typeof_unqual
and __typeof_unqual__.
gcc/c-family/
* c-common.cc (c_common_reswords): Add __typeof_unqual
and __typeof_unqual__ spellings of typeof_unqual.
gcc/c/
* c-parser.cc (c_parser_typeof_specifier): Handle
__typeof_unqual and __typeof_unqual__ as !is_std.
gcc/testsuite/
* gcc.dg/c11-typeof-2.c: New test.
* gcc.dg/c11-typeof-3.c: New test.
* gcc.dg/gnu11-typeof-3.c: New test.
* gcc.dg/gnu11-typeof-4.c: New test.

12 months agoFix PR 110954: wrong code with cmp | !cmp
Andrew Pinski [Wed, 9 Aug 2023 20:49:24 +0000 (13:49 -0700)]
Fix PR 110954: wrong code with cmp | !cmp

This was an oversight on my part forgetting that
cmp will might have a different true value than all ones
but will have a value of 1 in most cases.
This means if we have `(f < 0) | !(f < 0)` we would
optimize this to -1 rather than just 1.

This is version 2 of the patch.
Decided to go down a different route than just checking if
the precission was 1 inside bitwise_inverted_equal_p.
So instead bitwise_inverted_equal_p gets passed an argument
that will be set if there was a comparison that was being compared
and the user of bitwise_inverted_equal_p decides what needs to be done.
In most uses of bitwise_inverted_equal_p, the check will be
`!wascmp || element_precision (type) == 1` .
But in the case of `a & ~a` and `a ^| ~a` we can handle the case
of wascmp by using constant_boolean_node isntead.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/110954

gcc/ChangeLog:

* generic-match-head.cc (bitwise_inverted_equal_p): Add
wascmp argument and set it accordingly.
* gimple-match-head.cc (bitwise_inverted_equal_p): Add
wascmp argument to the macro.
(gimple_bitwise_inverted_equal_p): Add
wascmp argument and set it accordingly.
* match.pd (`a & ~a`, `a ^| ~a`): Update call
to bitwise_inverted_equal_p and handle wascmp case.
(`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
call to bitwise_inverted_equal_p and check to see
if was !wascmp or if precision was 1.

gcc/testsuite/ChangeLog:

* gcc.c-torture/execute/pr110954-1.c: New test.

12 months agoc: Support for -Wuseless-cast [PR84510]
Martin Uecker [Thu, 10 Aug 2023 08:39:41 +0000 (10:39 +0200)]
c: Support for -Wuseless-cast [PR84510]

Add support for Wuseless-cast C (and ObjC).

PR c/84510

gcc/c/:
* c-typeck.cc (build_c_cast): Add warning.

gcc/c-family/:
* c.opt: Enable warning for C and ObjC.

gcc/:
* doc/invoke.texi: Update.

gcc/testsuite/:
* gcc.dg/Wuseless-cast.c: New test.

12 months agoRISC-V: Support RVV VFMSAC rounding mode intrinsic API
Pan Li [Fri, 11 Aug 2023 02:06:38 +0000 (10:06 +0800)]
RISC-V: Support RVV VFMSAC rounding mode intrinsic API

This patch would like to support the rounding mode API for the
VFMSAC for the below samples.

* __riscv_vfmsac_vv_f32m1_rm
* __riscv_vfmsac_vv_f32m1_rm_m
* __riscv_vfmsac_vf_f32m1_rm
* __riscv_vfmsac_vf_f32m1_rm_m

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:

* config/riscv/riscv-vector-builtins-bases.cc
(class vfmsac_frm): New class for vfmsac frm.
(vfmsac_frm_obj): New declaration.
(BASE): Ditto.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def
(vfmsac_frm): New function definition

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/float-point-msac.c: New test.

12 months agoDaily bump.
GCC Administrator [Fri, 11 Aug 2023 00:16:45 +0000 (00:16 +0000)]
Daily bump.

12 months agolibstdc++: Fix out-of-bounds read in format string "{:{}." [PR110974]
Jonathan Wakely [Thu, 10 Aug 2023 22:15:29 +0000 (23:15 +0100)]
libstdc++: Fix out-of-bounds read in format string "{:{}." [PR110974]

libstdc++-v3/ChangeLog:

PR libstdc++/110974
* include/std/format (_Spec::_S_parse_width_or_precision): Check
for empty range before dereferencing iterator.
* testsuite/std/format/string.cc: Check for expected exception.
Fix expected exception message in test_pr110862() and actually
call it.

12 months agolibstdc++: Fix std::format for localized floats [PR110968]
Jonathan Wakely [Thu, 10 Aug 2023 13:33:44 +0000 (14:33 +0100)]
libstdc++: Fix std::format for localized floats [PR110968]

The __formatter_fp::_M_localize function just returns an empty string if
the formatting locale is the C locale, as there is nothing to do. But
the caller was assuming that the returned string contains the localized
string. The caller should use the original string if _M_localize returns
an empty string.

libstdc++-v3/ChangeLog:

PR libstdc++/110968
* include/std/format (__formatter_fp::format): Check return
value of _M_localize.
* testsuite/std/format/functions/format.cc: Check classic
locale.

12 months agolibstdc++: Use alias template for iterator_category [PR110970]
Jonathan Wakely [Thu, 10 Aug 2023 12:48:48 +0000 (13:48 +0100)]
libstdc++: Use alias template for iterator_category [PR110970]

This renames __iterator_category_t to __iter_category_t, for consistency
with std::iter_value_t, std::iter_difference_t and std::iter_reference_t
in C++20. Then use __iter_category_t in <bits/stl_iterator.h>, which
fixes the problem of the missing 'typename' that Clang 15 incorrectly
still requires.

libstdc++-v3/ChangeLog:

PR libstdc++/110970
* include/bits/stl_iterator.h (__detail::__move_iter_cat): Use
__iter_category_t.
(iterator_traits<common_iterator<I, S>>::_S_iter_cat): Likewise.
(__detail::__basic_const_iterator_iter_cat): Likewise.
* include/bits/stl_iterator_base_types.h (__iterator_category_t):
Rename to __iter_category_t.

12 months agoFix division by zero in loop splitting
Jan Hubicka [Thu, 10 Aug 2023 22:23:14 +0000 (00:23 +0200)]
Fix division by zero in loop splitting

Profile update I added to tree-ssa-loop-split can divide by zero in
situation that the conditional is predicted with 0 probability which
is triggered by jump threading update in the testcase.

gcc/ChangeLog:

PR middle-end/110923
* tree-ssa-loop-split.cc (split_loop): Watch for division by zero.

gcc/testsuite/ChangeLog:

PR middle-end/110923
* gcc.dg/tree-ssa/pr110923.c: New test.

12 months agoRISC-V: Add Ztso atomic mappings
Patrick O'Neill [Thu, 10 Aug 2023 21:05:50 +0000 (14:05 -0700)]
RISC-V: Add Ztso atomic mappings

The RISC-V Ztso extension currently has no effect on generated code.
With the additional ordering constraints guarenteed by Ztso, we can emit
more optimized atomic mappings than the RVWMO mappings.

This PR implements the Ztso psABI mappings[1].

[1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/391

2023-08-08 Patrick O'Neill <patrick@rivosinc.com>

gcc/ChangeLog:

* common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
dependent on 'a' extension.
* config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
(TARGET_ZTSO): New target.
* config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
Ztso case.
(riscv_memmodel_needs_amo_release): Add Ztso case.
(riscv_print_operand): Add Ztso case for LR/SC annotations.
* config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
* config/riscv/riscv.opt: Add Ztso target variable.
* config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
Ztso specific insn.
(atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
(atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
* config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
specific load/store/fence mappings.
* config/riscv/sync-ztso.md: New file. Seperate out Ztso
specific load/store/fence mappings.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/amo-table-ztso-amo-add-1.c: New test.
* gcc.target/riscv/amo-table-ztso-amo-add-2.c: New test.
* gcc.target/riscv/amo-table-ztso-amo-add-3.c: New test.
* gcc.target/riscv/amo-table-ztso-amo-add-4.c: New test.
* gcc.target/riscv/amo-table-ztso-amo-add-5.c: New test.
* gcc.target/riscv/amo-table-ztso-compare-exchange-1.c: New test.
* gcc.target/riscv/amo-table-ztso-compare-exchange-2.c: New test.
* gcc.target/riscv/amo-table-ztso-compare-exchange-3.c: New test.
* gcc.target/riscv/amo-table-ztso-compare-exchange-4.c: New test.
* gcc.target/riscv/amo-table-ztso-compare-exchange-5.c: New test.
* gcc.target/riscv/amo-table-ztso-compare-exchange-6.c: New test.
* gcc.target/riscv/amo-table-ztso-compare-exchange-7.c: New test.
* gcc.target/riscv/amo-table-ztso-fence-1.c: New test.
* gcc.target/riscv/amo-table-ztso-fence-2.c: New test.
* gcc.target/riscv/amo-table-ztso-fence-3.c: New test.
* gcc.target/riscv/amo-table-ztso-fence-4.c: New test.
* gcc.target/riscv/amo-table-ztso-fence-5.c: New test.
* gcc.target/riscv/amo-table-ztso-load-1.c: New test.
* gcc.target/riscv/amo-table-ztso-load-2.c: New test.
* gcc.target/riscv/amo-table-ztso-load-3.c: New test.
* gcc.target/riscv/amo-table-ztso-store-1.c: New test.
* gcc.target/riscv/amo-table-ztso-store-2.c: New test.
* gcc.target/riscv/amo-table-ztso-store-3.c: New test.
* gcc.target/riscv/amo-table-ztso-subword-amo-add-1.c: New test.
* gcc.target/riscv/amo-table-ztso-subword-amo-add-2.c: New test.
* gcc.target/riscv/amo-table-ztso-subword-amo-add-3.c: New test.
* gcc.target/riscv/amo-table-ztso-subword-amo-add-4.c: New test.
* gcc.target/riscv/amo-table-ztso-subword-amo-add-5.c: New test.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
12 months agoFix profile update in duplicat_loop_body_to_header_edge for loops with 0 count_in
Jan Hubicka [Thu, 10 Aug 2023 17:01:43 +0000 (19:01 +0200)]
Fix profile update in duplicat_loop_body_to_header_edge for loops with 0 count_in

this patch makes duplicate_loop_body_to_header_edge to not drop profile counts to
uninitialized when count_in is 0.  This happens because profile_probability in 0 count
is undefined.

gcc/ChangeLog:

* cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
0 iteration count.

12 months agoFix profile updating bug in tree-ssa-threadupdate
Jan Hubicka [Thu, 10 Aug 2023 16:39:33 +0000 (18:39 +0200)]
Fix profile updating bug in tree-ssa-threadupdate

ssa_fix_duplicate_block_edges later calls update_profile to correct profile after threading.
In the testcase this does not work since we lose track of the duplicated edge.  This
happens because redirect_edge_and_branch returns NULL if the edge already has correct
destination which is the case.

gcc/ChangeLog:

* tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/phi_on_compare-1.c: Check profile consistency.

12 months agoFix undefined behaviour in profile_count::differs_from_p
Jan Hubicka [Thu, 10 Aug 2023 16:35:13 +0000 (18:35 +0200)]
Fix undefined behaviour in profile_count::differs_from_p

This patch avoid overflow in profile_count::differs_from_p and also makes it to
return false from one of the values is undefined while other is defined.

gcc/ChangeLog:

* profile-count.cc (profile_count::differs_from_p): Fix overflow and
handling of undefined values.

12 months agophiopt: Fix phiopt ICE on vops [PR102989]
Jakub Jelinek [Thu, 10 Aug 2023 15:29:23 +0000 (17:29 +0200)]
phiopt: Fix phiopt ICE on vops [PR102989]

I've ran into ICE on gcc.dg/torture/bitint-42.c with -O1 or -Os
when enabling expensive tests, and unfortunately I can't reproduce without
_BitInt.  The IL before phiopt3 has:
  <bb 87> [local count: 203190070]:
  # .MEM_428 = VDEF <.MEM_367>
  bitint.159 = VIEW_CONVERT_EXPR<unsigned long[8]>(*.LC3);
  goto <bb 89>; [100.00%]

  <bb 88> [local count: 203190070]:
  # .MEM_427 = VDEF <.MEM_367>
  bitint.159 = VIEW_CONVERT_EXPR<unsigned long[8]>(*.LC4);

  <bb 89> [local count: 406380139]:
  # .MEM_368 = PHI <.MEM_428(87), .MEM_427(88)>
  # VUSE <.MEM_368>
  _123 = VIEW_CONVERT_EXPR<unsigned long[8]>(r495[i_107].D.2780)[0];
and factor_out_conditional_operation is called on the vop PHI, it
sees it has exactly two operands and defining statements of both
PHI arguments are converts (VCEs in this case), so it thinks it is
a good idea to try to optimize that and while doing that it constructs
void type SSA_NAMEs and the like.

2023-08-10  Jakub Jelinek  <jakub@redhat.com>

PR c/102989
* tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
return virtual phis and return NULL if there is a virtual phi
where the arguments from E0 and E1 edges aren't equal.

12 months agoMake ISEL used internal functions const/nothrow where appropriate
Richard Biener [Thu, 10 Aug 2023 12:19:38 +0000 (14:19 +0200)]
Make ISEL used internal functions const/nothrow where appropriate

Both .VEC_SET and .VEC_EXTACT and the various .VCOND internal functions
are operating on registers only and they are not supposed to raise
any exceptions.  The following makes them const/nothrow.  I've
verified this avoids useless SSA updates in ISEL.

* internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.

12 months agoRISC-V: Add MASK vec_duplicate pattern[PR110962]
Juzhe-Zhong [Thu, 10 Aug 2023 10:37:05 +0000 (18:37 +0800)]
RISC-V: Add MASK vec_duplicate pattern[PR110962]

This patch fix bug:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110962

SUBROUTINE a(b,c,d)
  LOGICAL,DIMENSION(INOUT)  :: b
  LOGICAL e
  REAL, DIMENSION(IN)     ::  c
  REAL, DIMENSION(INOUT)  ::  d
  REAL, DIMENSION(SIZE(c))   :: f
  WHERE (b.AND.e)
     WHERE (f>=0.)
        d = g
     ENDWHERE
  ENDWHERE
END SUBROUTINE a

   PR target/110962

gcc/ChangeLog:
PR target/110962
* config/riscv/autovec.md (vec_duplicate<mode>): New pattern.

12 months agoRISC-V: Support RVV VFNMACC rounding mode intrinsic API
Pan Li [Thu, 10 Aug 2023 08:00:17 +0000 (16:00 +0800)]
RISC-V: Support RVV VFNMACC rounding mode intrinsic API

This patch would like to support the rounding mode API for the
VFNMACC for the below samples.

* __riscv_vfnmacc_vv_f32m1_rm
* __riscv_vfnmacc_vv_f32m1_rm_m
* __riscv_vfnmacc_vf_f32m1_rm
* __riscv_vfnmacc_vf_f32m1_rm_m

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:

* config/riscv/riscv-vector-builtins-bases.cc
(class vfnmacc_frm): New class for vfnmacc.
(vfnmacc_frm_obj): New declaration.
(BASE): Ditto.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def
(vfnmacc_frm): New function definition.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/float-point-nmacc.c: New test.

12 months agoRISC-V: Support RVV VFMACC rounding mode intrinsic API
Pan Li [Thu, 3 Aug 2023 14:32:58 +0000 (22:32 +0800)]
RISC-V: Support RVV VFMACC rounding mode intrinsic API

This patch would like to support the rounding mode API for the
VFMACC for the below samples.

* __riscv_vfmacc_vv_f32m1_rm
* __riscv_vfmacc_vv_f32m1_rm_m
* __riscv_vfmacc_vf_f32m1_rm
* __riscv_vfmacc_vf_f32m1_rm_m

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:

* config/riscv/riscv-vector-builtins-bases.cc
(class vfmacc_frm): New class for vfmacc frm.
(vfmacc_frm_obj): New declaration.
(BASE): Ditto.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def
(vfmacc_frm): New function definition.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/float-point-macc.c: New test.

12 months agoRISC-V: Support TU for integer ternary OP[PR110964]
Juzhe-Zhong [Thu, 10 Aug 2023 09:21:46 +0000 (17:21 +0800)]
RISC-V: Support TU for integer ternary OP[PR110964]

PR target/110964

gcc/ChangeLog:
PR target/110964
* config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.

gcc/testsuite/ChangeLog:
PR target/110964
* gcc.target/riscv/rvv/autovec/pr110964.c: New test.

12 months agoRemove insert location argument from vectorizable_live_operation
Richard Biener [Wed, 9 Aug 2023 09:48:28 +0000 (11:48 +0200)]
Remove insert location argument from vectorizable_live_operation

The insert location argument isn't actually used but we compute
that ourselves.  There's a single spot, namely when asking
for the loop mask via vect_get_loop_mask that the passed argument
is used but that looks like an oversight.  The following fixes that
and adjusts vectorizable_live_operation and can_vectorize_live_stmts
to no longer take a stmt iterator argument.

* tree-vectorizer.h (vectorizable_live_operation): Remove
gimple_stmt_iterator * argument.
* tree-vect-loop.cc (vectorizable_live_operation): Likewise.
Adjust plumbing around vect_get_loop_mask.
(vect_analyze_loop_operations): Adjust.
* tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
(vect_bb_slp_mark_live_stmts): Likewise.
(vect_schedule_slp_node): Likewise.
* tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
Remove gimple_stmt_iterator * argument.
(vect_transform_stmt): Adjust.

12 months agoRISC-V: Add missing modes to the iterators
Juzhe-Zhong [Thu, 10 Aug 2023 08:55:18 +0000 (16:55 +0800)]
RISC-V: Add missing modes to the iterators

gcc/ChangeLog:

* config/riscv/vector-iterators.md: Add missing modes.

12 months agolto-streamer-in: Adjust assert [PR102989]
Jakub Jelinek [Thu, 10 Aug 2023 07:23:08 +0000 (09:23 +0200)]
lto-streamer-in: Adjust assert [PR102989]

With _BitInt(575) or any other _BitInt(513) or larger constants we can
run into this assertion.  MAX_BITSIZE_MODE_ANY_INT is just a value from
which WIDE_INT_MAX_PRECISION is derived.

2023-08-10  Jakub Jelinek  <jakub@redhat.com>

PR c/102989
* lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.

12 months agoexpr: Small optimization [PR102989]
Jakub Jelinek [Thu, 10 Aug 2023 07:22:03 +0000 (09:22 +0200)]
expr: Small optimization [PR102989]

Small optimization to avoid testing modifier multiple times.

2023-08-10  Jakub Jelinek  <jakub@redhat.com>

PR c/102989
* expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
times.

12 months agoi386: Do not sanitize upper part of V2HFmode and V4HFmode reg with -fno-trapping...
liuhongt [Wed, 9 Aug 2023 06:25:53 +0000 (14:25 +0800)]
i386: Do not sanitize upper part of V2HFmode and V4HFmode reg with -fno-trapping-math [PR110832]

Also add ix86_partial_vec_fp_math to to condition of V2HF/V4HF named
patterns in order to avoid generation of partial vector V8HFmode
trapping instructions.

gcc/ChangeLog:

PR target/110832
* config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
sanitize upper part of V4HFmode register with
-fno-trapping-math.
(<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
(<divv4hf3): Ditto.
(<insn>v2hf3): Ditto.
(divv2hf3): Ditto.
(movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
register with -fno-trapping-math.

12 months agoRISC-V: Refactor RVV frm_mode attr for rounding mode intrinsic
Pan Li [Sun, 6 Aug 2023 03:10:23 +0000 (11:10 +0800)]
RISC-V: Refactor RVV frm_mode attr for rounding mode intrinsic

The frm_mode attr has some assumptions for each define insn as below.

1. The define insn has at least 9 operands.
2. The operands[9] must be frm reg.
3. The operands[9] must be const int.

Actually, the frm operand can be operands[8], operands[9] or
operands[10], and not all the define insn has frm operands.

This patch would like to refactor frm and eliminate the above
assumptions, as well as unblock the underlying rounding mode intrinsic
API support.

After refactor, the default frm will be none, and the selected insn type
will be dyn. For the floating point which honors the frm, we will
set the frm_mode attr explicitly in define_insn.

Signed-off-by: Pan Li <pan2.li@intel.com>
Co-Authored-by: Kito Cheng <kito.cheng@sifive.com>
gcc/ChangeLog:

* config/riscv/riscv-protos.h
(enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
(get_frm_mode): New declaration.
* config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
* config/riscv/riscv-vector-builtins.cc
(function_expander::use_ternop_insn): Take care of frm reg.
* config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
(riscv_emit_frm_mode_set): Ditto.
(riscv_emit_mode_set): Ditto.
(riscv_frm_adjust_mode_after_call): Ditto.
(riscv_frm_mode_needed): Ditto.
(riscv_frm_mode_after): Ditto.
(riscv_mode_entry): Ditto.
(riscv_mode_exit): Ditto.
* config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
* config/riscv/vector.md
(rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
(symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.

12 months agoDaily bump.
GCC Administrator [Thu, 10 Aug 2023 00:17:26 +0000 (00:17 +0000)]
Daily bump.

12 months agoRISC-V: Fix VLMAX AVL incorrect local anticipate [VSETVL PASS]
Juzhe-Zhong [Wed, 9 Aug 2023 10:51:42 +0000 (18:51 +0800)]
RISC-V: Fix VLMAX AVL incorrect local anticipate [VSETVL PASS]

Realize we have a bug in VSETVL PASS which is triggered by strided_load_run-1.c in RV32 system.

FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-1.c execution test
FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-1.c execution test
FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-1.c execution test
FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-1.c execution test

This is because VSETVL PASS incorrect hoist vsetvl instruction:

...
   10156: 0d9075d7           vsetvli a1,zero,e64,m2,ta,ma ---> pollute 'a1' register which will be used by following insns.
   1015a: 01d586b3           add a3,a1,t4  --------> use 'a1'
   1015e: 5e070257           vmv.v.v v4,v14
   10162: b7032257           vmacc.vv v4,v6,v16
   10166: 26440257           vand.vv v4,v4,v8
   1016a: 22880227           vs2r.v v4,(a6)
   1016e: 00b6b7b3           sltu a5,a3,a1
   10172: 22888227           vs2r.v v4,(a7)
   10176: 9e60b157           vmv2r.v v2,v6
   1017a: 97ba                 add a5,a5,a4
   1017c: a6a62157           vmadd.vv v2,v12,v10
   10180: 26240157           vand.vv v2,v2,v8
   10184: 22830127           vs2r.v v2,(t1)
   10188: 873e                 mv a4,a5
   1018a: 982a                 add a6,a6,a0
   1018c: 98aa                 add a7,a7,a0
   1018e: 932a                 add t1,t1,a0
   10190: 85b6                 mv a1,a3       -----> set 'a1'
...

gcc/ChangeLog:

* config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
incorrect anticipate info.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-1.c:
Adapt test.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c: Ditto.

12 months agoanalyzer: remove default return value from region_model::on_call_pre
David Malcolm [Wed, 9 Aug 2023 20:17:04 +0000 (16:17 -0400)]
analyzer: remove default return value from region_model::on_call_pre

Previously, the code for simulating calls to external functions in
region_model::on_call_pre wrote a default svalue to the LHS of the
call statement, which could be further overwritten by known_function
subclasses.

Unfortunately, this led to messy hacks, such as when the default svalue
was an allocation: the LHS would be written to with two different
heap-allocated regions, requiring special-case cleanups to avoid the
stray state from the first heap allocation leading to state explosions;
see r14-3001-g021077b94741c9.

The following patch eliminates this write of a default svalue to the LHS
of callsite.  Instead, all known_function implementations that have a
return value are now responsible for set the LHS themselves.  A new
call_details::set_any_lhs_with_defaults function is provided to make it
easy to get the old behavior.

On working through the various known_function subclasses, I noticed that
memset was using the default behavior.  That patch updates this so that
it's now known to return its first parameter.

Cleaning this up eliminates various doubling of saved_diagnostics (e.g.
for dubious_allocation_size) where it was generating a diagnostic for
both writes to the LHS, deduplicating them to the first diagnostic (with
the default LHS), and then failing to create a region_creation_event
when emitting the diagnostic, leading to the fallback wording in
dubious_allocation_size::describe_final_event, such as:

  (1) allocated 42 bytes and assigned to ‘int32_t *’ {aka ‘int *’} here; ‘sizeof (int32_t {aka int})’ is ‘4’

Without the double write to the LHS, it creates a region_creation_event,
so we get the allocation and the assignment as two separate events in
the diagnostic path, e.g.:

  (1) allocated 42 bytes here
  (2) assigned to ‘int32_t *’ {aka ‘int *’} here; ‘sizeof (int32_t {aka int})’ is ‘4’

gcc/analyzer/ChangeLog:
* analyzer.h (class pure_known_function_with_default_return): New
subclass.
* call-details.cc (const_fn_p): Move here from region-model.cc.
(maybe_get_const_fn_result): Likewise.
(get_result_size_in_bytes): Likewise.
(call_details::set_any_lhs_with_defaults): New function, based on
code in region_model::on_call_pre.
* call-details.h (call_details::set_any_lhs_with_defaults): New
decl.
* diagnostic-manager.cc
(diagnostic_manager::emit_saved_diagnostic): Log the index of the
saved_diagnostic.
* kf.cc (pure_known_function_with_default_return::impl_call_pre):
New.
(kf_memset::impl_call_pre): Set the LHS to the first param.
(kf_putenv::impl_call_pre): Call cd.set_any_lhs_with_defaults.
(kf_sprintf::impl_call_pre): Call cd.set_any_lhs_with_defaults.
(class kf_stack_restore): Derive from
pure_known_function_with_default_return.
(class kf_stack_save): Likewise.
(kf_strlen::impl_call_pre): Call cd.set_any_lhs_with_defaults.
* region-model-reachability.cc (reachable_regions::handle_sval):
Remove logic for symbolic regions for pointers.
* region-model.cc (region_model::canonicalize): Remove purging of
dynamic extents workaround for surplus values from
region_model::on_call_pre's default LHS code.
(const_fn_p): Move to call-details.cc.
(maybe_get_const_fn_result): Likewise.
(get_result_size_in_bytes): Likewise.
(region_model::update_for_nonzero_return): Call
cd.set_any_lhs_with_defaults.
(region_model::on_call_pre): Remove the assignment to the LHS of a
default return value, instead requiring all known_function
implementations to write to any LHS of the call.  Use
cd.set_any_lhs_with_defaults on the non-kf paths.
* sm-fd.cc (kf_socket::outcome_of_socket::update_model): Use
cd.set_any_lhs_with_defaults when failing to get at fd state.
(kf_bind::outcome_of_bind::update_model): Likewise.
(kf_listen::outcome_of_listen::update_model): Likewise.
(kf_accept::outcome_of_accept::update_model): Likewise.
(kf_connect::outcome_of_connect::update_model): Likewise.
(kf_read::impl_call_pre): Use cd.set_any_lhs_with_defaults.
* sm-file.cc (class kf_stdio_output_fn): Derive from
pure_known_function_with_default_return.
(class kf_ferror): Likewise.
(class kf_fileno): Likewise.
(kf_fgets::impl_call_pre): Use cd.set_any_lhs_with_defaults.
(kf_read::impl_call_pre): Likewise.
(class kf_getc): Derive from
pure_known_function_with_default_return.
(class kf_getchar): Likewise.
* varargs.cc (kf_va_arg::impl_call_pre): Use
cd.set_any_lhs_with_defaults.

gcc/testsuite/ChangeLog:
* gcc.dg/analyzer/allocation-size-1.c: Update expected results
to reflect splitting of allocation size and assignment messages
from a single event into pairs of events
* gcc.dg/analyzer/allocation-size-2.c: Likewise.
* gcc.dg/analyzer/allocation-size-3.c: Likewise.
* gcc.dg/analyzer/allocation-size-4.c: Likewise.
* gcc.dg/analyzer/allocation-size-multiline-1.c: Likewise.
* gcc.dg/analyzer/allocation-size-multiline-2.c: Likewise.
* gcc.dg/analyzer/allocation-size-multiline-3.c: Likewise.
* gcc.dg/analyzer/memset-1.c (test_1): Verify that the return
value is the initial argument.
* gcc.dg/plugin/analyzer_kernel_plugin.c
(copy_across_boundary_fn::impl_call_pre): Ensure the LHS is set on
the "known zero size" case.
* gcc.dg/plugin/analyzer_known_fns_plugin.c
(known_function_attempt_to_copy::impl_call_pre): Likewise.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
12 months agoRISC-V: Remove non-existing 'Zve32d' extension
Tsukasa OI [Wed, 9 Aug 2023 19:59:43 +0000 (13:59 -0600)]
RISC-V: Remove non-existing 'Zve32d' extension

Since this extension does not exist, this commit prunes this from
the defined extension version table.

gcc/ChangeLog:

* common/config/riscv/riscv-common.cc (riscv_ext_version_table):
Remove 'Zve32d' from the version list.

12 months agoRISC-V: Handle no_insn in TARGET_SCHED_VARIABLE_ISSUE.
Jin Ma [Wed, 9 Aug 2023 19:52:06 +0000 (13:52 -0600)]
RISC-V: Handle no_insn in TARGET_SCHED_VARIABLE_ISSUE.

Reference: https://github.com/gcc-mirror/gcc/commit/d0bc0cb66bcb0e6a5a5a31a9e900e8ccc98e34e5

RISC-V should also be implemented to handle no_insn patterns for pipelining.

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
(TARGET_SCHED_VARIABLE_ISSUE): New macro.

Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
12 months agoRISC-V: Folding memory for FP + constant case
Jivan Hakobyan [Wed, 9 Aug 2023 19:26:58 +0000 (13:26 -0600)]
RISC-V: Folding memory for FP + constant case

Accessing local arrays element turned into load form (fp + (index << C1)) +
C2 address.

In the case when access is in the loop we got loop invariant computation.  For
some reason, moving out that part cannot be done in loop-invariant passes.  But
we can handle that in target-specific hook (legitimize_address).  That provides
an opportunity to rewrite memory access more suitable for the target
architecture.

This patch solves the mentioned case by rewriting mentioned case to ((fp +
C2) + (index << C1))

I have evaluated it on SPEC2017 and got an improvement on leela (over 7b
instructions, .39% of the dynamic count) and dwarfs the regression for gcc (14m
instructions, .0012% of the dynamic count).

gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
(mem_shadd_or_shadd_rtx_p): New function.

12 months agoMATCH: [PR110937/PR100798] (a ? ~b : b) should be optimized to b ^ -(a)
Andrew Pinski [Mon, 7 Aug 2023 17:47:09 +0000 (10:47 -0700)]
MATCH: [PR110937/PR100798] (a ? ~b : b) should be optimized to b ^ -(a)

This adds a simple match pattern for this case.
I noticed it a couple of different places.
One while I was looking at code generation of a parser and
also while I was looking at locations where bitwise_inverted_equal_p
should be used more.

Committed as approved after bootstrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/110937
PR tree-optimization/100798

gcc/ChangeLog:

* match.pd (`a ? ~b : b`): Handle this
case.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/bool-14.c: New test.
* gcc.dg/tree-ssa/bool-15.c: New test.
* gcc.dg/tree-ssa/phi-opt-33.c: New test.
* gcc.dg/tree-ssa/20030709-2.c: Update testcase
so `a ? -1 : 0` is not used to hit the match
pattern.

12 months agoi386: Add missing dot to -mpartial-vector-fp-math description
Uros Bizjak [Wed, 9 Aug 2023 17:41:11 +0000 (19:41 +0200)]
i386: Add missing dot to -mpartial-vector-fp-math description

gcc/ChangeLog:

* config/i386/i386.opt (mpartial-vector-fp-math): Add dot.

12 months agoaarch64: Add support for Cortex-A520 CPU
Richard Ball [Wed, 9 Aug 2023 15:28:58 +0000 (16:28 +0100)]
aarch64: Add support for Cortex-A520 CPU

This patch adds support for the Cortex-A520 CPU to GCC.

gcc/ChangeLog:

* config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi: Document Cortex-A520 CPU.

12 months agors6000: Fix __builtin_altivec_vcmpne{b,h,w} implementation
Carl Love [Wed, 9 Aug 2023 15:30:48 +0000 (11:30 -0400)]
rs6000: Fix __builtin_altivec_vcmpne{b,h,w} implementation

The current built-in definitions for vcmpneb, vcmpneh, vcmpnew are defined
under the Power 9 section of r66000-builtins.  This implies they are only
supported on Power 9 and above when in fact they are defined and work with
Altivec as well with the appropriate Altivec instruction generation.

The vec_cmpne builtin should generate the vcmpequ{b,h,w} instruction with
Altivec enabled and generate the vcmpne{b,h,w} on Power 9 and newer
processors.

This patch moves the definitions to the Altivec stanza to make it clear
the built-ins are supported for all Altivec processors.  The patch
removes the confusion as to which processors support the vcmpequ{b,h,w}
instructions.

There is existing test coverage for the vec_cmpne built-in for
vector bool char, vector bool short, vector bool int,
vector bool long long in builtins-3-p9.c and p8vector-builtin-2.c.
Coverage for vector signed int, vector unsigned int is in
p8vector-builtin-2.c.

Test vec-cmpne.c is updated to check the generation of the vcmpequ{b,h,w}
instructions for Altivec.  A new test vec-cmpne-runnable.c is added to
verify the built-ins work as expected.

Patch has been tested on Power 8 LE/BE, Power 9 LE/BE and Power 10 LE
with no regressions.

gcc/ChangeLog:

* config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
Move definitions to Altivec stanza.
* config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
define_expand.

gcc/testsuite/ChangeLog:

* gcc.target/powerpc/vec-cmpne-runnable.c: New execution test.
* gcc.target/powerpc/vec-cmpne.c (define_test_functions,
execute_test_functions): Move to vec-cmpne.h.  Add
scan-assembler-times for vcmpequb, vcmpequh, vcmpequw.
* gcc.target/powerpc/vec-cmpne.h: New include file for vec-cmpne.c
and vec-cmpne-runnable.c. Split define_test_functions definition
into define_test_functions and define_init_verify_functions.

12 months agolibstdc++: Fix constexpr functions to conform to older standards
Jonathan Wakely [Wed, 9 Aug 2023 10:11:31 +0000 (11:11 +0100)]
libstdc++: Fix constexpr functions to conform to older standards

Some constexpr functions were inadvertently relying on relaxed constexpr
rules from later standards.

libstdc++-v3/ChangeLog:

* include/bits/chrono.h (duration_cast): Do not use braces
around statements for C++11 constexpr rules.
* include/bits/stl_algobase.h (__lg): Rewrite as a single
statement for C++11 constexpr rules.
* include/experimental/bits/fs_path.h (path::string): Use
_GLIBCXX17_CONSTEXPR not _GLIBCXX_CONSTEXPR for 'if constexpr'.
* include/std/charconv (__to_chars_8): Initialize variable for
C++17 constexpr rules.

12 months agolibstdc++: Fix a -Wsign-compare warning in std::list
Jonathan Wakely [Wed, 9 Aug 2023 10:28:56 +0000 (11:28 +0100)]
libstdc++: Fix a -Wsign-compare warning in std::list

libstdc++-v3/ChangeLog:

* include/bits/list.tcc (list::sort(Cmp)): Fix -Wsign-compare
warning for loop condition.

12 months agolibstdc++: Suppress clang -Wc99-extensions warnings in <complex>
Jonathan Wakely [Tue, 8 Aug 2023 21:19:49 +0000 (22:19 +0100)]
libstdc++: Suppress clang -Wc99-extensions warnings in <complex>

This prevents Clang from warning about the use of the non-standard
__complex__ keyword.

libstdc++-v3/ChangeLog:

* include/std/complex: Add diagnostic pragma for clang.

12 months agolibstdc++: Fix some -Wmismatched-tags warnings
Jonathan Wakely [Tue, 8 Aug 2023 21:07:29 +0000 (22:07 +0100)]
libstdc++: Fix some -Wmismatched-tags warnings

libstdc++-v3/ChangeLog:

* include/bits/shared_ptr_atomic.h (atomic): Change class-head
to struct.
* include/bits/stl_tree.h (_Rb_tree_merge_helper): Change
class-head to struct in friend declaration.
* include/std/chrono (tzdb_list::_Node): Likewise.
* include/std/future (_Task_state_base, _Task_state): Likewise.
* include/std/scoped_allocator (__inner_type_impl): Likewise.
* include/std/valarray (_BinClos, _SClos, _GClos, _IClos)
(_ValFunClos, _RefFunClos): Change class-head to struct.

12 months agolibstdc++: Fix some -Wunused-parameter warnings
Jonathan Wakely [Tue, 8 Aug 2023 21:01:36 +0000 (22:01 +0100)]
libstdc++: Fix some -Wunused-parameter warnings

libstdc++-v3/ChangeLog:

* include/bits/alloc_traits.h (allocate): Add [[maybe_unused]]
attribute.
* include/bits/regex_executor.tcc: Remove name of unused
parameter.
* include/bits/shared_ptr_atomic.h (atomic_is_lock_free):
Likewise.
* include/bits/stl_uninitialized.h: Likewise.
* include/bits/streambuf_iterator.h (operator==): Likewise.
* include/bits/uses_allocator.h: Likewise.
* include/c_global/cmath (isfinite, isinf, isnan): Likewise.
* include/std/chrono (zoned_time): Likewise.
* include/std/future (__future_base::_S_allocate_result):
Likewise.
(packaged_task): Likewise.
* include/std/optional (_Optional_payload_base): Likewise.
* include/std/scoped_allocator (__inner_type_impl): Likewise.
* include/std/tuple (_Tuple_impl): Likewise.

12 months agolibstdc++: Explicitly default some copy ctors and assignments
Jonathan Wakely [Tue, 8 Aug 2023 15:24:31 +0000 (16:24 +0100)]
libstdc++: Explicitly default some copy ctors and assignments

The standard says that the implicit copy assignment operator is
deprecated for classes that have a user-provided copy constructor, and
vice versa.

libstdc++-v3/ChangeLog:

* include/bits/new_allocator.h (__new_allocator): Define copy
assignment operator as defaulted.
* include/std/complex (complex<float>, complex<double>)
(complex<long double>): Define copy constructor as defaulted.

12 months agolibstdc++: Minor fixes for some warnings in <format>
Jonathan Wakely [Tue, 8 Aug 2023 15:29:17 +0000 (16:29 +0100)]
libstdc++: Minor fixes for some warnings in <format>

libstdc++-v3/ChangeLog:

* include/std/format: Fix some warnings.
(__format::__write(Ctx&, basic_string_view<CharT>)): Remove
unused function template.

12 months agoRISC-V: Support NPATTERNS = 1 stepped vector[PR110950]
Juzhe-Zhong [Wed, 9 Aug 2023 12:18:40 +0000 (20:18 +0800)]
RISC-V: Support NPATTERNS = 1 stepped vector[PR110950]

This patch fix ICE: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110950

0x1cf8939 expand_const_vector
        ../../../riscv-gcc/gcc/config/riscv/riscv-v.cc:1587

PR target/110950

gcc/ChangeLog:

* config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
stepped vector support.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/pr110950.c: New test.

12 months agoFortran: Allow pure final procs contained in pure proc. [PR109684]
Paul Thomas [Wed, 9 Aug 2023 11:04:09 +0000 (12:04 +0100)]
Fortran: Allow pure final procs contained in pure proc. [PR109684]

2023-08-09  Steve Kargl  <sgk@troutmask.apl.washington.edu>

gcc/fortran
PR fortran/109684
* resolve.cc (resolve_types): Exclude contained procedures with
the artificial attribute from test for pureness.

12 months agoPR modula2/110779: libgm2 fix solaris bootstrap check for tm_gmtoff
Gaius Mulley [Wed, 9 Aug 2023 08:35:13 +0000 (09:35 +0100)]
PR modula2/110779: libgm2 fix solaris bootstrap check for tm_gmtoff

This patch defensively checks for every C function and every struct
used in wrapclock.cc.  It adds return values to GetTimespec and
SetTimespec to allow the module to return a code representing
unavailable.

gcc/m2/ChangeLog:

PR modula2/110779
* gm2-libs-iso/SysClock.mod (GetClock): Test GetTimespec
return value.
(SetClock): Test SetTimespec return value.
* gm2-libs-iso/wrapclock.def (GetTimespec): Add integer
return type.
(SetTimespec): Add integer return type.

libgm2/ChangeLog:

PR modula2/110779
* config.h.in: Regenerate.
* configure: Regenerate.
* configure.ac (AC_CACHE_CHECK): Check for tm_gmtoff field in
struct tm.
(GM2_CHECK_LIB): Check for daylight, timezone and tzname.
* libm2iso/wrapclock.cc (timezone): Guard against absence of
struct tm and tm_gmtoff.
(daylight): Check for daylight.
(timezone): Check for timezone.
(isdst): Check for isdst.
(tzname): Check for tzname.
(GetTimeRealtime): Check for struct timespec.
(SetTimeRealtime): Check for struct timespec.
(InitTimespec): Check for struct timespec.
(KillTimespec): Check for struct timespec.
(SetTimespec): Check for struct timespec.
(GetTimespec): Check for struct timespec.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
12 months agoRename local variable subleaf_level to max_subleaf_level.
liuhongt [Wed, 9 Aug 2023 06:41:46 +0000 (14:41 +0800)]
Rename local variable subleaf_level to max_subleaf_level.

gcc/ChangeLog:

* common/config/i386/cpuinfo.h (get_available_features):
Rename local variable subleaf_level to max_subleaf_level.

12 months agortl-optimization/110587 - speedup find_hard_regno_for_1
Richard Biener [Tue, 25 Jul 2023 13:36:30 +0000 (15:36 +0200)]
rtl-optimization/110587 - speedup find_hard_regno_for_1

The following applies a micro-optimization to find_hard_regno_for_1,
re-ordering the check so we can easily jump-thread by using an else.
This reduces the time spent in this function by 15% for the testcase
in the PR.

PR rtl-optimization/110587
* lra-assigns.cc (find_hard_regno_for_1): Re-order checks.

12 months agors6000: Teach legitimate_address_p about LEN_{LOAD,STORE} [PR110248]
Kewen Lin [Wed, 9 Aug 2023 06:15:46 +0000 (01:15 -0500)]
rs6000: Teach legitimate_address_p about LEN_{LOAD,STORE} [PR110248]

This patch is to teach rs6000_legitimate_address_p to
handle the queried rtx constructed for LEN_{LOAD,STORE},
since lxvl and stxvl doesn't support x-form or ds-form,
so consider it as not legitimate when outer code is PLUS.

PR tree-optimization/110248

gcc/ChangeLog:

* config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
legitimate when outer code is PLUS.

12 months agoivopts: Call valid_mem_ref_p with ifn [PR110248]
Kewen Lin [Wed, 9 Aug 2023 05:41:52 +0000 (00:41 -0500)]
ivopts: Call valid_mem_ref_p with ifn [PR110248]

As PR110248 shows, to get the expected query results for
that internal functions LEN_{LOAD,STORE} is able to adopt
some addressing modes, we need to pass down the related
IFN code as well.  This patch is to make IVOPTs pass down
ifn code for USE_PTR_ADDRESS type uses, it adjusts the
related functions {strict_,}memory_address_addr_space_p,
and valid_mem_ref_p as well.

PR tree-optimization/110248

gcc/ChangeLog:

* recog.cc (memory_address_addr_space_p): Add one more argument ch of
type code_helper and pass it to targetm.addr_space.legitimate_address_p
instead of ERROR_MARK.
(offsettable_address_addr_space_p): Update one function pointer with
one more argument of type code_helper as its assignees
memory_address_addr_space_p and strict_memory_address_addr_space_p
have been adjusted, and adjust some call sites with ERROR_MARK.
* recog.h (tree.h): New include header file for tree_code ERROR_MARK.
(memory_address_addr_space_p): Adjust with one more unnamed argument
of type code_helper with default ERROR_MARK.
(strict_memory_address_addr_space_p): Likewise.
* reload.cc (strict_memory_address_addr_space_p): Add one unnamed
argument of type code_helper.
* tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
type code_helper and pass it to memory_address_addr_space_p.
* tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
one more unnamed argument of type code_helper with default value
ERROR_MARK.
* tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
by default, change it with ifn code for USE_PTR_ADDRESS type use, and
pass it to all valid_mem_ref_p calls.

12 months agotarghooks: Extend legitimate_address_p with code_helper [PR110248]
Kewen Lin [Wed, 9 Aug 2023 05:02:26 +0000 (00:02 -0500)]
targhooks: Extend legitimate_address_p with code_helper [PR110248]

As PR110248 shows, some middle-end passes like IVOPTs can
query the target hook legitimate_address_p with some
artificially constructed rtx to determine whether some
addressing modes are supported by target for some gimple
statement.  But for now the existing legitimate_address_p
only checks the given mode, it's unable to distinguish
some special cases unfortunately, for example, for LEN_LOAD
ifn on Power port, we would expand it with lxvl hardware
insn, which only supports one register to hold the address
(the other register is holding the length), that is we
don't support base (reg) + index (reg) addressing mode for
sure.  But hook legitimate_address_p only considers the
given mode which would be some vector mode for LEN_LOAD
ifn, and we do support base + index addressing mode for
normal vector load and store insns, so the hook will return
true for the query unexpectedly.

This patch is to introduce one extra argument of type
code_helper for hook legitimate_address_p, it makes targets
able to handle some special case like what's described
above.

PR tree-optimization/110248

gcc/ChangeLog:

* coretypes.h (class code_helper): Add forward declaration.
* doc/tm.texi: Regenerate.
* lra-constraints.cc (valid_address_p): Call target hook
targetm.addr_space.legitimate_address_p with an extra parameter
ERROR_MARK as its prototype changes.
* recog.cc (memory_address_addr_space_p): Likewise.
* reload.cc (strict_memory_address_addr_space_p): Likewise.
* target.def (legitimate_address_p, addr_space.legitimate_address_p):
Extend with one more argument of type code_helper, update the
documentation accordingly.
* targhooks.cc (default_legitimate_address_p): Adjust for the
new code_helper argument.
(default_addr_space_legitimate_address_p): Likewise.
* targhooks.h (default_legitimate_address_p): Likewise.
(default_addr_space_legitimate_address_p): Likewise.
* config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
with extra unnamed code_helper argument with default ERROR_MARK.
* config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
* config/arc/arc.cc (arc_legitimate_address_p): Likewise.
* config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
(tree.h): New include for tree_code ERROR_MARK.
* config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
unnamed code_helper argument with default ERROR_MARK.
* config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
* config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
* config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
* config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
* config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
(tree.h): New include for tree_code ERROR_MARK.
* config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
unnamed code_helper argument with default ERROR_MARK.
* config/csky/csky.cc (csky_legitimate_address_p): Likewise.
* config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
Likewise.
* config/frv/frv.cc (frv_legitimate_address_p): Likewise.
* config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
* config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
* config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
* config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
* config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
* config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
* config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
* config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
Likewise.
* config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
(m32c_addr_space_legitimate_address_p): Likewise.
* config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
* config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
* config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
* config/microblaze/microblaze-protos.h (tree.h): New include for
tree_code ERROR_MARK.
(microblaze_legitimate_address_p): Adjust with extra unnamed
code_helper argument with default ERROR_MARK.
* config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
Likewise.
* config/mips/mips.cc (mips_legitimate_address_p): Likewise.
* config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
* config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
* config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
* config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
(msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
argument with default ERROR_MARK and adjust the call to function
msp430_legitimate_address_p.
* config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
unnamed code_helper argument with default ERROR_MARK.
* config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
* config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
* config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
* config/pa/pa.cc (pa_legitimate_address_p): Likewise.
* config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
* config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
* config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
* config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
(tree.h): New include for tree_code ERROR_MARK.
* config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
extra unnamed code_helper argument with default ERROR_MARK.
* config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
(rs6000_debug_legitimate_address_p): Adjust with extra code_helper
argument and adjust the call to function rs6000_legitimate_address_p.
* config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
unnamed code_helper argument with default ERROR_MARK.
* config/s390/s390.cc (s390_legitimate_address_p): Likewise.
* config/sh/sh.cc (sh_legitimate_address_p): Likewise.
* config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
* config/v850/v850.cc (v850_legitimate_address_p): Likewise.
* config/vax/vax.cc (vax_legitimate_address_p): Likewise.
* config/visium/visium.cc (visium_legitimate_address_p): Likewise.
* config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
* config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
Likewise.
(tree.h): New include for tree_code ERROR_MARK.
* config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
Adjust with extra unnamed code_helper argument with default
ERROR_MARK.

12 months agoWorkaround possible CPUID bug in Sandy Bridge.
liuhongt [Fri, 4 Aug 2023 01:27:39 +0000 (09:27 +0800)]
Workaround possible CPUID bug in Sandy Bridge.

Don't access leaf 7 subleaf 1 unless subleaf 0 says it is
supported via EAX.

Intel documentation says invalid subleaves return 0. We had been
relying on that behavior instead of checking the max sublef number.

It appears that some Sandy Bridge CPUs return at least the subleaf 0
EDX value for subleaf 1. Best guess is that this is a bug in a
microcode patch since all of the bits we're seeing set in EDX were
introduced after Sandy Bridge was originally released.

This is causing avxvnniint16 to be incorrectly enabled with
-march=native on these CPUs.

gcc/ChangeLog:

* common/config/i386/cpuinfo.h (get_available_features): Check
EAX for valid subleaf before use CPUID.

12 months agoDaily bump.
GCC Administrator [Wed, 9 Aug 2023 00:16:57 +0000 (00:16 +0000)]
Daily bump.

12 months ago[committed] [RISC-V] Fix bug in condition canonicalization for zicond
Jeff Law [Tue, 8 Aug 2023 21:32:38 +0000 (15:32 -0600)]
[committed] [RISC-V] Fix bug in condition canonicalization for zicond

Vineet's glibc build triggered an ICE building glibc with the latest zicond
bits.  It's a minor issue in the canonicalization of the condition.

When we need to canonicalize the condition we use an SCC insn to handle the
primary comparison with the output going into a temporary with the final value
of 0/1 which we can then use in a zicond instruction.

The mode of the newly generated temporary was taken from mode of the final
destination.  That's simply wrong.  The mode of the condition needs to be
word_mode.

This patch fixes that minor problem and adds a suitable testcase.

gcc/
* config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
for the temporary when canonicalizing the condition.

gcc/testsuite
* gcc.target/riscv/zicond-ice-1.c: New test.

12 months agoc++: parser cleanup, remove dummy arguments
Marek Polacek [Mon, 31 Jul 2023 19:50:48 +0000 (15:50 -0400)]
c++: parser cleanup, remove dummy arguments

Now that cp_parser_constant_expression accepts a null non_constant_p,
we can transitively remove dummy arguments in the call chain.

Running dg.exp and counting the # of is_rvalue_constant_expression calls
from cp_parser_constant_expression:
pre-r14-2800: 2,459,145
this patch  : 1,719,454

gcc/cp/ChangeLog:

* parser.cc (cp_parser_postfix_expression): Adjust the call to
cp_parser_braced_list.
(cp_parser_postfix_open_square_expression): Likewise.
(cp_parser_new_initializer): Likewise.
(cp_parser_assignment_expression): Adjust the call to
cp_parser_initializer_clause.
(cp_parser_lambda_introducer): Adjust the call to cp_parser_initializer.
(cp_parser_range_for): Adjust the call to cp_parser_braced_list.
(cp_parser_jump_statement): Likewise.
(cp_parser_mem_initializer): Likewise.
(cp_parser_template_argument): Likewise.
(cp_parser_default_argument): Adjust the call to cp_parser_initializer.
(cp_parser_initializer): Handle null is_direct_init and non_constant_p
arguments.
(cp_parser_initializer_clause): Handle null non_constant_p argument.
(cp_parser_braced_list): Likewise.
(cp_parser_initializer_list): Likewise.
(cp_parser_member_declaration): Adjust the call to
cp_parser_initializer_clause and cp_parser_initializer.
(cp_parser_yield_expression): Adjust the call to cp_parser_braced_list.
(cp_parser_functional_cast): Likewise.
(cp_parser_late_parse_one_default_arg): Adjust the call to
cp_parser_initializer.
(cp_parser_omp_for_loop_init): Likewise.
(cp_parser_omp_declare_reduction_exprs): Likewise.

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