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9 months agortl: relax validate_subreg to allow paradoxical subregs that change mode
Tamar Christina [Mon, 2 Oct 2023 10:50:24 +0000 (11:50 +0100)]
rtl: relax validate_subreg to allow paradoxical subregs that change mode

This patch relaxes the subreg invariant that you can only change modes
or make it paradoxical in one conversion. i.e. it now allows subreg:V2DI (reg:DF ..))

This is well defined in the generic sense and allowing it would enable
you to write RTL without the extra moves which can be interfered with by
combine.

Patch has been pre-approved[1], but giving people chance to object

[1] https://gcc.gnu.org/pipermail/gcc-patches/2023-September/629119.html

gcc/ChangeLog:

* emit-rtl.cc (validate_subreg): Relax subreg rule.

9 months agoifcvt: replace C++ sort with vec::qsort [PR109154]
Tamar Christina [Mon, 2 Oct 2023 10:48:26 +0000 (11:48 +0100)]
ifcvt: replace C++ sort with vec::qsort [PR109154]

As requested later on, this replaces the C++ sort with vec::qsort.

gcc/ChangeLog:

PR tree-optimization/109154
* tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
(cmp_arg_entry): New.
(predicate_scalar_phi): Use it.

9 months agotestsuite, Darwin: Skip g++.dg/debug/dwarf2/pr85550.C
Iain Sandoe [Sun, 1 Oct 2023 19:38:44 +0000 (20:38 +0100)]
testsuite, Darwin: Skip g++.dg/debug/dwarf2/pr85550.C

There are two problems here; first that the emitted asm for
-fdebug-types-section is ELF-specfic leading to assembler errors for
Mach-O.  If we fix this, we get a secondary fail since the debug linker
does not recognise DW_FORM_ref_sig8.  Disable ths test until we get
DWARF-5 support in the external Darwin toolchain components.

gcc/testsuite/ChangeLog:

* g++.dg/debug/dwarf2/pr85550.C: Skip for Darwin.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
9 months agoFix profiledbootstrap poly_int fallout [PR111642]
Richard Sandiford [Mon, 2 Oct 2023 06:20:45 +0000 (07:20 +0100)]
Fix profiledbootstrap poly_int fallout [PR111642]

rtl-tests.cc and simplify-rtx.cc used partial specialisation
to try to restrict the NUM_POLY_INT_COEFFS>1 tests without
resorting to preprocessor tests.  That now triggers an error
in some configurations, since the NUM_POLY_INT_COEFFS>1 tests
used the global poly_int64, whose definition does not depend
on the template parameter.

This patch uses local types that do depend on the template parameter.

gcc/
PR bootstrap/111642
* rtl-tests.cc (const_poly_int_tests<N>::run): Use a local
poly_int64 typedef.
* simplify-rtx.cc (simplify_const_poly_int_tests<N>::run): Likewise.

9 months agocpymem for RISC-V with v extension
Joern Rennecke [Mon, 2 Oct 2023 02:16:09 +0000 (03:16 +0100)]
cpymem for RISC-V with v extension

gcc/
* config/riscv/riscv-protos.h (riscv_vector::expand_block_move):
Declare.
* config/riscv/riscv-v.cc (riscv_vector::expand_block_move):
New function.
* config/riscv/riscv.md (cpymemsi): Use riscv_vector::expand_block_move.
Change to ..
(cpymem<P:mode>) .. this.

gcc/testsuite/
* gcc.target/riscv/rvv/base/cpymem-1.c: New test.
* gcc.target/riscv/rvv/base/cpymem-2.c: Likewise.

Co-Authored-By: Juzhe-Zhong <juzhe.zhong@rivai.ai>
9 months agoDaily bump.
GCC Administrator [Mon, 2 Oct 2023 00:17:00 +0000 (00:17 +0000)]
Daily bump.

9 months agoFix typo in add_options_for_riscv_v, add_options_for_riscv_zfh, add_options_for_riscv_d .
Joern Rennecke [Sun, 1 Oct 2023 21:46:43 +0000 (22:46 +0100)]
Fix typo in add_options_for_riscv_v, add_options_for_riscv_zfh, add_options_for_riscv_d .

gcc/testsuite/
* lib/target-supports.exp (add_options_for_riscv_v):
Fix typo in first regexp.
(add_options_for_riscv_zfh): Likewise.
(add_options_for_riscv_d): Likewise.

9 months agortl-optimization/110939 Really fix narrow comparison of memory and constant
Stefan Schulze Frielinghaus [Sun, 1 Oct 2023 14:11:32 +0000 (16:11 +0200)]
rtl-optimization/110939 Really fix narrow comparison of memory and constant

In the former fix in commit 41ef5a34161356817807be3a2e51fbdbe575ae85 I
completely missed the fact that the normal form of a CONST_INT for a
mode with fewer bits than in HOST_WIDE_INT is a sign extended version of
the actual constant.  This even holds true for unsigned constants.

Fixed by masking out the upper bits for the incoming constant and sign
extending the resulting unsigned constant.

gcc/ChangeLog:

* combine.cc (simplify_compare_const): Properly handle unsigned
constants while narrowing comparison of memory and constants.

9 months agoRISC-V:Optimize the MASK opt generation
Feng Wang [Tue, 12 Sep 2023 09:18:05 +0000 (09:18 +0000)]
RISC-V:Optimize the MASK opt generation

The corresponding MASK and TARGET will be automatically generated.

Accoring to Kito's advice, using "MASK(name) Var(other_flag_name)"
to generate MASK and TARGET MACRO automatically.
This patch improve the MACRO generation of MASK_* and TARGET_*.
Due to the more and more riscv extensions are added, the default target_flag
is full.
Before this patch,if you want to add new MACRO,you should define the
MACRO in the riscv-opts.h manually.
After this patch, you just need two steps:
1.Define the new TargetVariable.
2.Define "MASK(name) Var(new_target_flag).

gcc/ChangeLog:

* config/riscv/riscv-opts.h (MASK_ZICSR): Delete.
(MASK_ZIFENCEI): Delete;
(MASK_ZIHINTNTL): Ditto.
(MASK_ZIHINTPAUSE): Ditto.
(TARGET_ZICSR): Ditto.
(TARGET_ZIFENCEI): Ditto.
(TARGET_ZIHINTNTL): Ditto.
(TARGET_ZIHINTPAUSE): Ditto.
(MASK_ZAWRS): Ditto.
(TARGET_ZAWRS): Ditto.
(MASK_ZBA): Ditto.
(MASK_ZBB): Ditto.
(MASK_ZBC): Ditto.
(MASK_ZBS): Ditto.
(TARGET_ZBA): Ditto.
(TARGET_ZBB): Ditto.
(TARGET_ZBC): Ditto.
(TARGET_ZBS): Ditto.
(MASK_ZFINX): Ditto.
(MASK_ZDINX): Ditto.
(MASK_ZHINX): Ditto.
(MASK_ZHINXMIN): Ditto.
(TARGET_ZFINX): Ditto.
(TARGET_ZDINX): Ditto.
(TARGET_ZHINX): Ditto.
(TARGET_ZHINXMIN): Ditto.
(MASK_ZBKB): Ditto.
(MASK_ZBKC): Ditto.
(MASK_ZBKX): Ditto.
(MASK_ZKNE): Ditto.
(MASK_ZKND): Ditto.
(MASK_ZKNH): Ditto.
(MASK_ZKR): Ditto.
(MASK_ZKSED): Ditto.
(MASK_ZKSH): Ditto.
(MASK_ZKT): Ditto.
(TARGET_ZBKB): Ditto.
(TARGET_ZBKC): Ditto.
(TARGET_ZBKX): Ditto.
(TARGET_ZKNE): Ditto.
(TARGET_ZKND): Ditto.
(TARGET_ZKNH): Ditto.
(TARGET_ZKR): Ditto.
(TARGET_ZKSED): Ditto.
(TARGET_ZKSH): Ditto.
(TARGET_ZKT): Ditto.
(MASK_ZTSO): Ditto.
(TARGET_ZTSO): Ditto.
(MASK_VECTOR_ELEN_32): Ditto.
(MASK_VECTOR_ELEN_64): Ditto.
(MASK_VECTOR_ELEN_FP_32): Ditto.
(MASK_VECTOR_ELEN_FP_64): Ditto.
(MASK_VECTOR_ELEN_FP_16): Ditto.
(TARGET_VECTOR_ELEN_32): Ditto.
(TARGET_VECTOR_ELEN_64): Ditto.
(TARGET_VECTOR_ELEN_FP_32): Ditto.
(TARGET_VECTOR_ELEN_FP_64): Ditto.
(TARGET_VECTOR_ELEN_FP_16): Ditto.
(MASK_ZVBB): Ditto.
(MASK_ZVBC): Ditto.
(TARGET_ZVBB): Ditto.
(TARGET_ZVBC): Ditto.
(MASK_ZVKG): Ditto.
(MASK_ZVKNED): Ditto.
(MASK_ZVKNHA): Ditto.
(MASK_ZVKNHB): Ditto.
(MASK_ZVKSED): Ditto.
(MASK_ZVKSH): Ditto.
(MASK_ZVKN): Ditto.
(MASK_ZVKNC): Ditto.
(MASK_ZVKNG): Ditto.
(MASK_ZVKS): Ditto.
(MASK_ZVKSC): Ditto.
(MASK_ZVKSG): Ditto.
(MASK_ZVKT): Ditto.
(TARGET_ZVKG): Ditto.
(TARGET_ZVKNED): Ditto.
(TARGET_ZVKNHA): Ditto.
(TARGET_ZVKNHB): Ditto.
(TARGET_ZVKSED): Ditto.
(TARGET_ZVKSH): Ditto.
(TARGET_ZVKN): Ditto.
(TARGET_ZVKNC): Ditto.
(TARGET_ZVKNG): Ditto.
(TARGET_ZVKS): Ditto.
(TARGET_ZVKSC): Ditto.
(TARGET_ZVKSG): Ditto.
(TARGET_ZVKT): Ditto.
(MASK_ZVL32B): Ditto.
(MASK_ZVL64B): Ditto.
(MASK_ZVL128B): Ditto.
(MASK_ZVL256B): Ditto.
(MASK_ZVL512B): Ditto.
(MASK_ZVL1024B): Ditto.
(MASK_ZVL2048B): Ditto.
(MASK_ZVL4096B): Ditto.
(MASK_ZVL8192B): Ditto.
(MASK_ZVL16384B): Ditto.
(MASK_ZVL32768B): Ditto.
(MASK_ZVL65536B): Ditto.
(TARGET_ZVL32B): Ditto.
(TARGET_ZVL64B): Ditto.
(TARGET_ZVL128B): Ditto.
(TARGET_ZVL256B): Ditto.
(TARGET_ZVL512B): Ditto.
(TARGET_ZVL1024B): Ditto.
(TARGET_ZVL2048B): Ditto.
(TARGET_ZVL4096B): Ditto.
(TARGET_ZVL8192B): Ditto.
(TARGET_ZVL16384B): Ditto.
(TARGET_ZVL32768B): Ditto.
(TARGET_ZVL65536B): Ditto.
(MASK_ZICBOZ): Ditto.
(MASK_ZICBOM): Ditto.
(MASK_ZICBOP): Ditto.
(TARGET_ZICBOZ): Ditto.
(TARGET_ZICBOM): Ditto.
(TARGET_ZICBOP): Ditto.
(MASK_ZICOND): Ditto.
(TARGET_ZICOND): Ditto.
(MASK_ZFA): Ditto.
(TARGET_ZFA): Ditto.
(MASK_ZFHMIN): Ditto.
(MASK_ZFH): Ditto.
(MASK_ZVFHMIN): Ditto.
(MASK_ZVFH): Ditto.
(TARGET_ZFHMIN): Ditto.
(TARGET_ZFH): Ditto.
(TARGET_ZVFHMIN): Ditto.
(TARGET_ZVFH): Ditto.
(MASK_ZMMUL): Ditto.
(TARGET_ZMMUL): Ditto.
(MASK_ZCA): Ditto.
(MASK_ZCB): Ditto.
(MASK_ZCE): Ditto.
(MASK_ZCF): Ditto.
(MASK_ZCD): Ditto.
(MASK_ZCMP): Ditto.
(MASK_ZCMT): Ditto.
(TARGET_ZCA): Ditto.
(TARGET_ZCB): Ditto.
(TARGET_ZCE): Ditto.
(TARGET_ZCF): Ditto.
(TARGET_ZCD): Ditto.
(TARGET_ZCMP): Ditto.
(TARGET_ZCMT): Ditto.
(MASK_SVINVAL): Ditto.
(MASK_SVNAPOT): Ditto.
(TARGET_SVINVAL): Ditto.
(TARGET_SVNAPOT): Ditto.
(MASK_XTHEADBA): Ditto.
(MASK_XTHEADBB): Ditto.
(MASK_XTHEADBS): Ditto.
(MASK_XTHEADCMO): Ditto.
(MASK_XTHEADCONDMOV): Ditto.
(MASK_XTHEADFMEMIDX): Ditto.
(MASK_XTHEADFMV): Ditto.
(MASK_XTHEADINT): Ditto.
(MASK_XTHEADMAC): Ditto.
(MASK_XTHEADMEMIDX): Ditto.
(MASK_XTHEADMEMPAIR): Ditto.
(MASK_XTHEADSYNC): Ditto.
(TARGET_XTHEADBA): Ditto.
(TARGET_XTHEADBB): Ditto.
(TARGET_XTHEADBS): Ditto.
(TARGET_XTHEADCMO): Ditto.
(TARGET_XTHEADCONDMOV): Ditto.
(TARGET_XTHEADFMEMIDX): Ditto.
(TARGET_XTHEADFMV): Ditto.
(TARGET_XTHEADINT): Ditto.
(TARGET_XTHEADMAC): Ditto.
(TARGET_XTHEADMEMIDX): Ditto.
(TARGET_XTHEADMEMPAIR): Ditto.
(TARGET_XTHEADSYNC): Ditto.
(MASK_XVENTANACONDOPS): Ditto.
(TARGET_XVENTANACONDOPS): Ditto.
* config/riscv/riscv.opt: Add new Mask defination.
* doc/options.texi: Add explanation for this new usage.
* opt-functions.awk: Add new function to find the index
of target variable from extra_target_vars.
* opt-read.awk: Add new function to store the Mask flags.
* opth-gen.awk: Add new function to output the defination of
Mask Macro and Target Macro.

9 months agoMake riscv_vector::legitimize_move adjust SRC in the caller.
Joern Rennecke [Sun, 1 Oct 2023 05:13:37 +0000 (06:13 +0100)]
Make riscv_vector::legitimize_move adjust SRC in the caller.

2023-09-29  Joern Rennecke  <joern.rennecke@embecosm.com>
    Juzhe-Zhong  <juzhe.zhong@rivai.ai>

PR target/111566

gcc/
* config/riscv/riscv-protos.h (riscv_vector::legitimize_move):
Change second parameter to rtx *.
* config/riscv/riscv-v.cc (risv_vector::legitimize_move): Likewise.
* config/riscv/vector.md: Changed callers of
riscv_vector::legitimize_move.
(*mov<mode>_mem_to_mem): Remove.

gcc/testsuite/

* gcc.target/riscv/rvv/autovec/vls/mov-1.c: Adapt test.
* gcc.target/riscv/rvv/autovec/vls/mov-10.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls/mov-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls/mov-5.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls/mov-7.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls/mov-8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls/mov-9.c: Ditto.1
* gcc.target/riscv/rvv/autovec/vls/mov-2.c: Removed.
* gcc.target/riscv/rvv/autovec/vls/mov-4.c: Removed.
* gcc.target/riscv/rvv/autovec/vls/mov-6.c: Removed.
* gcc.target/riscv/rvv/fortran/pr111566.f90: New test.

Co-Authored-By: Juzhe-Zhong <juzhe.zhong@rivai.ai>
9 months agoDaily bump.
GCC Administrator [Sun, 1 Oct 2023 00:18:19 +0000 (00:18 +0000)]
Daily bump.

9 months agoRISC-V: Use safe_grow_cleared for vector info [PR111649]
Patrick O'Neill [Sat, 30 Sep 2023 22:50:11 +0000 (15:50 -0700)]
RISC-V: Use safe_grow_cleared for vector info [PR111649]

Resolves a riscv*-*-* bootstrap failure due to a newly-turned-on assert.

2023-09-30  Jakub Jelinek  <jakub@redhat.com>

gcc/ChangeLog:

PR target/111649

* config/riscv/riscv-vsetvl.cc (vector_infos_manager::vector_infos_manager):
Replace safe_grow with safe_grow_cleared.

9 months agogimple-match-head: Fix a pasto in function comment
Jakub Jelinek [Sat, 30 Sep 2023 09:35:24 +0000 (11:35 +0200)]
gimple-match-head: Fix a pasto in function comment

This function comment has been pasted from gimple_bitwise_equal_p and haven't
been adjusted for different function name.

2023-09-30  Jakub Jelinek  <jakub@redhat.com>

* gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Fix a pasto
in function comment.

9 months agolowerbitint: Fix 2 bitint lowering bugs [PR111625]
Jakub Jelinek [Sat, 30 Sep 2023 09:28:44 +0000 (11:28 +0200)]
lowerbitint: Fix 2 bitint lowering bugs [PR111625]

This patch fixes 2 issues.  One is when we want to get address of
an uninitialized large/huge bitint SSA_NAME for multiplication/division/modulo
or conversion to floating point (binary or decimal), the code just creates
an uninitialized limb sized variable and passes address of that, but I forgot
to initialize *prec in that case, so it invoked UB at compile time rather
than at runtime.  As it is UB, we could use anything valid as precision there,
say 2 bits for signed, 1 bit for unsigned as smallest possible set of values,
or full bitint precision as full random value.  Though, because we only pass
address to a single limb, I think it is best to pass the bitsize of the limb.

And the other issue is that when ranger in range_to_prec finds some range
is undefined_p (), it will assert {lower,upper}_bound () method isn't called
on it, but we were.  So, the patch adjusts range_to_proc to treat it like
the !optimized case, full bitint precision.

2023-09-30  Jakub Jelinek  <jakub@redhat.com>

PR middle-end/111625
PR middle-end/111637
* gimple-lower-bitint.cc (range_to_prec): Use prec or -prec if
r.undefined_p ().
(bitint_large_huge::handle_operand_addr): For uninitialized operands
use limb_prec or -limb_prec precision.

9 months agovec.h: Uncomment static_assert
Jakub Jelinek [Sat, 30 Sep 2023 09:26:14 +0000 (11:26 +0200)]
vec.h: Uncomment static_assert

Now that poly_int_pod has been removed and other changes mostly to use
{quick,safe}_grow_cleared instead of {quick,safe}_grow for types with
non-trivial default construction, we can enable even the last static
assertion.  From now on, {quick,safe}_grow can only be used with
trivially default constructible types.

2023-09-30  Jakub Jelinek  <jakub@redhat.com>

* vec.h (quick_grow): Uncomment static_assert.

9 months agoRISC-V: Add type attribute in *<optab>_not_const<mode> pattern
Jivan Hakobyan [Sat, 30 Sep 2023 03:21:02 +0000 (21:21 -0600)]
RISC-V: Add type attribute in *<optab>_not_const<mode> pattern

After f088b768d01a commit riscv_sched_variable_issue function requires
that all insns should have a type attribute.

When I sent my previous patch there was no such limitation.
Currently, I have regressions on my tests. This patch fixes them.

gcc/ChangeLog:
* config/riscv/bitmanip.md (*<optab>_not_const<mode>): Added type attribute

9 months agoRemove .PHONY targets when building .fda files during autoprofiledbootstrap
Eugene Rozenfeld [Sat, 16 Sep 2023 01:32:10 +0000 (18:32 -0700)]
Remove .PHONY targets when building .fda files during autoprofiledbootstrap

These .PHONY targets are always executed and were breaking `make install`
for autoprofiledbootstrap build.

Tested on x86_64-pc-linux-gnu.

gcc/c/ChangeLog:
* Make-lang.in: Make create_fdas_for_cc1 target not .PHONY

gcc/cp/ChangeLog:
* Make-lang.in: Make create_fdas_for_cc1plus target not .PHONY

gcc/lto/ChangeLog:
* Make-lang.in: Make create_fdas_for_lto1 target not .PHONY

9 months agoDaily bump.
GCC Administrator [Sat, 30 Sep 2023 00:17:24 +0000 (00:17 +0000)]
Daily bump.

9 months agomodula2: testsuite correction to m2date.mod
Gaius Mulley [Fri, 29 Sep 2023 23:48:09 +0000 (00:48 +0100)]
modula2: testsuite correction to m2date.mod

This patch corrects the m2date day of the week message.
The days of the week array start with Thursday reflecting the
1st Jan 1970.

gcc/testsuite/ChangeLog:

* gm2/iso/run/pass/m2date.mod (DayName): Reordered.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
9 months agoFix INSN costing and more zicond tests
Xiao Zeng [Fri, 29 Sep 2023 22:29:02 +0000 (16:29 -0600)]
Fix INSN costing and more zicond tests

So this ends up looking a lot like the bits that I had to revert several weeks
ago :-)

The core issue we have is given an INSN the generic code will cost the SET_SRC
and SET_DEST and sum them.  But that's far from ideal on a RISC target.

For a register destination, the cost can be determined be looking at just the
SET_SRC.  Which is precisely what this patch does.  When the outer code is an
INSN and we're presented with a SET we take one of two paths.

If the destination is a register, then we recurse just on the SET_SRC and we're
done.  Otherwise we fall back to the existing code which sums the cost of the
SET_SRC and SET_DEST.  That fallback path isn't great and probably could be
further improved (just costing SET_DEST in that case is probably quite
reasonable).

The difference between this version and the bits that slipped through by
accident several weeks ago is that old version mis-used the API due to a thinko
on my part.

This tightens up various zicond tests to avoid undesirable matching.

This has been tested on rv64gc -- the only difference it makes on the testsuite
is the new tests (included in this patch) flip from failing to passing.

Pushed to the trunk.

gcc/
* config/riscv/riscv.cc (riscv_rtx_costs): Better handle costing
SETs when the outer code is INSN.

gcc/testsuite
* gcc.target/riscv/zicond-primitiveSemantics_compare_imm.c: New test.
* gcc.target/riscv/zicond-primitiveSemantics_compare_imm_return_0_imm.c:
Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_compare_imm_return_imm_imm.c:
Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_compare_imm_return_imm_reg.c:
Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_compare_imm_return_reg_reg.c:
Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_compare_reg.c: Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_compare_reg_return_0_imm.c:
Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_compare_reg_return_imm_imm.c:
Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_compare_reg_return_imm_reg.c:
Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_compare_reg_return_reg_reg.c:
Likewise.
* gcc.target/riscv/zicond-primitiveSemantics.c: Tighten expected regexp.
* gcc.target/riscv/zicond-primitiveSemantics_return_0_imm.c: Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_return_imm_imm.c: Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_return_imm_reg.c: Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_return_reg_reg.c: Likewise.
* gcc.target/riscv/zicond-xor-01.c: Likewise.

9 months agoRISC-V: Specify -mabi=lp64d in wredsum_vlmax.c testcase
Patrick O'Neill [Fri, 29 Sep 2023 21:20:07 +0000 (14:20 -0700)]
RISC-V: Specify -mabi=lp64d in wredsum_vlmax.c testcase

Resolves this error on rv32gcv:
cc1: error: ABI requires '-march=rv32'
compiler exited with status 1
FAIL: gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c   -O0  (test for excess errors)

Tested for regressions using glibc rv32gcv/rv64gcv multilib on
r14-4339-geaa41a6dc12.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c: Specify -mabi=lp64d.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
9 months agocheck_GNU_style.py: Skip .md square bracket linting
Patrick O'Neill [Tue, 12 Sep 2023 18:30:20 +0000 (11:30 -0700)]
check_GNU_style.py: Skip .md square bracket linting

This testcase causes lots of false-positives for machine description files.

contrib/ChangeLog:

* check_GNU_style_lib.py: Skip machine description file bracket linting.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
9 months agoRISC-V: Replace not + bitwise_imm with li + bitwise_not
Jivan Hakobyan [Fri, 29 Sep 2023 19:41:48 +0000 (13:41 -0600)]
RISC-V: Replace not + bitwise_imm with li + bitwise_not

In the case when we have C code like this

int foo (int a) {
   return 100 & ~a;
}

GCC generates the following instruction sequence

foo:
     not     a0,a0
     andi    a0,a0,100
     ret

This patch replaces that with this sequence
foo:
     li a5,100
     andn a0,a5,a0
     ret

The profitability comes from an out-of-order processor being able to
issue the "li a5, 100" at any time after it's fetched while "not a0, a0" has
to wait until any prior setter of a0 has reached completion.

gcc/ChangeLog:
* config/riscv/bitmanip.md (*<optab>_not_const<mode>): New split
pattern.

gcc/testsuite/ChangeLog:
* gcc.target/riscv/zbb-andn-orn-01.c: New test.
* gcc.target/riscv/zbb-andn-orn-02.c: Likewise.

9 months agoRemove poly_int_pod
Richard Sandiford [Fri, 29 Sep 2023 16:55:12 +0000 (17:55 +0100)]
Remove poly_int_pod

poly_int was written before the switch to C++11 and so couldn't
use explicit default constructors.  This led to an awkward split
between poly_int_pod and poly_int.  poly_int simply inherited from
poly_int_pod and added constructors, with the argumentless constructor
having an empty body.  But inheritance meant that poly_int had to
repeat the assignment operators from poly_int_pod (again, no C++11,
so no "using" to inherit base-class implementations).

All that goes away if we switch to using default constructors.

The main complication is ensuring that braced initialisation still
gives a constexpr, so that static variables can be initialised without
runtime code.  The two problems here are:

(1) When initialising a poly_int<N, wide_int> with fewer than N
    coefficients, the other coefficients need to be a zero of
    the same precision as the explicit coefficients.  This was
    previously done in a for loop using wi::ints_for<...>::zero,
    but C++11 constexpr constructors can't have function bodies.
    The patch instead uses a series of delegated initialisers to
    fill in the implicit coefficients.

(2) The initialisation in:

      void f(int x) {
        unsigned int foo {x};
      }

    produces the warning:

      warning: narrowing conversion of 'x' from 'int' to 'unsigned int' [-Wnarrowing]

    whereas:

      void f(int x) {
        unsigned int foo = x;
      }

    does not.  So switching to direct initialisation of the coeffs array
    would mean that:

      poly_uin64_t x = 0;

    would trigger a warning for using 0 rather than 0u.  That seemed
    overly pedantic, so the patch adds explicit casts to the constructor.
    The complication is to do that without adding extra code to
    wide-int versions.  The patch uses a new init_cast type for that.

gcc/
* poly-int.h (poly_int_pod): Delete.
(poly_coeff_traits::init_cast): New type.
(poly_int_full, poly_int_hungry, poly_int_fullness): New structures.
(poly_int): Replace constructors that take 1 and 2 coefficients with
a general one that takes an arbitrary number of coefficients.
Delegate initialization to two new private constructors, one of
which uses the coefficients as-is and one of which adds an extra
zero of the appropriate type (and precision, where applicable).
(gt_ggc_mx, gt_pch_nx): Operate on poly_ints rather than poly_int_pods.
* poly-int-types.h (poly_uint16_pod, poly_int64_pod, poly_uint64_pod)
(poly_offset_int_pod, poly_wide_int_pod, poly_widest_int_pod): Delete.
* gengtype.cc (main): Don't register poly_int64_pod.
* calls.cc (initialize_argument_information): Use poly_int rather
than poly_int_pod.
(combine_pending_stack_adjustment_and_call): Likewise.
* config/aarch64/aarch64.cc (pure_scalable_type_info): Likewise.
* data-streamer.h (bp_unpack_poly_value): Likewise.
* dwarf2cfi.cc (struct dw_trace_info): Likewise.
(struct queued_reg_save): Likewise.
* dwarf2out.h (struct dw_cfa_location): Likewise.
* emit-rtl.h (struct incoming_args): Likewise.
(struct rtl_data): Likewise.
* expr.cc (get_bit_range): Likewise.
(get_inner_reference): Likewise.
* expr.h (get_bit_range): Likewise.
* fold-const.cc (split_address_to_core_and_offset): Likewise.
(ptr_difference_const): Likewise.
* fold-const.h (ptr_difference_const): Likewise.
* function.cc (try_fit_stack_local): Likewise.
(instantiate_new_reg): Likewise.
* function.h (struct expr_status): Likewise.
(struct args_size): Likewise.
* genmodes.cc (ZERO_COEFFS): Likewise.
(mode_size_inline): Likewise.
(mode_nunits_inline): Likewise.
(emit_mode_precision): Likewise.
(emit_mode_size): Likewise.
(emit_mode_nunits): Likewise.
* gimple-fold.cc (get_base_constructor): Likewise.
* gimple-ssa-store-merging.cc (struct symbolic_number): Likewise.
* inchash.h (class hash): Likewise.
* ipa-modref-tree.cc (modref_access_node::dump): Likewise.
* ipa-modref.cc (modref_access_analysis::merge_call_side_effects):
Likewise.
* ira-int.h (ira_spilled_reg_stack_slot): Likewise.
* lra-eliminations.cc (self_elim_offsets): Likewise.
* machmode.h (mode_size, mode_precision, mode_nunits): Likewise.
* omp-low.cc (omplow_simd_context): Likewise.
* pretty-print.cc (pp_wide_integer): Likewise.
* pretty-print.h (pp_wide_integer): Likewise.
* reload.cc (struct decomposition): Likewise.
* reload.h (struct reload): Likewise.
* reload1.cc (spill_stack_slot_width): Likewise.
(struct elim_table): Likewise.
(offsets_at): Likewise.
(init_eliminable_invariants): Likewise.
* rtl.h (union rtunion): Likewise.
(poly_int_rtx_p): Likewise.
(strip_offset): Likewise.
(strip_offset_and_add): Likewise.
* rtlanal.cc (strip_offset): Likewise.
* tree-dfa.cc (get_ref_base_and_extent): Likewise.
(get_addr_base_and_unit_offset_1): Likewise.
(get_addr_base_and_unit_offset): Likewise.
* tree-dfa.h (get_ref_base_and_extent): Likewise.
(get_addr_base_and_unit_offset_1): Likewise.
(get_addr_base_and_unit_offset): Likewise.
* tree-ssa-loop-ivopts.cc (struct iv_use): Likewise.
(strip_offset): Likewise.
* tree-ssa-sccvn.h (struct vn_reference_op_struct): Likewise.
* tree.cc (ptrdiff_tree_p): Likewise.
* tree.h (poly_int_tree_p): Likewise.
(ptrdiff_tree_p): Likewise.
(get_inner_reference): Likewise.

gcc/testsuite/
* gcc.dg/plugin/poly-int-tests.h (test_num_coeffs_extra): Use
poly_int rather than poly_int_pod.

9 months agoTestsuite, DWARF2: adjust regexp to match darwin output
Francois-Xavier Coudert [Sun, 20 Aug 2023 10:53:19 +0000 (12:53 +0200)]
Testsuite, DWARF2: adjust regexp to match darwin output

gcc/testsuite/ChangeLog:

* gcc.dg/debug/dwarf2/inline4.c: Ajdust regexp to match darwin
output.

9 months agomodula2: iso library SysClock.mod and wrapclock.cc fixes.
Gaius Mulley [Fri, 29 Sep 2023 16:18:16 +0000 (17:18 +0100)]
modula2: iso library SysClock.mod and wrapclock.cc fixes.

This patch corrects the C equivalent of m2 LONGINT parameters
in wrapclock.cc and corrects the SysClock.mod module.
wrapclock.cc uses a typedef long long int longint_t to match
m2 LONGINT (rather than unsigned long).  These fixes
prevent calls to SysClock hanging spinning on an (incorrect)
large day count from the epoch.

gcc/m2/ChangeLog:

* gm2-compiler/M2Quads.mod (EndBuildFor): Improve
block comments.
* gm2-libs-iso/SysClock.mod (ExtractDate): Replace
testDays with yearOfDays.  New local variable monthOfDays.

libgm2/ChangeLog:

* libm2iso/wrapclock.cc (longint_t): New declaration.
(GetTimespec): Replace types for sec and nano with
longint_t.
(SetTimespec): Replace types for sec and nano with
longint_t.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
9 months agoFix memory barrier patterns for pre PA8800 processors
John David Anglin [Fri, 29 Sep 2023 15:37:44 +0000 (15:37 +0000)]
Fix memory barrier patterns for pre PA8800 processors

2023-09-29  John David Anglin  <danglin@gcc.gnu.org>

* config/pa/pa.md (memory_barrier): Revise comment.
(memory_barrier_64, memory_barrier_32): Use ldcw,co on PA 2.0.
* config/pa/pa.opt (coherent-ldcw): Change default to disabled.

9 months agolibstdc++: Fix handling of surrogate CP in codecvt [PR108976]
Dimitrij Mijoski [Thu, 28 Sep 2023 19:38:11 +0000 (21:38 +0200)]
libstdc++: Fix handling of surrogate CP in codecvt [PR108976]

This patch fixes the handling of surrogate code points in all standard
facets for transcoding Unicode that are based on std::codecvt. Surrogate
code points should always be treated as error. On the other hand
surrogate code units can only appear in UTF-16 and only when they come
in a proper pair.

Additionally, it fixes a bug in std::codecvt_utf16::in() when odd number
of bytes were given in the range [from, from_end), error was returned
always. The last byte in such range does not form a full UTF-16 code
unit and we can not make any decisions for error, instead partial should
be returned.

The testsuite for testing these facets was updated in the following
order:

1. All functions that test codecvts that work with UTF-8 were refactored
   and made more generic so they accept codecvt that works with the char
   type char8_t.
2. The same functions were updated with new test cases for transcoding
   errors and now additionally test for surrogates, overlong UTF-8
   sequences, code points out of the Unicode range, and more tests for
   missing leading and trailing code units.
3. New tests were added to test codecvt_utf16 in both of its variants,
   UTF-16 <-> UTF-32/UCS-4 and UTF-16 <-> UCS-2.

libstdc++-v3/ChangeLog:

PR libstdc++/108976
* src/c++11/codecvt.cc (read_utf8_code_point): Fix handing of
surrogates in UTF-8.
(ucs4_out): Fix handling of surrogates in UCS-4 -> UTF-8.
(ucs4_in): Fix handling of range with odd number of bytes.
(ucs4_out): Fix handling of surrogates in UCS-4 -> UTF-16.
(ucs2_out): Fix handling of surrogates in UCS-2 -> UTF-16.
(ucs2_in): Fix handling of range with odd number of bytes.
(__codecvt_utf16_base<char16_t>::do_in): Likewise.
(__codecvt_utf16_base<char32_t>::do_in): Likewise.
(__codecvt_utf16_base<wchar_t>::do_in): Likewise.
* testsuite/22_locale/codecvt/codecvt_unicode.cc: Renames, add
tests for codecvt_utf16<char16_t> and codecvt_utf16<char32_t>.
* testsuite/22_locale/codecvt/codecvt_unicode.h: Refactor UTF-8
testing functions for char8_t, add more test cases for errors,
add testing functions for codecvt_utf16.
* testsuite/22_locale/codecvt/codecvt_unicode_wchar_t.cc:
Renames, add tests for codecvt_utf16<whchar_t>.
* testsuite/22_locale/codecvt/codecvt_utf16/79980.cc (test06):
Fix test.
* testsuite/22_locale/codecvt/codecvt_unicode_char8_t.cc: New
test.

9 months agolibstdc++: Ensure active union member is correctly set
Nathaniel Shead [Fri, 29 Sep 2023 09:30:41 +0000 (10:30 +0100)]
libstdc++: Ensure active union member is correctly set

This patch ensures that the union members for std::string and
std::variant are always properly set when a change occurs.

libstdc++-v3/ChangeLog:

* include/bits/basic_string.h: (basic_string(basic_string&&)):
Activate _M_local_buf when needed.
(basic_string(basic_string&&, const _Alloc&)): Likewise.
* include/bits/basic_string.tcc: (basic_string::swap): Likewise.
* include/std/variant: (__detail::__variant::__construct_n): New.
(__detail::__variant::__emplace): Use __construct_n.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
9 months agoHarmonize headers between both dg-extract-results scripts
Paul Iannetta [Fri, 29 Sep 2023 14:50:28 +0000 (08:50 -0600)]
Harmonize headers between both dg-extract-results scripts

    The header of the python version looked like:
    Target is ...
    Host   is ...
    The header of the bash version looked like:
    Test run by ... on ...
    Target is ...

    After this change both headers look like:
    Test run by ... on ...
    Target is ...
    Host   is ...

    The order of the tests is not the same but since dg-cmp-results.sh it
    does not matter much.

contrib/ChangeLog:

* dg-extract-results.py: Print the "Test run" line.
* dg-extract-results.sh: Print the "Host" line.

9 months agovec.h: Guard most of static assertions for GCC >= 5
Jakub Jelinek [Fri, 29 Sep 2023 13:14:52 +0000 (15:14 +0200)]
vec.h: Guard most of static assertions for GCC >= 5

As reported by Jonathan on IRC, my vec.h patch broke build with GCC 4.8.x
or 4.9.x as system compiler, e.g. on CFarm.
The problem is that while all of
std::is_trivially_{destructible,copyable,default_constructible} traits
are in C++, only std::is_trivially_destructible has been implemented in GCC
4.8, the latter two were added only in GCC 5.
Only std::is_trivially_destructible is the really important one though,
which is used to decide what pop returns and whether to invoke the
destructors or not.  The rest are solely used in static_asserts and as such
I think it is acceptable if we don't assert those when built with GCC 4.8
or 4.9, anybody doing bootstrap from those system compilers or doing builds
with newer GCC will catch that.

So, the following patch guards those for 5+.
If we switch to C++14 later on and start requiring newer version of system
GCC as well (do we require GCC >= 5 which claims the last C++14 language
features, or what provides all C++14 library features, or GCC >= 6 which
uses -std=c++14 by default?), this patch then can be reverted.

2023-09-29  Jakub Jelinek  <jakub@redhat.com>

* vec.h (quick_insert, ordered_remove, unordered_remove,
block_remove, qsort, sort, stablesort, quick_grow): Guard
std::is_trivially_{copyable,default_constructible} and
vec_detail::is_trivially_copyable_or_pair static assertions
with GCC_VERSION >= 5000.
(vec_detail::is_trivially_copyable_or_pair): Guard definition
with GCC_VERSION >= 5000.

9 months agoFortran: Free alloc. comp. in allocated coarrays only.
Andre Vehreschild [Thu, 28 Sep 2023 07:30:12 +0000 (09:30 +0200)]
Fortran: Free alloc. comp. in allocated coarrays only.

When freeing allocatable components of an allocatable coarray, add
a check that the coarray is still allocated, before accessing the
components.

This patch adds to PR fortran/37336, but does not fix it completely.

gcc/fortran/ChangeLog:
PR fortran/37336
* trans-array.cc (structure_alloc_comps): Deref coarray.
(gfc_trans_deferred_array): Add freeing of components after
check for allocated coarray.

gcc/testsuite/ChangeLog:
PR fortran/37336
* gfortran.dg/coarray/alloc_comp_6.f90: New test.
* gfortran.dg/coarray/alloc_comp_7.f90: New test.

9 months agoaarch64: Improve on ldp-stp policies code structure.
Manos Anagnostakis [Thu, 28 Sep 2023 16:04:33 +0000 (18:04 +0200)]
aarch64: Improve on ldp-stp policies code structure.

Improves on: 834fc2bf

This improves the code structure of the ldp-stp policies
patch introduced in 834fc2bf

Bootstrapped and regtested on aarch64-linux.

gcc/ChangeLog:
* config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): Removed.
(enum aarch64_ldp_stp_policy): Merged enums aarch64_ldp_policy
and aarch64_stp_policy to aarch64_ldp_stp_policy.
(enum aarch64_stp_policy): Removed.
* config/aarch64/aarch64-protos.h (struct tune_params): Removed
aarch64_ldp_policy_model and aarch64_stp_policy_model enum types
and left only the definitions to the aarch64-opts one.
* config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): Removed.
(aarch64_parse_stp_policy): Removed.
(aarch64_override_options_internal): Removed calls to parsing
functions and added obvious direct assignments.
(aarch64_mem_ok_with_ldpstp_policy_model): Improved
code quality based on the new changes.
* config/aarch64/aarch64.opt: Use single enum type
aarch64_ldp_stp_policy for both ldp and stp options.

gcc/testsuite/ChangeLog:
* gcc.target/aarch64/ldp_aligned.c: Splitted into this and
ldp_unaligned.
* gcc.target/aarch64/stp_aligned.c: Splitted into this and
stp_unaligned.
* gcc.target/aarch64/ldp_unaligned.c: New test.
* gcc.target/aarch64/stp_unaligned.c: New test.

Signed-off-by: Manos Anagnostakis <manos.anagnostakis@vrull.eu>
Suggested-by: Richard Sandiford <richard.sandiford@arm.com>
9 months agotree-optimization/111583 - loop distribution issue
Richard Biener [Fri, 29 Sep 2023 09:08:18 +0000 (11:08 +0200)]
tree-optimization/111583 - loop distribution issue

The following conservatively fixes loop distribution to only
recognize memset/memcpy and friends when at least one element
is going to be processed.  This avoids having an unconditional
builtin call in the IL that might imply the source and destination
pointers are non-NULL when originally pointers were not always
dereferenced.

With -Os loop header copying is less likely to ensure this.

PR tree-optimization/111583
* tree-loop-distribution.cc (find_single_drs): Ensure the
load/store are always executed.

* gcc.dg/tree-ssa/pr111583-1.c: New testcase.
* gcc.dg/tree-ssa/pr111583-2.c: Likewise.

9 months agouse *_grow_cleared rather than *_grow on vect_unpromoted_value
Jakub Jelinek [Fri, 29 Sep 2023 09:23:16 +0000 (11:23 +0200)]
use *_grow_cleared rather than *_grow on vect_unpromoted_value

vect_recog_over_widening_pattern is another spot which triggers the
right now commented out static assertion in vec.h which asserts
{quick,safe}_grow vec operations are only used with trivially default
constructible types.

I had a look at this and I think using quick_grow_cleared is best choice
here.  The nops is 2 or 1 most of the time, worst case 3, so the price of
extra initialization of 4 pointer-sized-or-less members times 1, 2 or 3
doesn't seem worth bothering, it is similar to the bitmap_head case where
we already pay the price for just one structure anytime we do
  vect_unpromoted_value unprom_diff;
(and later set_op on it) or even
  vect_unpromoted_value unprom0[2];

With this patch and Richard S's poly_int_pod removal the static_assert can
be enabled as well and gcc builds.

2023-09-29  Jakub Jelinek  <jakub@redhat.com>

* tree-vect-patterns.cc (vect_recog_over_widening_pattern): Use
quick_grow_cleared method on unprom rather than quick_grow.

9 months agoggc: do not wipe out unrelated data via gt_ggc_rtab [PR111505]
Sergei Trofimovich [Thu, 28 Sep 2023 19:20:31 +0000 (20:20 +0100)]
ggc: do not wipe out unrelated data via gt_ggc_rtab [PR111505]

There are 3 GC root tables:

   gt_ggc_rtab
   gt_ggc_deletable_rtab
   gt_pch_scalar_rtab

`deletable` and `scalar` tables are both simple: each element always
contains a pointer to the beginning of the object and it's size is the
full object.

`rtab` is different: it's `base` is a pointer in the middle of the
struct and `stride` points to the next GC pointer in the array.

Before the change there were 2 problems:

1. We memset()ed not just pointers but data around them.
2. We wen out of bounds of the last object described by gt_ggc_rtab
   and triggered bootstrap failures in profile and asan bootstraps.

After the change we handle only pointers themselves like the rest of
ggc-common.cc code.

gcc/
PR middle-end/111505
* ggc-common.cc (ggc_zero_out_root_pointers, ggc_common_finalize):
Add new helper. Use helper instead of memset() to wipe out pointers.

9 months agoSimplify & expand c_readstr
Richard Sandiford [Fri, 29 Sep 2023 08:24:43 +0000 (09:24 +0100)]
Simplify & expand c_readstr

c_readstr only operated on integer modes.  It worked by reading
the source string into an array of HOST_WIDE_INTs, converting
that array into a wide_int, and from there to an rtx.

It's simpler to do this by building a target memory image and
using native_decode_rtx to convert that memory image into an rtx.
It avoids all the endianness shenanigans because both the string and
native_decode_rtx follow target memory order.  It also means that the
function can handle all fixed-size modes, which simplifies callers
and allows vector modes to be used more widely.

gcc/
* builtins.h (c_readstr): Take a fixed_size_mode rather than a
scalar_int_mode.
* builtins.cc (c_readstr): Likewise.  Build a local array of
bytes and use native_decode_rtx to get the rtx image.
(builtin_memcpy_read_str): Simplify accordingly.
(builtin_strncpy_read_str): Likewise.
(builtin_memset_read_str): Likewise.
(builtin_memset_gen_str): Likewise.
* expr.cc (string_cst_read_str): Likewise.

9 months agouse *_grow_cleared rather than *_grow on vec<bitmap_head>
Jakub Jelinek [Fri, 29 Sep 2023 07:35:01 +0000 (09:35 +0200)]
use *_grow_cleared rather than *_grow on vec<bitmap_head>

The assert checking which is commented out in vec.h grow method requires
trivially default constructible types to be used with this method, but
bitmap_head has since the PR88317 r9-4642 workaround non-trivial default
constructor to catch bugs and we pay the minimum price of initializing
everything in bitmap_head twice on the common
  bitmap_head var;
  bitmap_initilize (&var, obstack);
sequence.  This patch makes us pay the same price times number of elements
on
  vec<bitmap_head> v;
  v.create (n);
  v.safe_grow_cleared (n); // previous v.safe_grow (n);
  for (int i = 0; i < n; ++i)
    bitmap_initialize (&v[i], obstack);

2023-09-29  Jakub Jelinek  <jakub@redhat.com>

* tree-ssa-loop-im.cc (tree_ssa_lim_initialize): Use quick_grow_cleared
instead of quick_grow on vec<bitmap_head> members.
* cfganal.cc (control_dependences::control_dependences): Likewise.
* rtl-ssa/blocks.cc (function_info::build_info::build_info): Likewise.
(function_info::place_phis): Use safe_grow_cleared instead of safe_grow
on auto_vec<bitmap_head> vars.
* tree-ssa-live.cc (compute_live_vars): Use quick_grow_cleared instead
of quick_grow on vec<bitmap_head> var.

9 months agoDaily bump.
GCC Administrator [Fri, 29 Sep 2023 00:17:28 +0000 (00:17 +0000)]
Daily bump.

9 months agolibstdc++: Use Python "not in" operator
Tom Tromey [Wed, 27 Sep 2023 15:26:01 +0000 (09:26 -0600)]
libstdc++: Use Python "not in" operator

flake8 warns about code like

    not something in "whatever"

Ordinarily in Python this should be written as:

    something not in "whatever"

This patch makes this change.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py (Printer.add_version)
(add_one_template_type_printer)
(FilteringTypePrinter.add_one_type_printer): Use Python
"not in" operator.

9 months agolibstdc++: Remove std_ratio_t_tuple
Tom Tromey [Tue, 26 Sep 2023 20:04:26 +0000 (14:04 -0600)]
libstdc++: Remove std_ratio_t_tuple

This removes the std_ratio_t_tuple function from the Python
pretty-printer code.  It is not used.  Apparently the relevant parts
were moved to StdChronoDurationPrinter._ratio at some point in the
past.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py (std_ratio_t_tuple):
Remove.

9 months agolibstdc++: Remove unused locals from printers.py
Tom Tromey [Tue, 26 Sep 2023 19:58:57 +0000 (13:58 -0600)]
libstdc++: Remove unused locals from printers.py

flake8 pointed out some unused local variables in the libstdc++
pretty-printers.  This removes them.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py
(StdExpOptionalPrinter.__init__, lookup_node_type):
Remove unused variables.

9 months agolibstdc++: Remove unused Python imports
Tom Tromey [Tue, 26 Sep 2023 19:46:57 +0000 (13:46 -0600)]
libstdc++: Remove unused Python imports

flake8 pointed out some unused imports.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py: Don't import 'os'.
* python/libstdcxx/v6/__init__.py: Don't import 'gdb'.

9 months agolibstdc++: Use gdb.ValuePrinter base class
Tom Tromey [Tue, 26 Sep 2023 19:38:42 +0000 (13:38 -0600)]
libstdc++: Use gdb.ValuePrinter base class

GDB 14 will add a new ValuePrinter tag class that will be used to
signal that pretty-printers will agree to the "extension protocol" --
essentially that they will follow some simple namespace rules, so that
GDB can add new methods over time.

A couple new methods have already been added to GDB, to support DAP.
While I haven't implemented these for any libstdc++ printers yet, this
patch makes the basic conversion: printers derive from
gdb.ValuePrinter if it is available, and all "non-standard" (that is,
not specified by GDB) members of the various value-printing classes
are renamed to have a leading underscore.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py: Use gdb.ValuePrinter
everywhere.  Rename members to start with "_".

9 months agolibstdc++: Show full Python stack on error
Tom Tromey [Wed, 27 Sep 2023 19:49:59 +0000 (13:49 -0600)]
libstdc++: Show full Python stack on error

This changes the libstdc++ test suite to arrange for gdb to show the
full Python stack if any sort of Python exception occurs.  This makes
debugging the printers a little simpler.

libstdc++-v3/ChangeLog:

* testsuite/lib/gdb-test.exp (gdb-test): Enable Python
stack traces from gdb.

9 months agolibstdc++: Refactor Python Xmethods to use is_specialization_of
Jonathan Wakely [Thu, 28 Sep 2023 19:52:01 +0000 (20:52 +0100)]
libstdc++: Refactor Python Xmethods to use is_specialization_of

This copies the is_specialization_of function from printers.py (with
slight modification for versioned namespace handling) and reuses it in
xmethods.py to replace repetitive re.match calls in every class.

This fixes the problem that the regular expressions used \d without
escaping the backslash properly.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/xmethods.py (is_specialization_of): Define
new function.
(ArrayMethodsMatcher, DequeMethodsMatcher)
(ForwardListMethodsMatcher, ListMethodsMatcher)
(VectorMethodsMatcher, AssociativeContainerMethodsMatcher)
(UniquePtrGetWorker, UniquePtrMethodsMatcher)
(SharedPtrSubscriptWorker, SharedPtrMethodsMatcher): Use
is_specialization_of instead of re.match.

9 months agolibstdc++: Reformat Python code
Jonathan Wakely [Thu, 28 Sep 2023 13:54:59 +0000 (14:54 +0100)]
libstdc++: Reformat Python code

Some of these changes were suggested by autopep8's --aggressive
option, others are for readability.

Break long lines by splitting strings across multiple lines, or
introducing local variables to hold results.

Use raw strings for regular expressions, so that backslashes don't need
to be escaped.

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py: Break long lines. Use raw
strings for regular expressions. Add whitespace around
operators.
(is_member_of_namespace): Use isinstance to check type.
(is_specialization_of): Likewise. Adjust template_name
for versioned namespace instead of duplicating the re.match
call.
(StdExpAnyPrinter._string_types): New static method.
(StdExpAnyPrinter.to_string): Use _string_types.

9 months agolibstdc++: Format Python docstrings according to PEP 357
Jonathan Wakely [Thu, 28 Sep 2023 10:06:02 +0000 (11:06 +0100)]
libstdc++: Format Python docstrings according to PEP 357

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py: Format docstrings according
to PEP 257.
* python/libstdcxx/v6/xmethods.py: Likewise.

9 months agomodula2: Increase linking test timeouts for slower targets
Gaius Mulley [Thu, 28 Sep 2023 18:07:04 +0000 (19:07 +0100)]
modula2: Increase linking test timeouts for slower targets

This patch introduces missing timeout handling for
pimlib-base-run-pass.exp and increases the timeout value
for larger projects which link (necessary for slower targets).

gcc/testsuite/ChangeLog:

* gm2/coroutines/pim/run/pass/coroutines-pim-run-pass.exp:
Add load_lib timeout-dg.exp and increase timeout to 60
seconds.
* gm2/pimlib/base/run/pass/pimlib-base-run-pass.exp: Add
load_lib timeout-dg.exp and increase timeout to 60 seconds.
* gm2/projects/iso/run/pass/halma/projects-iso-run-pass-halma.exp:
Increase timeout to 45 seconds.
* gm2/switches/whole-program/pass/run/switches-whole-program-pass-run.exp:
Add load_lib timeout-dg.exp and increase timeout to 120 seconds.
Remove unnecessary compile of mystrlib.mod.
* gm2/iso/run/pass/iso-run-pass.exp: Add load_lib
timeout-dg.exp and set timeout to 60 seconds.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
9 months agolibstdc++: Force _Hash_node_value_base methods inline to fix abi (PR111050)
Tim Song [Wed, 6 Sep 2023 17:31:55 +0000 (19:31 +0200)]
libstdc++: Force _Hash_node_value_base methods inline to fix abi (PR111050)

https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=1b6f0476837205932613ddb2b3429a55c26c409d
changed _Hash_node_value_base to no longer derive from _Hash_node_base, which means
that its member functions expect _M_storage to be at a different offset. So explosions
result if an out-of-line definition is emitted for any of the member functions (say,
in a non-optimized build) and the resulting object file is then linked with code built
using older version of GCC/libstdc++.

libstdc++-v3/ChangeLog:

PR libstdc++/111050
* include/bits/hashtable_policy.h
(_Hash_node_value_base<>::_M_valptr(), _Hash_node_value_base<>::_M_v())
Add [[__gnu__::__always_inline__]].

9 months agoRevert "[RA]: Improve cost calculation of pseudos with equivalences"
Vladimir N. Makarov [Thu, 28 Sep 2023 15:53:51 +0000 (11:53 -0400)]
Revert "[RA]: Improve cost calculation of pseudos with equivalences"

This reverts commit 3c834d85f2ec42c60995c2b678196a06cb744959.

Although the patch improves x86-64 specfp2007, it also results in
performance and code size regression on different targets and
new GCC testsuite failures on tests expecting a specific output.

9 months agoAArch64: Fix memmove operand corruption [PR111121]
Wilco Dijkstra [Tue, 26 Sep 2023 15:42:45 +0000 (16:42 +0100)]
AArch64: Fix memmove operand corruption [PR111121]

A MOPS memmove may corrupt registers since there is no copy of the input
operands to temporary registers.  Fix this by calling
aarch64_expand_cpymem_mops.

Reviewed-by: Richard Sandiford <richard.sandiford@arm.com>
gcc/ChangeLog/
PR target/111121
* config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
(movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
* config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
for memmove.
* config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
function.

gcc/testsuite/ChangeLog/
PR target/111121
* gcc.target/aarch64/mops_4.c: Add memmove testcases.

9 months agoRISC-V: Support {U}INT64 to FP16 auto-vectorization
Pan Li [Thu, 28 Sep 2023 05:51:07 +0000 (13:51 +0800)]
RISC-V: Support {U}INT64 to FP16 auto-vectorization

Update in v2:

* Add math trap check.
* Adjust some test cases.

Original logs:

This patch would like to support the auto-vectorization from
the INT64 to FP16. We take below steps for the conversion.

* INT64 to FP32.
* FP32 to FP16.

Given sample code as below:
void
test_func (int64_t * __restrict a, _Float16 *b, unsigned n)
{
  for (unsigned i = 0; i < n; i++)
    b[i] = (_Float16) (a[i]);
}

Before this patch:
test.c:6:26: missed: couldn't vectorize loop
test.c:6:26: missed: not vectorized: unsupported data-type
        ld      a0,0(s0)
        call    __floatdihf
        fsh     fa0,0(s1)
        addi    s0,s0,8
        addi    s1,s1,2
        bne     s2,s0,.L3
        ld      ra,24(sp)
        ld      s0,16(sp)
        ld      s1,8(sp)
        ld      s2,0(sp)
        addi    sp,sp,32

After this patch:
        vsetvli a5,a2,e8,mf8,ta,ma
        vle64.v v1,0(a0)
        vsetvli a4,zero,e32,mf2,ta,ma
        vfncvt.f.x.w    v1,v1
        vsetvli zero,zero,e16,mf4,ta,ma
        vfncvt.f.f.w    v1,v1
        vsetvli zero,a2,e16,mf4,ta,ma
        vse16.v v1,0(a1)

Please note VLS mode is also involved in this patch and covered by the
test cases.

PR target/111506

gcc/ChangeLog:

* config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
New pattern.
* config/riscv/vector-iterators.md: New iterator.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/unop/cvt-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/cvt-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/cvt-0.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
9 months ago[RA]: Add flag for checking IRA in progress
Vladimir N. Makarov [Thu, 28 Sep 2023 13:41:18 +0000 (09:41 -0400)]
[RA]: Add flag for checking IRA in progress

RISCV target developers need a flag to prevent creating
insns in IRA which can not be split after RA as they will need a
temporary reg.  The patch introduces such flag.

gcc/ChangeLog:

* rtl.h (lra_in_progress): Change type to bool.
(ira_in_progress): Add new extern.
* ira.cc (ira_in_progress): New global.
(pass_ira::execute): Set up ira_in_progress.
* lra.cc: (lra_in_progress): Change type to bool and initialize.
(lra): Use bool values for lra_in_progress.
* lra-eliminations.cc (init_elim_table): Ditto.

9 months agotarget/111600 - avoid deep recursion in access diagnostics
Richard Biener [Thu, 28 Sep 2023 09:51:30 +0000 (11:51 +0200)]
target/111600 - avoid deep recursion in access diagnostics

pass_waccess::check_dangling_stores uses recursion to traverse the CFG.
The following changes this to use a heap allocated worklist to avoid
blowing the stack.

Instead of using a better iteration order it tries hard to preserve
the current iteration order to avoid new false positives to pop up
since the set of stores we keep track isn't properly modeling flow,
so what is diagnosed and what not is quite random.  We are also
lacking the ideal RPO compute on the inverted graph that would just
ignore reverse unreachable code (as the current iteration scheme does).

PR target/111600
* gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
Use a heap allocated worklist for CFG traversal instead of
recursion.

9 months agolibgfortran: Use __builtin_unreachable() not -Wno-stringop-overflow to silence warning
Tobias Burnus [Thu, 28 Sep 2023 11:06:13 +0000 (13:06 +0200)]
libgfortran: Use __builtin_unreachable() not -Wno-stringop-overflow to silence warning

The only caller of write_z is formatted_transfer_scalar_write that passes
kind to 'len'; in turn, write_z is the only caller of xtoa_big, passing on
its 'len'.  The kind is passed as is, except for GFC_REAL_17 for which
len = 16 is used.

libgfortran/
* io/write.c (xtoa_big): Change a 'GCC diagnostic ignored
"-Wstringop-overflow"' to an assumption (via __builtin_unreachable).t

9 months agovec.h: Make some ops work with non-trivially copy constructible and/or destructible...
Jakub Jelinek [Thu, 28 Sep 2023 09:59:10 +0000 (11:59 +0200)]
vec.h: Make some ops work with non-trivially copy constructible and/or destructible types

We have some very limited support for non-POD types in vec.h
(in particular grow_cleared will invoke default ctors on the
cleared elements and vector copying invokes copy ctors.

My pending work on wide_int/widest_int which makes those two
non-trivially default constructible, copyable and destructible shows this
isn't enough though.
In particular the uses of it in irange shows that quick_push
still uses just assignment operator rather than copy construction
and we never invoke destructors on anything.

The following patch does that for quick_push (copy construction
using placement new rather than assignment, for trivially copy
constructible types I think it should be the same) and invokes
destructors (only if non-trivially destructible) in pop, release
and truncate.  Now as discussed last night on IRC, the pop case
is problematic, because our pop actually does two things,
it decreases length (so the previous last element should be destructed)
but also returns a reference to it.  We have some 300+ uses of this
and the reference rather than returning it by value is useful at least
for the elements which are (larger) POD structures, so I'm not
prepared to change that.  Though obviously for types with non-trivial
destructors returning a reference to just destructed element is not
a good idea.  So, this patch for that case only makes pop return void
instead and any users wishing to get the last element need to use last ()
and pop () separately (currently there are none).

Note, a lot of vec.h operations is still not friendly for non-POD types,
and the patch tries to enforce that through static asserts.  Some
operations are now only allowed on trivially copyable types, sorting
operations as an extension on trivially copyable types or std::pair
of 2 trivially copyable types, quick_grow/safe_grow (but not _cleared
variants) for now have a commented out assert on trivially default
constructible types - this needs some further work before the assert
can be enabled - and finally all va_gc/va_gc_atomic vectors require
trivially destructible types.

2023-09-28  Jakub Jelinek  <jakub@redhat.com>
    Jonathan Wakely  <jwakely@redhat.com>

* vec.h: Mention in file comment limited support for non-POD types
in some operations.
(vec_destruct): New function template.
(release): Use it for non-trivially destructible T.
(truncate): Likewise.
(quick_push): Perform a placement new into slot
instead of assignment.
(pop): For non-trivially destructible T return void
rather than T & and destruct the popped element.
(quick_insert, ordered_remove): Note that they aren't suitable
for non-trivially copyable types.  Add static_asserts for that.
(block_remove): Assert T is trivially copyable.
(vec_detail::is_trivially_copyable_or_pair): New trait.
(qsort, sort, stablesort): Assert T is trivially copyable or
std::pair with both trivally copyable types.
(quick_grow): Add assert T is trivially default constructible,
for now commented out.
(quick_grow_cleared): Don't call quick_grow, instead inline it
by hand except for the new static_assert.
(gt_ggc_mx): Assert T is trivially destructable.
(auto_vec::operator=): Formatting fixes.
(auto_vec::auto_vec): Likewise.
(vec_safe_grow_cleared): Don't call vec_safe_grow, instead inline
it manually and call quick_grow_cleared method rather than quick_grow.
(safe_grow_cleared): Likewise.
* edit-context.cc (class line_event): Move definition earlier.
* tree-ssa-loop-im.cc (seq_entry::seq_entry): Make default ctor
defaulted.
* ipa-fnsummary.cc (evaluate_properties_for_edge): Use
safe_grow_cleared instead of safe_grow followed by placement new
constructing the elements.

9 months agoRemove some unused poly_int variables
Richard Sandiford [Thu, 28 Sep 2023 09:51:01 +0000 (10:51 +0100)]
Remove some unused poly_int variables

Switching to default constructors for poly_int exposed some
unused variables that weren't previously diagnosed.

gcc/
* dwarf2out.cc (mem_loc_descriptor): Remove unused variables.
* tree-affine.cc (expr_to_aff_combination): Likewise.

gcc/cp/
* constexpr.cc (cxx_fold_indirect_ref): Remove unused variables.

gcc/rust/
* backend/rust-constexpr.cc (rs_fold_indirect_ref): Remove unused
variables.

9 months agoDaily bump.
GCC Administrator [Thu, 28 Sep 2023 09:50:12 +0000 (09:50 +0000)]
Daily bump.

9 months agotree-optimization/111614 - missing convert in undistribute_bitref_for_vector
Richard Biener [Thu, 28 Sep 2023 07:41:30 +0000 (09:41 +0200)]
tree-optimization/111614 - missing convert in undistribute_bitref_for_vector

The following adjusts a flawed guard for converting the first vector
of the sum we create in undistribute_bitref_for_vector.

PR tree-optimization/111614
* tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly
convert the first vector when required.

* gcc.dg/torture/pr111614.c: New testcase.

9 months agoReplace riscv_vector with riscv_v in target selector clauses.
Joern Rennecke [Thu, 28 Sep 2023 03:17:32 +0000 (04:17 +0100)]
Replace riscv_vector with riscv_v in target selector clauses.

$ grep -rl '[^"<]riscv_vector\>[^.]' > file-list
$ cat edcmds
g/riscv_vector[^.]/s/\([^"<]riscv_v\)ector\>\([^.]\)/\1\2/g
w
q
$ sed 's/.*/ed & < edcmds/' < file-list > tmp
$ source tmp
$ git checkout gcc.target/riscv/predef-19.c
$ git checkout gcc.target/riscv/predef-18.c gcc.target/riscv/predef-20.c

gcc/testsuite/
* lib/target-supports.exp (check_effective_target_riscv_vector):
Delete.  Changed all users to use *riscv_v instead.
* g++.target/riscv/rvv/base/bug-10.C: Use riscv_v target selector.
* g++.target/riscv/rvv/base/bug-11.C: Likewise.
* g++.target/riscv/rvv/base/bug-13.C: Likewise.
* g++.target/riscv/rvv/base/bug-15.C: Likewise.
* g++.target/riscv/rvv/base/bug-16.C: Likewise.
* g++.target/riscv/rvv/base/bug-17.C: Likewise.
* g++.target/riscv/rvv/base/bug-2.C: Likewise.
* g++.target/riscv/rvv/base/bug-4.C: Likewise.
* g++.target/riscv/rvv/base/bug-5.C: Likewise.
* g++.target/riscv/rvv/base/bug-6.C: Likewise.
* g++.target/riscv/rvv/base/bug-7.C: Likewise.
* g++.target/riscv/rvv/base/bug-9.C: Likewise.
* g++.target/riscv/rvv/base/bug-12.C: Likewise.
* g++.target/riscv/rvv/base/bug-14.C: Likewise.
* g++.target/riscv/rvv/base/bug-18.C: Likewise.
* g++.target/riscv/rvv/base/bug-19.C: Likewise.
* g++.target/riscv/rvv/base/bug-20.C: Likewise.
* g++.target/riscv/rvv/base/bug-21.C: Likewise.
* g++.target/riscv/rvv/base/bug-22.C: Likewise.
* g++.target/riscv/rvv/base/bug-23.C: Likewise.
* g++.target/riscv/rvv/base/bug-3.C: Likewise.
* g++.target/riscv/rvv/base/bug-8.C: Likewise.
* gcc.dg/vect/pr88598-1.c: Likewise.
* gcc.dg/vect/pr88598-2.c: Likewise.
* gcc.dg/vect/pr88598-3.c: Likewise.
* gcc.dg/vect/slp-26.c: Likewise.
* gcc.dg/vect/slp-reduc-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/copysign-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/copysign-zvfh-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/narrow_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/narrow_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/narrow_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/shift-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/shift-scalar-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vadd-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vadd-zvfh-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vand-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vdiv-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vdiv-zvfh-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vmax-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vmax-zvfh-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vmin-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vmin-zvfh-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vmul-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vmul-zvfh-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vor-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vrem-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vsub-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vsub-zvfh-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vxor-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/mulh_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/mulh_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vadd-run-nofm.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vdiv-run-nofm.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vmul-run-nofm.c: Likewise.
* gcc.target/riscv/rvv/autovec/binop/vsub-run-nofm.c: Likewise.
* gcc.target/riscv/rvv/autovec/cmp/vcond_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cmp/vcond_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/cmp/vcond_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/cmp/vcond_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-zvfh-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-zvfh-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-zvfh-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-zvfh-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vncvt-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vsext-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vzext-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/single_rgroup_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/single_rgroup_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/single_rgroup_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-10.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-11.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-12.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-13.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-14.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-15.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-16.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-17.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-18.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-19.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-8.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/slp_run-9.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/live_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/partial/live_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/series_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run-10.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run-11.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run-12.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run-8.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run-9.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-10.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-11.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-12.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-8.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-9.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_nofm_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_nofm_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_nofm_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_nofm_run-10.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_nofm_run-11.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_nofm_run-12.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_nofm_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_nofm_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_nofm_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_nofm_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_nofm_run-8.c: Likewise.
* gcc.target/riscv/rvv/autovec/ternop/ternop_nofm_run-9.c: Likewise.
* gcc.target/riscv/rvv/autovec/unop/abs-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/unop/vfsqrt-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/unop/vneg-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/unop/vnot-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/unop/math-ceil-run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/unop/math-ceil-run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/unop/math-floor-run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/unop/math-floor-run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/unop/math-nearbyint-run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/unop/math-nearbyint-run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/unop/math-rint-run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/unop/math-rint-run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/unop/math-round-run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/unop/math-round-run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/unop/math-trunc-run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/unop/math-trunc-run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-10.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-11.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-12.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-13.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-14.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-8.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-9.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/compress_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/compress_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/compress_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/compress_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/compress_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/compress_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/insert_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/insert_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/repeat_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/repeat_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/repeat_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/repeat_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/repeat_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/repeat_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c: Likewise.
* gcc.target/riscv/rvv/autovec/vmv-imm-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run-10.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run-11.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run-12.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run-8.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run-9.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-10.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-11.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-12.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-8.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/vec-avg-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_reduc_order_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_reduc_order_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/widen/widen_reduc_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-10.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-11.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-9.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-10.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-11.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-8.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-9.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-10.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-9.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-10.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-9.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/strided_store_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/strided_store_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-8.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-8.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-8.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-12.c: Likewise.
* gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/reduc_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/reduc_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/reduc_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/reduc_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/reduc_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/reduc_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/reduc_run-8.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/reduc_run-9.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/reduc_strict_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/extract_last_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/extract_last_run-10.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/extract_last_run-11.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/extract_last_run-12.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/extract_last_run-13.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/extract_last_run-14.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/extract_last_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/extract_last_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/extract_last_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/extract_last_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/extract_last_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/extract_last_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/extract_last_run-8.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/extract_last_run-9.c: Likewise.
* gcc.target/riscv/rvv/autovec/reduc/reduc_strict_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_arith_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_arith_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_arith_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_arith_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_arith_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_arith_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_arith_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_arith_run-8.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_arith_run-9.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fadd_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fadd_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fadd_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fadd_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma_run-8.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fmax_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fmin_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fmul_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fmul_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fmul_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_fmul_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_shift_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_shift_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_shift_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_shift_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_shift_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_shift_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_shift_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_shift_run-8.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_shift_run-9.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_convert_float2float_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_convert_float2float_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_convert_int2float_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_convert_int2float_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_convert_int2int_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_convert_int2int_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_copysign-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_copysign-zvfh-run.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_mulh_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_mulh_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_sqrt_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_sqrt_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_unary_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_unary_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_unary_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_unary_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_unary_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_unary_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_unary_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_unary_run-8.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/mask_struct_load_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/mask_struct_load_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/mask_struct_load_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/mask_struct_load_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/mask_struct_load_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/mask_struct_load_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/mask_struct_load_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/mask_struct_store_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/mask_struct_store_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/mask_struct_store_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/mask_struct_store_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/mask_struct_store_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/mask_struct_store_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/mask_struct_store_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/struct_vect_run-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/struct_vect_run-10.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/struct_vect_run-11.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/struct_vect_run-12.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/struct_vect_run-13.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/struct_vect_run-14.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/struct_vect_run-15.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/struct_vect_run-16.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/struct_vect_run-17.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/struct_vect_run-18.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/struct_vect_run-2.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/struct_vect_run-3.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/struct_vect_run-4.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/struct_vect_run-5.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/struct_vect_run-6.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/struct_vect_run-7.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/struct_vect_run-8.c: Likewise.
* gcc.target/riscv/rvv/autovec/struct/struct_vect_run-9.c: Likewise.
* gcc.target/riscv/rvv/base/bug-3.c: Likewise.
* gcc.target/riscv/rvv/base/bug-4.c: Likewise.
* gcc.target/riscv/rvv/base/bug-5.c: Likewise.
* gcc.target/riscv/rvv/base/float-point-frm-run-1.c: Likewise.
* gcc.target/riscv/rvv/base/float-point-frm-run-2.c: Likewise.
* gcc.target/riscv/rvv/base/float-point-frm-run-3.c: Likewise.
* gcc.target/riscv/rvv/base/float-point-frm-run-4.c: Likewise.
* gcc.target/riscv/rvv/base/float-point-frm-run-5.c: Likewise.
* gcc.target/riscv/rvv/base/abi-call-args-1-run.c: Likewise.
* gcc.target/riscv/rvv/base/abi-call-args-2-run.c: Likewise.
* gcc.target/riscv/rvv/base/abi-call-args-3-run.c: Likewise.
* gcc.target/riscv/rvv/base/abi-call-args-4-run.c: Likewise.
* gcc.target/riscv/rvv/base/abi-call-return-run.c: Likewise.
* gcc.target/riscv/rvv/base/scalar-move-merged-run-1.c: Likewise.

9 months agoRISC-V: Bugfix for RTL check[PR111533]
xuli [Thu, 28 Sep 2023 01:29:12 +0000 (01:29 +0000)]
RISC-V: Bugfix for RTL check[PR111533]

Consider the flowing situation:
BB5: local_dem(RVV Insn 1, AVL(reg zero))
RVV Insn 1: vmv.s.x, AVL (const_int 1)
RVV Insn 2: vredsum.vs, AVL(reg zero)

vmv.s.x has vl operand, the following code will get
avl (cosnt_int) from RVV Insn 1.
rtx avl = has_vl_op (insn->rtl ()) ? get_vl (insn->rtl ())
                                   : dem.get_avl ();

If use REGNO for const_int, the compiler will crash:

during RTL pass: vsetvl
res_debug.c: In function '__dn_count_labels':
res_debug.c:1050:1: internal compiler error: RTL check: expected code 'reg',
have 'const_int' in rhs_regno, at rtl.h:1934
 1050 | }
      | ^
0x8fb169 rtl_check_failed_code1(rtx_def const*, rtx_code, char const*, int, char const*)
../.././gcc/gcc/rtl.cc:770
0x1399818 rhs_regno(rtx_def const*)
../.././gcc/gcc/rtl.h:1934
0x1399818 anticipatable_occurrence_p
../.././gcc/gcc/config/riscv/riscv-vsetvl.cc:348

So in this case avl should be obtained from dem.

Another issue is caused by the following code:
HOST_WIDE_INT diff = INTVAL (builder.elt (i)) - i;

during RTL pass: expand
../../.././gcc/libgfortran/generated/matmul_c4.c: In function 'matmul_c4':
../../.././gcc/libgfortran/generated/matmul_c4.c:2906:39: internal compiler error: RTL check:
expected code 'const_int', have 'const_poly_int' in expand_const_vector,
at config/riscv/riscv-v.cc:1149

The builder.elt (i) can be either const_int or const_poly_int.

PR target/111533

gcc/ChangeLog:

* config/riscv/riscv-v.cc (expand_const_vector): Fix bug.
* config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix bug.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr111533-1.c: New test.
* gcc.target/riscv/rvv/base/pr111533-2.c: New test.

9 months agolibstdc++: Fix format string in StdChronoTimeZoneRulePrinter
Jonathan Wakely [Wed, 27 Sep 2023 16:03:51 +0000 (17:03 +0100)]
libstdc++: Fix format string in StdChronoTimeZoneRulePrinter

libstdc++-v3/ChangeLog:

* python/libstdcxx/v6/printers.py (StdChronoTimeZoneRulePrinter):
Fix incorrect number of replacement fields.

9 months agoOpenMP: GIMPLE_OMP_STRUCTURED_BLOCK bug fix
Sandra Loosemore [Wed, 27 Sep 2023 03:21:43 +0000 (03:21 +0000)]
OpenMP: GIMPLE_OMP_STRUCTURED_BLOCK bug fix

This is a bug fix for commit a62c8324e7e31ae6614f549bdf9d8a653233f8fc,
which added GIMPLE_OMP_STRUCTURED_BLOCK.  I found a big switch statement
over gimple codes that needs to know about this new node, but didn't.

gcc/ChangeLog
* gimple.cc (gimple_copy): Add case GIMPLE_OMP_STRUCTURED_BLOCK.

9 months agoDarwin, configure: Allow for an unrecognisable dsymutil [PR111610].
Iain Sandoe [Wed, 27 Sep 2023 10:05:31 +0000 (11:05 +0100)]
Darwin, configure: Allow for an unrecognisable dsymutil [PR111610].

We had a catch-all configuration case for missing or unrecognised dsymutil
but it was setting the dsymutil source to "UNKNOWN" which is not usable in
this context (since it clashes with an existing enum).  We rename this to
DET_UNKNOWN (for Darwin External Toolchain).

PR target/111610

gcc/ChangeLog:

* configure: Regenerate.
* configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN".

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
9 months agoaarch64: Fine-grained policies to control ldp-stp formation
Manos Anagnostakis [Tue, 26 Sep 2023 05:02:02 +0000 (07:02 +0200)]
aarch64: Fine-grained policies to control ldp-stp formation

This patch implements the following TODO in gcc/config/aarch64/aarch64.cc
to provide the requested behaviour for handling ldp and stp:

  /* Allow the tuning structure to disable LDP instruction formation
     from combining instructions (e.g., in peephole2).
     TODO: Implement fine-grained tuning control for LDP and STP:
           1. control policies for load and store separately;
           2. support the following policies:
              - default (use what is in the tuning structure)
              - always
              - never
              - aligned (only if the compiler can prove that the
                load will be aligned to 2 * element_size)  */

It provides two new and concrete target-specific command-line parameters
--param=aarch64-ldp-policy= and --param=aarch64-stp-policy=
to give the ability to control load and store policies seperately as
stated in part 1 of the TODO.

The accepted values for both parameters are:
 * default: Use the policy of the tuning structure (default).
 * always: Emit ldp/stp regardless of alignment.
 * never: Do not emit ldp/stp.
 * aligned: In order to emit ldp/stp, first check if the load/store will
   be aligned to 2 * element_size.

Bootstrapped and regtested aarch64-linux.

gcc/ChangeLog:
* config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): New
enum type.
(enum aarch64_stp_policy): New enum type.
* config/aarch64/aarch64-protos.h (struct tune_params): Add
appropriate enums for the policies.
(aarch64_mem_ok_with_ldpstp_policy_model): New declaration.
* config/aarch64/aarch64-tuning-flags.def
(AARCH64_EXTRA_TUNING_OPTION): Remove superseded tuning
options.
* config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): New
function to parse ldp-policy parameter.
(aarch64_parse_stp_policy): New function to parse stp-policy parameter.
(aarch64_override_options_internal): Call parsing functions.
(aarch64_mem_ok_with_ldpstp_policy_model): New function.
(aarch64_operands_ok_for_ldpstp): Add call to
aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
check and alignment check and remove superseded ones.
(aarch64_operands_adjust_ok_for_ldpstp): Add call to
aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
check and alignment check and remove superseded ones.
* config/aarch64/aarch64.opt (aarch64-ldp-policy): New param.
(aarch64-stp-policy): New param.
* doc/invoke.texi: Document the parameters accordingly.

gcc/testsuite/ChangeLog:
* gcc.target/aarch64/ampere1-no_ldp_combine.c: Removed.
* gcc.target/aarch64/ldp_aligned.c: New test.
* gcc.target/aarch64/ldp_always.c: New test.
* gcc.target/aarch64/ldp_never.c: New test.
* gcc.target/aarch64/stp_aligned.c: New test.
* gcc.target/aarch64/stp_always.c: New test.
* gcc.target/aarch64/stp_never.c: New test.

Signed-off-by: Manos Anagnostakis <manos.anagnostakis@vrull.eu>
Co-Authored-By: Philipp Tomsich <philipp.tomsich@vrull.eu>
Co-Authored-By: Manolis Tsamis <manolis.tsamis@vrull.eu>
9 months agovect, omp: inbranch simdclone dropping const
Andre Vieira [Wed, 27 Sep 2023 10:05:40 +0000 (11:05 +0100)]
vect, omp: inbranch simdclone dropping const

The const attribute is ignored when simdclone's are used inbranch. This is due
to the fact that when analyzing a MASK_CALL we were not looking at the targeted
function for flags, but instead only at the internal function call itself.
This patch adds code to make sure we look at the target function to check for
the const attribute and enables the autovectorization of inbranch const
simdclones without needing the loop to be adorned the 'openmp simd' pragma.

gcc/ChangeLog:

* tree-data-ref.cc (include calls.h): Add new include.
(get_references_in_stmt): Correctly handle IFN_MASK_CALL.

gcc/testsuite/ChangeLog:

* gcc.dg/vect/vect-simd-clone-19.c: New test.

9 months agoSimplify abs (copysign (x, y))
Richard Biener [Wed, 27 Sep 2023 10:48:50 +0000 (12:48 +0200)]
Simplify abs (copysign (x, y))

The following adds simplification of abs (copysign (x, y)) to abs (x).

* match.pd (abs (copysign (x, y)) -> abs (x)): New pattern.

* gcc.dg/fold-abs-6.c: New testcase.

9 months agoHarden scan patterns with a bit of scripting:
Joern Rennecke [Wed, 27 Sep 2023 09:05:13 +0000 (10:05 +0100)]
Harden scan patterns with a bit of scripting:

$ egrep -r 'scan-assembler(|-not|-times) "[[:alnum:].]{1,7}"' riscv
$ egrep -rl 'scan-assembler(|-not|-times) "[[:alnum:].]{1,7}"' riscv > files
$ cat edcmds
g/\(scan-assembler\(\|-not\|-times\) \+\)"\([[:alnum:]]\{1,5\}\)\.\([[:alpha:].]\{1,3\}\)"/s//\1{\\m\3\\.\4\\M}/
g/\(scan-assembler\(\|-not\|-times\) \+\)"\([[:alnum:]]\{1,7\}\)"/s//\1{\\m\3}/
w
q
$ sed 's/.*/ed & < edcmds/' < files > tmp
$ source tmp

gcc/testsuite/
* gcc.target/riscv/shift-shift-1.c: Avoid spurious pattern matches.
* gcc.target/riscv/shift-shift-3.c: Likewise.
* gcc.target/riscv/zba-shNadd-01.c: Likewise.
* gcc.target/riscv/zba-shNadd-02.c: Likewise.
* gcc.target/riscv/zbb-andn-orn-xnor-01.c: Likewise.
* gcc.target/riscv/zbb-andn-orn-xnor-02.c: Likewise.
* gcc.target/riscv/zbb-min-max.c: Likewise.
* gcc.target/riscv/zero-extend-1.c: Likewise.
* gcc.target/riscv/zero-extend-2.c: Likewise.
* gcc.target/riscv/zero-extend-3.c: Likewise.
* gcc.target/riscv/zero-extend-4.c: Likewise.
* gcc.target/riscv/zero-extend-5.c: Likewise.
* gcc.target/riscv/_Float16-soft-2.c: Likewise.
* gcc.target/riscv/_Float16-soft-3.c: Likewise.
* gcc.target/riscv/_Float16-zfh-1.c: Likewise.
* gcc.target/riscv/_Float16-zfh-2.c: Likewise.
* gcc.target/riscv/_Float16-zfh-3.c: Likewise.
* gcc.target/riscv/and-extend-1.c: Likewise.
* gcc.target/riscv/and-extend-2.c: Likewise.
* gcc.target/riscv/pr108987.c: Likewise.
* gcc.target/riscv/ret-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/align-1.c: Likewise.
* gcc.target/riscv/rvv/autovec/align-2.c: Likewise.
* gcc.target/riscv/zba-shNadd-04.c: Likewise.
* gcc.target/riscv/zba-shNadd-07.c: Likewise.
* gcc.target/riscv/zbb-rol-ror-02.c: Likewise.
* gcc.target/riscv/zbbw.c: Likewise.
* gcc.target/riscv/zbc32.c: Likewise.
* gcc.target/riscv/zbc64.c: Likewise.
* gcc.target/riscv/zbkb32.c: Likewise.
* gcc.target/riscv/zbkb64.c: Likewise.
* gcc.target/riscv/zbkc32.c: Likewise.
* gcc.target/riscv/zbkc64.c: Likewise.
* gcc.target/riscv/zbkx32.c: Likewise.
* gcc.target/riscv/zbkx64.c: Likewise.
* gcc.target/riscv/zfa-fleq-fltq.c: Likewise.
* gcc.target/riscv/zfa-fli-zfh.c: Likewise.
* gcc.target/riscv/zfa-fli.c: Likewise.
* gcc.target/riscv/zknd64.c: Likewise.
* gcc.target/riscv/zksed32.c: Likewise.
* gcc.target/riscv/zksed64.c: Likewise.
* gcc.target/riscv/zksh32.c: Likewise.
* gcc.target/riscv/zksh64.c: Likewise.
* gcc.target/riscv/_Float16-soft-1.c: Likewise.
* gcc.target/riscv/_Float16-zfhmin-1.c: Likewise.
* gcc.target/riscv/_Float16-zfhmin-2.c: Likewise.
* gcc.target/riscv/_Float16-zfhmin-3.c: Likewise.
* gcc.target/riscv/_Float16-zhinxmin-1.c: Likewise.
* gcc.target/riscv/_Float16-zhinxmin-2.c: Likewise.
* gcc.target/riscv/_Float16-zhinxmin-3.c: Likewise.
* gcc.target/riscv/fle-ieee.c: Likewise.
* gcc.target/riscv/fle-snan.c: Likewise.
* gcc.target/riscv/flef-ieee.c: Likewise.
* gcc.target/riscv/flef-snan.c: Likewise.
* gcc.target/riscv/flt-ieee.c: Likewise.
* gcc.target/riscv/flt-snan.c: Likewise.
* gcc.target/riscv/fltf-ieee.c: Likewise.
* gcc.target/riscv/fltf-snan.c: Likewise.
* gcc.target/riscv/interrupt-1.c: Likewise.
* gcc.target/riscv/interrupt-mmode.c: Likewise.
* gcc.target/riscv/interrupt-smode.c: Likewise.
* gcc.target/riscv/interrupt-umode.c: Likewise.
* gcc.target/riscv/pr106888.c: Likewise.
* gcc.target/riscv/pr89835.c: Likewise.
* gcc.target/riscv/shift-and-1.c: Likewise.
* gcc.target/riscv/shift-and-2.c: Likewise.
* gcc.target/riscv/shift-shift-2.c: Likewise.
* gcc.target/riscv/shift-shift-4.c: Likewise.
* gcc.target/riscv/shift-shift-5.c: Likewise.
* gcc.target/riscv/shorten-memrefs-7.c: Likewise.
* gcc.target/riscv/sign-extend.c: Likewise.
* gcc.target/riscv/switch-qi.c: Likewise.
* gcc.target/riscv/switch-si.c: Likewise.
* gcc.target/riscv/xtheadbb-ext-1.c: Likewise.
* gcc.target/riscv/xtheadbb-ext.c: Likewise.
* gcc.target/riscv/xtheadbb-extu-1.c: Likewise.
* gcc.target/riscv/xtheadbb-extu.c: Likewise.
* gcc.target/riscv/xtheadbb-strlen.c: Likewise.
* gcc.target/riscv/xtheadbs-tst.c: Likewise.
* gcc.target/riscv/xtheadfmv-fmv.c: Likewise.
* gcc.target/riscv/xventanacondops-primitiveSemantics.c: Likewise.
* gcc.target/riscv/zba-adduw.c: Likewise.
* gcc.target/riscv/zba-shadd.c: Likewise.
* gcc.target/riscv/zba-slliuw.c: Likewise.
* gcc.target/riscv/zba-zextw.c: Likewise.
* gcc.target/riscv/zbb-min-max-02.c: Likewise.
* gcc.target/riscv/zbb-min-max-03.c: Likewise.
* gcc.target/riscv/zbb-rol-ror-01.c: Likewise.
* gcc.target/riscv/zbb-rol-ror-03.c: Likewise.
* gcc.target/riscv/zbb-rol-ror-04.c: Likewise.
* gcc.target/riscv/zbb-rol-ror-05.c: Likewise.
* gcc.target/riscv/zbb-rol-ror-06.c: Likewise.
* gcc.target/riscv/zbb-rol-ror-07.c: Likewise.
* gcc.target/riscv/zbb-rol-ror-08.c: Likewise.
* gcc.target/riscv/zbb-rol-ror-09.c: Likewise.
* gcc.target/riscv/zbb-strlen.c: Likewise.
* gcc.target/riscv/zbb_32_bswap-1.c: Likewise.
* gcc.target/riscv/zbb_32_bswap-2.c: Likewise.
* gcc.target/riscv/zbb_bswap-1.c: Likewise.
* gcc.target/riscv/zbb_bswap-2.c: Likewise.
* gcc.target/riscv/zbs-bclr.c: Likewise.
* gcc.target/riscv/zbs-bext-02.c: Likewise.
* gcc.target/riscv/zbs-bext.c: Likewise.
* gcc.target/riscv/zbs-binv.c: Likewise.
* gcc.target/riscv/zbs-bset.c: Likewise.
* gcc.target/riscv/zero-scratch-regs-2.c: Likewise.
* gcc.target/riscv/zicond-primitiveSemantics.c: Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_return_0_imm.c: Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_return_imm_imm.c: Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_return_imm_reg.c: Likewise.
* gcc.target/riscv/zicond-primitiveSemantics_return_reg_reg.c: Likewise.

9 months agoremove workaround for GCC 4.1-4.3 [PR105606]
Jakub Jelinek [Wed, 27 Sep 2023 08:38:54 +0000 (10:38 +0200)]
remove workaround for GCC 4.1-4.3 [PR105606]

While looking into vec.h, I've noticed we still have a workaround for
GCC 4.1-4.3 bugs.
As we now use C++11 and thus need to be built by GCC 4.8 or later,
I think this is now never used.

2023-09-27  Jakub Jelinek  <jakub@redhat.com>

PR c++/105606
* system.h (BROKEN_VALUE_INITIALIZATION): Don't define.
* vec.h (vec_default_construct): Remove BROKEN_VALUE_INITIALIZATION
workaround.
* function.cc (assign_parm_find_data_types): Likewise.

9 months agoRISC-V: Support FP roundeven auto-vectorization
Pan Li [Wed, 27 Sep 2023 08:13:43 +0000 (16:13 +0800)]
RISC-V: Support FP roundeven auto-vectorization

This patch would like to support auto-vectorization for the
roundeven API in math.h. It depends on the -ffast-math option.

When we would like to call roundeven like v2 = roundeven (v1), we will
convert it into below insns (reference the implementation of llvm).

* vfcvt.x.f v3, v1, RNE
* vfcvt.f.x v2, v3

However, the floating point value may not need the cvt as above if
its mantissa is zero. For example single precision floating point below.

  +-----------+---------------+-----------------+
  | raw float | binary layout | after roundeven |
  +-----------+---------------+-----------------+
  | 8388607.5 | 0x4affffff    | 8388608.0       |
  | 8388608.0 | 0x4b000000    | 8388608.0       |
  | 8388609.0 | 0x4b000001    | 8388609.0       |
  +-----------+---------------+-----------------+

All single floating point glte 8388608.0 will have all zero mantisaa.
We leverage vmflt and mask to filter them out in vector and only do the
cvt on mask.

Befor this patch:
math-roundeven-1.c:21:1: missed: couldn't vectorize loop
  ...
.L3:
  flw     fa0,0(s0)
  addi    s0,s0,4
  addi    s1,s1,4
  call    roundeven
  fsw     fa0,-4(s1)
  bne     s0,s2,.L3

After this patch:
  ...
  fsrmi       0   // Rounding to nearest, ties to even
.L4:
  vfabs.v     v1,v2
  vmflt.vf    v0,v1,fa5
  vfcvt.x.f.v v3,v2,v0.t
  vfcvt.f.x.v v1,v3,v0.t
  vfsgnj.vv   v1,v1,v2
  bne         .L4
.L14:
  fsrm        a6
  ret

Please note VLS mode is also involved in this patch and covered by the
test cases.  We will add more run test with zfa support later.

gcc/ChangeLog:

* config/riscv/autovec.md (roundeven<mode>2): New pattern.
* config/riscv/riscv-protos.h (enum insn_flags): New enum type.
(enum insn_type): Ditto.
(expand_vec_roundeven): New func decl.
* config/riscv/riscv-v.cc (expand_vec_roundeven): New func impl.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/unop/math-roundeven-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-roundeven-1.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-roundeven-2.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-roundeven-3.c: New test.
* gcc.target/riscv/rvv/autovec/vls/math-roundeven-1.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
9 months agoDSE: Fix ICE when the mode with access_size don't exist on the target[PR111590]
Juzhe-Zhong [Tue, 26 Sep 2023 22:47:12 +0000 (06:47 +0800)]
DSE: Fix ICE when the mode with access_size don't exist on the target[PR111590]

hen doing fortran test with 'V' extension enabled on RISC-V port.
I saw multiple ICE: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111590

The root cause is on DSE:

internal compiler error: in smallest_mode_for_size, at stor-layout.cc:356
0x1918f70 smallest_mode_for_size(poly_int<2u, unsigned long>, mode_class)
        ../../../../gcc/gcc/stor-layout.cc:356
0x11f75bb smallest_int_mode_for_size(poly_int<2u, unsigned long>)
        ../../../../gcc/gcc/machmode.h:916
0x3304141 find_shift_sequence
        ../../../../gcc/gcc/dse.cc:1738
0x3304f1a get_stored_val
        ../../../../gcc/gcc/dse.cc:1906
0x3305377 replace_read
        ../../../../gcc/gcc/dse.cc:2010
0x3306226 check_mem_read_rtx
        ../../../../gcc/gcc/dse.cc:2310
0x330667b check_mem_read_use
        ../../../../gcc/gcc/dse.cc:2415

After investigations, DSE is trying to do optimization like this following codes:

(insn 86 85 87 9 (set (reg:V4DI 168)
        (mem/u/c:V4DI (reg/f:DI 171) [0  S32 A128])) "bug.f90":6:18 discrim 6 1167 {*movv4di}
     (expr_list:REG_EQUAL (const_vector:V4DI [
                (const_int 4 [0x4])
                (const_int 1 [0x1]) repeated x2
                (const_int 3 [0x3])
            ])
        (nil)))

(set (mem) (reg:V4DI 168))

Then it ICE on: auto new_mode = smallest_int_mode_for_size (access_size * BITS_PER_UNIT);

The access_size may be 24 or 32. We don't have such integer modes with these size so it ICE.

TODO: The better way maybe make DSE use native_encode_rtx/native_decode_rtx
      but I don't know how to do that.  So let's quickly fix this issue, we
      can improve the fix later.

PR target/111590

gcc/ChangeLog:

* dse.cc (find_shift_sequence): Check the mode with access_size exist on the target.

9 months agoifcvt: Fix comments
Juzhe-Zhong [Wed, 27 Sep 2023 06:51:21 +0000 (14:51 +0800)]
ifcvt: Fix comments

Fix comments since original comment is confusing.

gcc/ChangeLog:

* tree-if-conv.cc (is_cond_scalar_reduction): Fix comments.

9 months agoRISCV test infrastructure for d / v / zfh extensions
Joern Rennecke [Wed, 27 Sep 2023 06:32:18 +0000 (07:32 +0100)]
RISCV test infrastructure for d / v / zfh extensions

gcc/testsuite/
* lib/target-supports.exp (check_effective_target_rv_float_abi_soft):
New proc.
(check_effective_target_riscv_d): Likewise.
(check_effective_target_riscv_v): Likewise.
(check_effective_target_riscv_zfh): Likewise.
(check_effective_target_riscv_v_ok): likewise.
(check_effective_target_riscv_zfh_ok): Likewise.
(riscv_get_arch, add_options_for_riscv_v): Likewise.
(add_options_for_riscv_zfh): Likewise.
(add_options_for_riscv_d): Likewise.

9 months agoRISC-V: Support FP trunc auto-vectorization
Pan Li [Wed, 27 Sep 2023 02:46:15 +0000 (10:46 +0800)]
RISC-V: Support FP trunc auto-vectorization

This patch would like to support auto-vectorization for the
trunc API in math.h. It depends on the -ffast-math option.

When we would like to call trunc/truncf like v2 = trunc (v1),
we will convert it into below insns (reference the implementation of
llvm).

* vfcvt.rtz.x.f v3, v1
* vfcvt.f.x v2, v3

However, the floating point value may not need the cvt as above if
its mantissa is zero. Take single precision floating point as example:

  +------------+---------------+-----------------+
  | raw float  | binary layout | after trunc     |
  +------------+---------------+-----------------+
  | -8388607.5 | 0xcaffffff    | -8388607.0      |
  | 8388607.5  | 0x4affffff    | 8388607.0       |
  | 8388608.0  | 0x4b000000    | 8388608.0       |
  | 8388609.0  | 0x4b000001    | 8388609.0       |
  +------------+---------------+-----------------+

All single floating point >= 8388608.0 will have all zero mantisaa.
We leverage vmflt and mask to filter them out in vector and only do
the cvt on mask.

Befor this patch:
math-trunc-1.c:21:1: missed: couldn't vectorize loop
  ...
.L3:
  flw     fa0,0(s0)
  addi    s0,s0,4
  addi    s1,s1,4
  call    trunc
  fsw     fa0,-4(s1)
  bne     s0,s2,.L3

After this patch:
  vfabs.v     v2,v1
  vmflt.vf    v0,v2,fa5
  vfcvt.rtz.x.f.v v4,v1,v0.t
  vfcvt.f.x.v v2,v4,v0.t
  vfsgnj.vv   v2,v2,v1
  bne         .L4

Please note VLS mode is also involved in this patch and covered by the
test cases.

gcc/ChangeLog:

* config/riscv/autovec.md (btrunc<mode>2): New pattern.
* config/riscv/riscv-protos.h (expand_vec_trunc): New func decl.
* config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): New func impl.
(expand_vec_trunc): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/unop/math-trunc-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-trunc-1.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-trunc-2.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-trunc-3.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-trunc-run-1.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-trunc-run-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/math-trunc-1.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
9 months agoFix pr111456-1.c for targets that use unsigned char by default
Andrew Pinski [Tue, 26 Sep 2023 22:00:38 +0000 (15:00 -0700)]
Fix pr111456-1.c for targets that use unsigned char by default

This fixes the testcase to use an explicit `signed char` instead of plain `char`.

Committed as obvious after a test with a cross to powerpc64-linux-gnu and x86_64-linux-gnu.

gcc/testsuite/ChangeLog:

PR testsuite/111603
* gcc.dg/tree-ssa/pr111456-1.c: Use `signed char` instead of plain `char`.

9 months ago__atomic_test_and_set: Fall back to library, not non-atomic code
Hans-Peter Nilsson [Sat, 23 Sep 2023 03:06:52 +0000 (05:06 +0200)]
__atomic_test_and_set: Fall back to library, not non-atomic code

Make __atomic_test_and_set consistent with other __atomic_ and __sync_
builtins: call a matching library function instead of emitting
non-atomic code when the target has no direct insn support.

There's special-case code handling targetm.atomic_test_and_set_trueval
!= 1 trying a modified maybe_emit_sync_lock_test_and_set.  Previously,
if that worked but its matching emit_store_flag_force returned NULL,
we'd segfault later on.  Now that the caller handles NULL, gcc_assert
here instead.

While the referenced PR:s are ARM-specific, the issue is general.

PR target/107567
PR target/109166
* builtins.cc (expand_builtin) <case BUILT_IN_ATOMIC_TEST_AND_SET>:
Handle failure from expand_builtin_atomic_test_and_set.
* optabs.cc (expand_atomic_test_and_set): When all attempts fail to
generate atomic code through target support, return NULL
instead of emitting non-atomic code.  Also, for code handling
targetm.atomic_test_and_set_trueval != 1, gcc_assert result
from calling emit_store_flag_force instead of returning NULL.

9 months agotestsuite: Require thread-fence for 29_atomics/atomic_flag/cons/value_init.cc
Hans-Peter Nilsson [Tue, 26 Sep 2023 13:59:02 +0000 (15:59 +0200)]
testsuite: Require thread-fence for 29_atomics/atomic_flag/cons/value_init.cc

A recent patch made __atomic_test_and_set no longer fall
back to emitting non-atomic code, but instead will then emit
a call to __atomic_test_and_set, thereby exposing the need
to gate also this test on support for atomics, similar to
r14-3980-g62b29347c38394.

libstdc++-v3:
* testsuite/29_atomics/atomic_flag/cons/value_init.cc: Add
dg-require-thread-fence.

9 months agoRISC-V: Add zicond tests
Xiao Zeng [Tue, 26 Sep 2023 18:40:58 +0000 (12:40 -0600)]
RISC-V: Add zicond tests

These are tests from patch 3/5 of Ziao Zeng's zicond submission.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/zicond-primitiveSemantics_return_0_imm.c: New test.
* gcc.target/riscv/zicond-primitiveSemantics_return_imm_imm.c: New test.
* gcc.target/riscv/zicond-primitiveSemantics_return_imm_reg.c: New test.
* gcc.target/riscv/zicond-primitiveSemantics_return_reg_reg.c: New test.

Co-Authored-By: Jeff Law <jlaw@ventanamicro.com>
9 months agoEnsure ssa_name is still valid.
Andrew MacLeod [Tue, 26 Sep 2023 13:27:52 +0000 (09:27 -0400)]
Ensure ssa_name is still valid.

When the IL changes, an equivalence set may contain ssa_names that no
longer exist.  Ensure names are still valid and not in the free list.

PR tree-optimization/111599
gcc/
* value-relation.cc (relation_oracle::valid_equivs): Ensure
ssa_name is valid.

gcc/testsuite/
* gcc.dg/pr111599.c: New.

9 months agoPR modula2/111510 runtime ICE findChildAndParent has caused internal runtime error
Gaius Mulley [Tue, 26 Sep 2023 17:08:37 +0000 (18:08 +0100)]
PR modula2/111510 runtime ICE findChildAndParent has caused internal runtime error

This patch fixes the runtime bug above.  The full runtime message is:
findChildAndParent has caused internal runtime error, RTentity is either
corrupt or the module storage has not been initialized yet.  The bug is
due to a non nul terminated string determining the module initialization order.
This results in modules being uninitialized and the above crash.  The bug
manifests itself on 32 bit systems - but obviously is latent on all
targets and the fix should be applied to both gcc-14 and gcc-13.

gcc/m2/ChangeLog:

PR modula2/111510
* gm2-compiler/M2GenGCC.mod (IsExportedGcc): Minor spacing changes.
(BuildTrashTreeFromInterface): Minor spacing changes.
* gm2-compiler/M2Options.mod (GetRuntimeModuleOverride): Call
string to generate a nul terminated C style string.
* gm2-compiler/M2Quads.mod (BuildStringAdrParam): New procedure.
(BuildM2InitFunction): Replace inline parameter generation with
calls to BuildStringAdrParam.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
9 months agoAArch64: Remove BTI from outline atomics
Wilco Dijkstra [Tue, 26 Sep 2023 15:27:38 +0000 (16:27 +0100)]
AArch64: Remove BTI from outline atomics

The outline atomic functions have hidden visibility and can only be called
directly.  Therefore we can remove the BTI at function entry.  This improves
security by reducing the number of indirect entry points in a binary.
The BTI markings on the objects are still emitted.

libgcc/ChangeLog:
* config/aarch64/lse.S (BTI_C): Remove define.

9 months agoMATCH: Simplify `(A ==/!= B) &/| (((cast)A) CMP C)`
Andrew Pinski [Wed, 20 Sep 2023 21:54:31 +0000 (14:54 -0700)]
MATCH: Simplify `(A ==/!= B) &/| (((cast)A) CMP C)`

This patch adds support to the pattern for `(A == B) &/| (A CMP C)`
where the second A could be casted to a different type.
Some were handled correctly if using seperate `if` statements
but not if combined with BIT_AND/BIT_IOR.
In the case of pr111456-1.c, the testcase would pass if
`--param=logical-op-non-short-circuit=0` was used but now
can be optimized always.

OK? Bootstrapped and tested on x86_64-linux-gnu.

PR tree-optimization/106164
PR tree-optimization/111456

gcc/ChangeLog:

* match.pd (`(A ==/!= B) & (A CMP C)`):
Support an optional cast on the second A.
(`(A ==/!= B) | (A CMP C)`): Likewise.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/cmpbit-6.c: New test.
* gcc.dg/tree-ssa/cmpbit-7.c: New test.
* gcc.dg/tree-ssa/pr111456-1.c: New test.

9 months agoPHIOPT: Fix minmax_replacement for three way
Andrew Pinski [Thu, 21 Sep 2023 03:05:17 +0000 (03:05 +0000)]
PHIOPT: Fix minmax_replacement for three way

So when diamond bb support was added to minmax_replacement in r13-1950-g9bb19e143cfe,
the code was not expecting the alt_middle_bb not to exist if it was empty (for threeway_p).
So when factor_out_conditional_conversion was used to factor out conversions, it turns out
the assumption for alt_middle_bb to be wrong and we ended up with threeway_p being true but
having middle_bb being empty but alt_middle_bb not being empty which causes wrong code in
many cases.

This patch fixes the issue by adding a test for the 2 cases where the assumption on
threeway_p case having the other bb being empty.

Changes made:
v2: Fix test for `(a <= u) b = MAX(a, d) else b = u`.

Note my plan for GCC 15 is remove minmax_replacement as match.pd will catch all cases
at that point.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/111469

gcc/ChangeLog:

* tree-ssa-phiopt.cc (minmax_replacement): Fix
the assumption for the `non-diamond` handling cases
of diamond code.

gcc/testsuite/ChangeLog:

* gcc.c-torture/execute/pr111469-1.c: New test.

9 months agoMATCH: Optimize COND_ADD reduction pattern
Juzhe-Zhong [Tue, 26 Sep 2023 09:58:47 +0000 (17:58 +0800)]
MATCH: Optimize COND_ADD reduction pattern

Current COND_ADD reduction pattern can't optimize floating-point vector.
As Richard suggested: https://gcc.gnu.org/pipermail/gcc-patches/2023-September/631336.html
Allow COND_ADD reduction pattern to optimize floating-point vector.

Bootstrap and Regression is running.

Ok for trunk if tests pass ?

gcc/ChangeLog:

* match.pd: Optimize COND_ADD reduction pattern.

9 months agoMATCH: Optimize COND_ADD_LEN reduction pattern
Juzhe-Zhong [Tue, 26 Sep 2023 09:50:37 +0000 (17:50 +0800)]
MATCH: Optimize COND_ADD_LEN reduction pattern

This patch leverage this commit: https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=62b505a4d5fc89
to optimize COND_LEN_ADD reduction pattern.

We are doing optimization of VEC_COND_EXPR + COND_LEN_ADD -> COND_LEN_ADD.

Consider thsi following case:

void
pr11594 (uint64_t *restrict a, uint64_t *restrict b, int loop_size)
{
  uint64_t result = 0;

  for (int i = 0; i < loop_size; i++)
    {
      if (b[i] <= a[i])
{
  result += a[i];
}
    }

  a[0] = result;
}

Before this patch:
        vsetvli a7,zero,e64,m1,ta,ma
        vmv.v.i v2,0
        vmv1r.v v3,v2                    --- redundant
.L3:
        vsetvli a5,a2,e64,m1,ta,ma
        vle64.v v1,0(a3)
        vle64.v v0,0(a1)
        slli    a6,a5,3
        vsetvli a7,zero,e64,m1,ta,ma
        sub     a2,a2,a5
        vmsleu.vv       v0,v0,v1
        add     a1,a1,a6
        vmerge.vvm      v1,v3,v1,v0     ---- redundant.
        add     a3,a3,a6
        vsetvli zero,a5,e64,m1,tu,ma
        vadd.vv v2,v2,v1
        bne     a2,zero,.L3
        li      a5,0
        vsetvli a4,zero,e64,m1,ta,ma
        vmv.s.x v1,a5
        vredsum.vs      v2,v2,v1
        vmv.x.s a5,v2
        sd      a5,0(a0)
        ret

After this patch:

vsetvli a6,zero,e64,m1,ta,ma
vmv.v.i v1,0
.L3:
vsetvli a5,a2,e64,m1,ta,ma
vle64.v v2,0(a4)
vle64.v v0,0(a1)
slli a3,a5,3
vsetvli a6,zero,e64,m1,ta,ma
sub a2,a2,a5
vmsleu.vv v0,v0,v2
add a1,a1,a3
vsetvli zero,a5,e64,m1,tu,mu
add a4,a4,a3
vadd.vv v1,v1,v2,v0.t
bne a2,zero,.L3
li a5,0
vsetivli zero,1,e64,m1,ta,ma
vmv.s.x v2,a5
vsetvli a5,zero,e64,m1,ta,ma
vredsum.vs v1,v1,v2
vmv.x.s a5,v1
sd a5,0(a0)
ret

Bootstrap && Regression is running.

Ok for trunk when testing passes ?

PR tree-optimization/111594
PR tree-optimization/110660

gcc/ChangeLog:

* match.pd: Optimize COND_LEN_ADD reduction.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/cond/cond_reduc-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/pr111594.c: New test.

9 months agoada: Fix missing call to Finalize_Protection for simple protected objects
Eric Botcazou [Mon, 18 Sep 2023 07:14:46 +0000 (09:14 +0200)]
ada: Fix missing call to Finalize_Protection for simple protected objects

There is a glitch in Exp_Ch7.Build_Finalizer causing the finalizer to do
nothing for simple protected objects.

The change also removes redundant calls to the Is_Simple_Protected_Type
predicate and fixes a minor inconsistency between Requires_Cleanup_Actions
and Build_Finalizer for this case.

gcc/ada/

* exp_ch7.adb (Build_Finalizer.Process_Declarations): Remove call
to Is_Simple_Protected_Type as redundant.
(Build_Finalizer.Process_Object_Declaration): Do not retrieve the
corresponding record type for simple protected objects. Make the
flow of control more explicit in their specific processing.
* exp_util.adb (Requires_Cleanup_Actions): Return false for simple
protected objects present in library-level package bodies for the
sake of consistency with Build_Finalizer and remove call to
Is_Simple_Protected_Type as redundant.

9 months agoada: Fix deferred constant wrongly rejected
Eric Botcazou [Sat, 16 Sep 2023 18:29:20 +0000 (20:29 +0200)]
ada: Fix deferred constant wrongly rejected

This recent regression occurs when the nominal subtype of the constant is a
discriminated record type with default discriminants.

gcc/ada/
PR ada/110488
* sem_ch3.adb (Analyze_Object_Declaration): Do not build a default
subtype for a deferred constant in the definite case too.

9 months agoada: Fix unnesting generated loops with nested finalization procedure
Marc Poulhiès [Thu, 14 Sep 2023 11:32:05 +0000 (13:32 +0200)]
ada: Fix unnesting generated loops with nested finalization procedure

The compiler can generate loops for creating array aggregates, for
example used during the initialization of variable. If the component
type of the array element requires finalization, the compiler also
creates a block and a nested procedure that need to be correctly
unnested if unnesting is enabled. During the unnesting transformation,
the scopes for these inner blocks need to be fixed and set to the
enclosing loop entity.

gcc/ada/

* exp_ch7.adb (Contains_Subprogram): Recursively search for subp
in loop's statements.
(Unnest_Loop)<Fixup_Inner_Scopes>: New.
(Unnest_Loop): Rename local variable for more clarity.
* exp_unst.ads: Refresh comment.

9 months agoada: Crash processing the accessibility level of an actual parameter
Javier Miranda [Fri, 15 Sep 2023 13:08:25 +0000 (13:08 +0000)]
ada: Crash processing the accessibility level of an actual parameter

gcc/ada/

* exp_ch6.adb (Expand_Call_Helper): When computing the
accessibility level of an actual parameter based on the
expresssion of a constant declaration, add missing support for
deferred constants

9 months agoada: Fix missing finalization of extended return object on abnormal completion
Eric Botcazou [Thu, 14 Sep 2023 14:42:45 +0000 (16:42 +0200)]
ada: Fix missing finalization of extended return object on abnormal completion

This happens in the case of a nonlimited return type and is a fallout of the
optimization recently implemented for them.

gcc/ada/

* einfo.ads (Status_Flag_Or_Transient_Decl): Remove ??? comment.
* exp_ch6.adb (Expand_N_Extended_Return_Statement): Extend the
handling of finalizable return objects to the non-BIP case.
* exp_ch7.adb (Build_Finalizer.Process_Declarations): Adjust the
comment accordingly.
* exp_util.adb (Requires_Cleanup_Actions): Likewise.

9 months agoada: Update personality function for CHERI purecap
Daniel King [Wed, 23 Aug 2023 13:13:55 +0000 (14:13 +0100)]
ada: Update personality function for CHERI purecap

This makes two changes to the GNAT personality function to reflect
differences for pure capability CHERI/Morello. The first is to use
__builtin_code_address_from_pointer to drop the LSB from Morello
code pointers when searching through call-site tables (without this
we would never find the right landing pad when unwinding).

The second change is to reflect the change in the exception table
format for pure-capability Morello where the landing pad is a capability
indirected by an offset in the call-site table.

gcc/ada/

* raise-gcc.c (get_ip_from_context): Adapt for CHERI purecap
(get_call_site_action_for): Adapt for CHERI purecap

9 months agoada: Fix conversions between addresses and integers
Daniel King [Wed, 23 Aug 2023 12:00:57 +0000 (13:00 +0100)]
ada: Fix conversions between addresses and integers

On CHERI targets the size of System.Address and Integer_Address
(or similar) are not the same. The operations in System.Storage_Elements
should be used to convert between integers and addresses.

gcc/ada/

* libgnat/a-tags.adb (To_Tag): Use System.Storage_Elements for
integer to address conversion.
* libgnat/s-putima.adb (Put_Image_Pointer): Likewise.

9 months agoada: Add CHERI variant of System.Stream_Attributes
Daniel King [Wed, 23 Aug 2023 13:24:54 +0000 (14:24 +0100)]
ada: Add CHERI variant of System.Stream_Attributes

Reading and writing System.Address to a stream on CHERI targets does
not preserve the capability tag; it will always be invalid since
a valid capability cannot be created out of thin air. Reading an Address
from a stream would therefore never yield a capability that can be
dereferenced.

This patch introduces a CHERI variant of System.Stream_Attributes that
raises Program_Error when attempting to read a System.Address from a stream.

gcc/ada/

* libgnat/s-stratt__cheri.adb: New file

9 months agoada: Define CHERI exception types
Daniel King [Tue, 12 Sep 2023 09:25:28 +0000 (10:25 +0100)]
ada: Define CHERI exception types

These exception types map to the CHERI hardware exceptions that are
triggered due to misuse of capabilities.

gcc/ada/

* libgnat/i-cheri.ads (Capability_Bound_Error)
(Capability_Permission_Error, Capability_Sealed_Error)
(Capability_Tag_Error): New, define CHERI exception types.

9 months agoada: Make minor corrections to CUDA-related comments
Ronan Desplanques [Tue, 12 Sep 2023 13:26:13 +0000 (15:26 +0200)]
ada: Make minor corrections to CUDA-related comments

gcc/ada/

* exp_prag.adb: Make minor corrections in comments.
* rtsfind.ads: Remove unused element from RTU_Id definition.

9 months agoada: Dimensional analysis when used with elementary functions
Derek Schacht [Wed, 6 Sep 2023 17:23:26 +0000 (13:23 -0400)]
ada: Dimensional analysis when used with elementary functions

gcc/ada/

* doc/gnat_ugn/gnat_and_program_execution.rst: Add more details on
using Generic Elementary Functions with dimensional analysis.
* gnat_ugn.texi: Regenerate.

9 months agoada: Clarify RM references that justify a constraint check
Yannick Moy [Tue, 12 Sep 2023 07:54:32 +0000 (09:54 +0200)]
ada: Clarify RM references that justify a constraint check

gcc/ada/

* exp_ch5.adb (Expand_N_Case_Statement): Reference both sections
of the Ada RM that deal with case statements and case expressions
to justify the insertion of a runtime check.

9 months agoRISC-V: Support FP round auto-vectorization
Pan Li [Tue, 26 Sep 2023 08:28:54 +0000 (16:28 +0800)]
RISC-V: Support FP round auto-vectorization

This patch would like to support auto-vectorization for the
round API in math.h. It depends on the -ffast-math option.

When we would like to call round/roundf like v2 = round (v1),
we will convert it into below insns (reference the implementation of llvm).

* vfcvt.x.f v3, v1, RMM
* vfcvt.f.x v2, v3

However, the floating point value may not need the cvt as above if
its mantissa is zero. Take single precision floating point as example:

  +------------+---------------+-----------------+
  | raw float  | binary layout | after round     |
  +------------+---------------+-----------------+
  | -8388607.5 | 0xcaffffff    | -8388608.0      |
  | 8388607.5  | 0x4affffff    | 8388608.0       |
  | 8388608.0  | 0x4b000000    | 8388608.0       |
  | 8388609.0  | 0x4b000001    | 8388609.0       |
  +------------+---------------+-----------------+

All single floating point >= 8388608.0 will have all zero mantisaa.
We leverage vmflt and mask to filter them out in vector and only do
the cvt on mask.

Befor this patch:
math-round-1.c:21:1: missed: couldn't vectorize loop
  ...
.L3:
  flw     fa0,0(s0)
  addi    s0,s0,4
  addi    s1,s1,4
  call    round
  fsw     fa0,-4(s1)
  bne     s0,s2,.L3

After this patch:
  ...
  fsrmi       4   // RMM, rounding to nearest, ties to max magnitude
.L4:
  vfabs.v     v2,v1
  vmflt.vf    v0,v2,fa5
  vfcvt.x.f.v v4,v1,v0.t
  vfcvt.f.x.v v2,v4,v0.t
  vfsgnj.vv   v2,v2,v1
  bne         .L4
.L14:
  fsrm        a6
  ret

Please note VLS mode is also involved in this patch and covered by the
test cases.

gcc/ChangeLog:

* config/riscv/autovec.md (round<mode>2): New pattern.
* config/riscv/riscv-protos.h (enum insn_flags): New enum type.
(enum insn_type): Ditto.
(expand_vec_round): New function decl.
* config/riscv/riscv-v.cc (expand_vec_round): New function impl.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/unop/math-round-0.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-round-1.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-round-2.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-round-3.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-round-run-1.c: New test.
* gcc.target/riscv/rvv/autovec/unop/math-round-run-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/math-round-1.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
9 months agoRISC-V/testsuite: Fix ILP32 RVV failures from missing <gnu/stubs-ilp32d.h>
Maciej W. Rozycki [Tue, 26 Sep 2023 09:20:50 +0000 (10:20 +0100)]
RISC-V/testsuite: Fix ILP32 RVV failures from missing <gnu/stubs-ilp32d.h>

In non-multilib installations system headers may not be available for
compilation options using a non-default model, causing build errors such
as:

In file included from .../include/features.h:527,
                 from .../include/assert.h:35,
                 from .../gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-template.h:2,
                 from .../gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv32.c:4:
.../include/gnu/stubs.h:11:11: fatal error: gnu/stubs-ilp32d.h: No such file or directory

Therefore we have to be very cautious when trying to use a non-default
model in the testsuite, preferably avoiding to rely on headers that have
not been supplied by GCC itself, or otherwise verifying in a preparatory
step whether the given model is buildable in a given test environment.

In this case however we can easily avoid the issue, because <assert.h>
facilities are not used at all by "vmv-imm-template.h", which includes
the header.  Remove the inclusion then, turning these issues:

FAIL: gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv32.c -O3 -ftree-vectorize (test for excess errors)
UNRESOLVED: gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv32.c -O3 -ftree-vectorize  scan-assembler-times vmv.v.i 32
UNRESOLVED: gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv32.c -O3 -ftree-vectorize  scan-assembler-times vmv.v.x 8
FAIL: gcc.target/riscv/rvv/autovec/vmv-imm-rv32.c -O3 -ftree-vectorize (test for excess errors)
UNRESOLVED: gcc.target/riscv/rvv/autovec/vmv-imm-rv32.c -O3 -ftree-vectorize  scan-assembler-times vmv.v.i 32
UNRESOLVED: gcc.target/riscv/rvv/autovec/vmv-imm-rv32.c -O3 -ftree-vectorize  scan-assembler-times vmv.v.x 8

into successful results:

PASS: gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv32.c -O3 -ftree-vectorize (test for excess errors)
PASS: gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv32.c -O3 -ftree-vectorize  scan-assembler-times vmv.v.i 32
PASS: gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv32.c -O3 -ftree-vectorize  scan-assembler-times vmv.v.x 8
PASS: gcc.target/riscv/rvv/autovec/vmv-imm-rv32.c -O3 -ftree-vectorize (test for excess errors)
PASS: gcc.target/riscv/rvv/autovec/vmv-imm-rv32.c -O3 -ftree-vectorize  scan-assembler-times vmv.v.i 32
PASS: gcc.target/riscv/rvv/autovec/vmv-imm-rv32.c -O3 -ftree-vectorize  scan-assembler-times vmv.v.x 8

in a plain LP64 `riscv64-linux-gnu' configuration.

gcc/testsuite/
* gcc.target/riscv/rvv/autovec/vmv-imm-template.h: Remove
<assert.h> inclusion.

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