Jakub Jelinek [Tue, 31 Jan 2023 09:12:19 +0000 (10:12 +0100)]
i386: Fix up ix86_convert_const_wide_int_to_broadcast [PR108599]
The following testcase is miscompiled. The problem is that during
RTL DSE we see a V4DI register is being loaded { 16, 16, 0, 0 }
value and DSE mostly works in terms of scalar modes, so it calls
movoi to set an OImode REG to (const_wide_int 0x100000000000000010)
and ix86_convert_const_wide_int_to_broadcast thinks it can compute
that value by broadcasting DImode 0x10. While it is true that
for TImode result the broadcast could be used, for OImode/XImode
it can't be, because all but the lowest 2 HOST_WIDE_INTs aren't
present (so are 0 or -1 depending on sign), not 0x10 in this case.
The function checks if the least significant HOST_WIDE_INT elt
of the CONST_WIDE_INT is broadcastable from QI/HI/SI/DImode and then
/* Check if OP can be broadcasted from VAL. */
for (int i = 1; i < CONST_WIDE_INT_NUNITS (op); i++)
if (val != CONST_WIDE_INT_ELT (op, i))
return nullptr;
That is needed of course, but nothing checks that
CONST_WIDE_INT_NUNITS (op) isn't too small for the mode in question.
I think if op would be 0 or -1, it ought to be never CONST_WIDE_INT,
but CONST_INT and so we can just punt whenever the number of
CONST_WIDE_INT elts is not the expected one.
2023-01-31 Jakub Jelinek <jakub@redhat.com>
PR target/108599
* config/i386/i386-expand.cc
(ix86_convert_const_wide_int_to_broadcast): Return nullptr if
CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
equal to bitsize of mode.
Xianmiao Qu [Tue, 31 Jan 2023 08:49:06 +0000 (09:49 +0100)]
testsuite/108604 - gcc.dg/torture/pr108574-3.c hangs on unsigned char archs
In the architecture where sign defaults to unsigned, the 'f' will be zero
extended to int type in the expression 'd = ~(f & ~2880764155)', then the
'd' will become -1 wich cause the case to fail.
So it's ok for the architectures where sign defaults to signed like x86,
but failed for the architectures where sign defaults to unsigned like arm
and csky. Change char to signed char to avoid this problem.
PR testsuite/108604
gcc/testsuite:
* gcc.dg/torture/pr108574-3.c (b, f): Change type from char to
signed char.
Jakub Jelinek [Tue, 31 Jan 2023 08:46:35 +0000 (09:46 +0100)]
bbpart: Fix up ICE on asm goto [PR108596]
On the following testcase we have asm goto in hot block with 2 successors,
one cold to which it both falls through and has one of the label
pointing to it and another hot successor with another label.
Now, during bbpart we want to ensure that no blocks from one partition fall
through into a block in a different partition. fix_up_fall_thru_edges
does that by temporarily clearing the EDGE_CROSSING on the fallthrough edge,
calling force_nonfallthru and then depending on whether it created a new
bb either set EDGE_CROSSING on the single successor edge from the new bb
(the new bb is kept in the same partition as the predecessor block), or
if no new bb has been created setting EDGE_CROSSING back on the fallthru
edge which has been forced non-EDGE_FALLTHRU.
For asm goto this doesn't always work, force_nonfallthru can create a new bb
and change the fallthrough edge to point to that, but if the original
fallthru destination block has its label referenced among the asm goto
labels, it will create a new non-fallthru edge for the label(s).
But because we've temporarily cheated and cleared EDGE_CROSSING on the edge,
it is cleared on the new edge as well, then the caller sees we've created
a new bb and just sets EDGE_CROSSING on the single fallthru edge from the
new bb. But the direct edge from cur_bb to fallthru edge's destination
isn't handled and fails afterwards consistency checks, because it crosses
partitions.
The following patch notes the case and sets EDGE_CROSSING on that edge too.
2023-01-31 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/108596
* bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
ends with asm goto and has a crossing fallthrough edge to the same bb
that contains at least one of its labels by restoring EDGE_CROSSING
flag even on possible edge from cur_bb to new_bb successor.
Jakub Jelinek [Tue, 31 Jan 2023 08:20:34 +0000 (09:20 +0100)]
i386: Fix up -Wuninitialized warnings in avx512erintrin.h [PR105593]
As reported in the PR, there are some -Wuninitialized warnings in
avx512erintrin.h. One can see that by compiling sse-23.c testcase with
-Wuninitialized (or when actually using those intrinsics).
Those 6 spots use an uninitialized variable and pass it as one of the
argument to a builtin with constant mask -1, because there is no unmasked
builtin. It is true that expansion of those builtins into RTL will see
mask is all ones and ignore the unneeded argument, but -Wuninitialized
is diagnosed on GIMPLE and on GIMPLE these builtins are just builtin calls.
avx512fintrin.h and other headers use in these cases the _mm*_undefined_* ()
intrinsics, like:
return (__m512i) __builtin_ia32_psrav8di_mask ((__v8di) __X,
(__v8di) __Y,
(__v8di)
_mm512_undefined_epi32 (),
(__mmask8) -1);
etc. and the following patch does the same for avx512erintrin.h.
With the recent changes in C++ FE and the _mm*_undefined_* intrinsics,
we don't emit -Wuninitialized warnings for those (previously we didn't
just in C due to self-initialization). Of course we could also
just self-initialize these uninitialized vars and add the #pragma GCC
diagnostic dances around it, but using the intrinsics is consistent with
the rest and IMHO cleaner.
2023-01-31 Jakub Jelinek <jakub@redhat.com>
PR c++/105593
* config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
_mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
_mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
_mm512_undefined_pd () or _mm512_undefined_ps () instead of using
uninitialized automatic variable __W.
* gcc.target/i386/sse-23.c: Add -Wuninitialized to dg-options.
Kito Cheng [Tue, 31 Jan 2023 03:48:51 +0000 (11:48 +0800)]
RISC-V: Simplify testcase condition for RVV tests [NFC]
We got some trouble on some platform, it show get twice for the asm, but
it only show once, seems like our pattern might be too complicated, so
simplify that make every platform happey with those testcase.
YunQiang Su [Fri, 6 Jan 2023 10:28:22 +0000 (18:28 +0800)]
libsanitizer/mips: always build with largefile support
-D_LARGEFILE_SOURCE -D_FILE_OFFSET_BITS=64 is always used for mips
when build libsanitizer in LLVM. Thus
FIRST_32_SECOND_64((_MIPS_SIM == _ABIN32) ? 176 : 160, 216);
instead of
FIRST_32_SECOND_64((_MIPS_SIM == _ABIN32) ? 160 : 144, 216);
in sanitizer_platform_limits_posix.h.
To keep sync with LLVM and to make the code simple, we use the
largefile options always.
libsanitizer/
* configure.ac: set -D_LARGEFILE_SOURCE -D_FILE_OFFSET_BITS=64
always for mips*.
* configure: Regenerate.
Gerald Pfeifer [Mon, 30 Jan 2023 22:12:23 +0000 (23:12 +0100)]
libstdc++: Update links in the Memory section of the manual
libstdc++-v3/ChangeLog:
* doc/xml/manual/shared_ptr.xml: Move links from both
http://open-std.org and http://www.open-std.org to
https://www.open-std.org.
* doc/html/manual/memory.html: Regenerate.
Ju-Zhe Zhong [Sun, 29 Jan 2023 23:40:50 +0000 (07:40 +0800)]
RISC-V: Add vloxei64 C++ API intrinsic testcase
gcc/testsuite/ChangeLog:
* g++.target/riscv/rvv/base/vloxei64-1.C: New test.
* g++.target/riscv/rvv/base/vloxei64-2.C: New test.
* g++.target/riscv/rvv/base/vloxei64-3.C: New test.
* g++.target/riscv/rvv/base/vloxei64_mu-1.C: New test.
* g++.target/riscv/rvv/base/vloxei64_mu-2.C: New test.
* g++.target/riscv/rvv/base/vloxei64_mu-3.C: New test.
* g++.target/riscv/rvv/base/vloxei64_tu-1.C: New test.
* g++.target/riscv/rvv/base/vloxei64_tu-2.C: New test.
* g++.target/riscv/rvv/base/vloxei64_tu-3.C: New test.
* g++.target/riscv/rvv/base/vloxei64_tum-1.C: New test.
* g++.target/riscv/rvv/base/vloxei64_tum-2.C: New test.
* g++.target/riscv/rvv/base/vloxei64_tum-3.C: New test.
* g++.target/riscv/rvv/base/vloxei64_tumu-1.C: New test.
* g++.target/riscv/rvv/base/vloxei64_tumu-2.C: New test.
* g++.target/riscv/rvv/base/vloxei64_tumu-3.C: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 23:39:29 +0000 (07:39 +0800)]
RISC-V: Add vloxei32 C++ API intrinsic testcases
gcc/testsuite/ChangeLog:
* g++.target/riscv/rvv/base/vloxei32-1.C: New test.
* g++.target/riscv/rvv/base/vloxei32-2.C: New test.
* g++.target/riscv/rvv/base/vloxei32-3.C: New test.
* g++.target/riscv/rvv/base/vloxei32_mu-1.C: New test.
* g++.target/riscv/rvv/base/vloxei32_mu-2.C: New test.
* g++.target/riscv/rvv/base/vloxei32_mu-3.C: New test.
* g++.target/riscv/rvv/base/vloxei32_tu-1.C: New test.
* g++.target/riscv/rvv/base/vloxei32_tu-2.C: New test.
* g++.target/riscv/rvv/base/vloxei32_tu-3.C: New test.
* g++.target/riscv/rvv/base/vloxei32_tum-1.C: New test.
* g++.target/riscv/rvv/base/vloxei32_tum-2.C: New test.
* g++.target/riscv/rvv/base/vloxei32_tum-3.C: New test.
* g++.target/riscv/rvv/base/vloxei32_tumu-1.C: New test.
* g++.target/riscv/rvv/base/vloxei32_tumu-2.C: New test.
* g++.target/riscv/rvv/base/vloxei32_tumu-3.C: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 23:37:39 +0000 (07:37 +0800)]
RISC-V: Add vloxei16 C++ API intrinsic testcases
gcc/testsuite/ChangeLog:
* g++.target/riscv/rvv/base/vloxei16-1.C: New test.
* g++.target/riscv/rvv/base/vloxei16-2.C: New test.
* g++.target/riscv/rvv/base/vloxei16-3.C: New test.
* g++.target/riscv/rvv/base/vloxei16_mu-1.C: New test.
* g++.target/riscv/rvv/base/vloxei16_mu-2.C: New test.
* g++.target/riscv/rvv/base/vloxei16_mu-3.C: New test.
* g++.target/riscv/rvv/base/vloxei16_tu-1.C: New test.
* g++.target/riscv/rvv/base/vloxei16_tu-2.C: New test.
* g++.target/riscv/rvv/base/vloxei16_tu-3.C: New test.
* g++.target/riscv/rvv/base/vloxei16_tum-1.C: New test.
* g++.target/riscv/rvv/base/vloxei16_tum-2.C: New test.
* g++.target/riscv/rvv/base/vloxei16_tum-3.C: New test.
* g++.target/riscv/rvv/base/vloxei16_tumu-1.C: New test.
* g++.target/riscv/rvv/base/vloxei16_tumu-2.C: New test.
* g++.target/riscv/rvv/base/vloxei16_tumu-3.C: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 23:35:38 +0000 (07:35 +0800)]
RISC-V: Add vloxei8 C++ API intrinsic testcase
gcc/testsuite/ChangeLog:
* g++.target/riscv/rvv/base/vloxei8-1.C: New test.
* g++.target/riscv/rvv/base/vloxei8-2.C: New test.
* g++.target/riscv/rvv/base/vloxei8-3.C: New test.
* g++.target/riscv/rvv/base/vloxei8_mu-1.C: New test.
* g++.target/riscv/rvv/base/vloxei8_mu-2.C: New test.
* g++.target/riscv/rvv/base/vloxei8_mu-3.C: New test.
* g++.target/riscv/rvv/base/vloxei8_tu-1.C: New test.
* g++.target/riscv/rvv/base/vloxei8_tu-2.C: New test.
* g++.target/riscv/rvv/base/vloxei8_tu-3.C: New test.
* g++.target/riscv/rvv/base/vloxei8_tum-1.C: New test.
* g++.target/riscv/rvv/base/vloxei8_tum-2.C: New test.
* g++.target/riscv/rvv/base/vloxei8_tum-3.C: New test.
* g++.target/riscv/rvv/base/vloxei8_tumu-1.C: New test.
* g++.target/riscv/rvv/base/vloxei8_tumu-2.C: New test.
* g++.target/riscv/rvv/base/vloxei8_tumu-3.C: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 23:33:49 +0000 (07:33 +0800)]
RISC-V: Add vluxei64 C++ API intrinsic testcases
gcc/testsuite/ChangeLog:
* g++.target/riscv/rvv/base/vluxei64-1.C: New test.
* g++.target/riscv/rvv/base/vluxei64-2.C: New test.
* g++.target/riscv/rvv/base/vluxei64-3.C: New test.
* g++.target/riscv/rvv/base/vluxei64_mu-1.C: New test.
* g++.target/riscv/rvv/base/vluxei64_mu-2.C: New test.
* g++.target/riscv/rvv/base/vluxei64_mu-3.C: New test.
* g++.target/riscv/rvv/base/vluxei64_tu-1.C: New test.
* g++.target/riscv/rvv/base/vluxei64_tu-2.C: New test.
* g++.target/riscv/rvv/base/vluxei64_tu-3.C: New test.
* g++.target/riscv/rvv/base/vluxei64_tum-1.C: New test.
* g++.target/riscv/rvv/base/vluxei64_tum-2.C: New test.
* g++.target/riscv/rvv/base/vluxei64_tum-3.C: New test.
* g++.target/riscv/rvv/base/vluxei64_tumu-1.C: New test.
* g++.target/riscv/rvv/base/vluxei64_tumu-2.C: New test.
* g++.target/riscv/rvv/base/vluxei64_tumu-3.C: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 23:32:09 +0000 (07:32 +0800)]
RISC-V: Add vluxei32 C++ intrinsic API testcase
gcc/testsuite/ChangeLog:
* g++.target/riscv/rvv/base/vluxei32-1.C: New test.
* g++.target/riscv/rvv/base/vluxei32-2.C: New test.
* g++.target/riscv/rvv/base/vluxei32-3.C: New test.
* g++.target/riscv/rvv/base/vluxei32_mu-1.C: New test.
* g++.target/riscv/rvv/base/vluxei32_mu-2.C: New test.
* g++.target/riscv/rvv/base/vluxei32_mu-3.C: New test.
* g++.target/riscv/rvv/base/vluxei32_tu-1.C: New test.
* g++.target/riscv/rvv/base/vluxei32_tu-2.C: New test.
* g++.target/riscv/rvv/base/vluxei32_tu-3.C: New test.
* g++.target/riscv/rvv/base/vluxei32_tum-1.C: New test.
* g++.target/riscv/rvv/base/vluxei32_tum-2.C: New test.
* g++.target/riscv/rvv/base/vluxei32_tum-3.C: New test.
* g++.target/riscv/rvv/base/vluxei32_tumu-1.C: New test.
* g++.target/riscv/rvv/base/vluxei32_tumu-2.C: New test.
* g++.target/riscv/rvv/base/vluxei32_tumu-3.C: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 23:28:33 +0000 (07:28 +0800)]
RISC-V: Add vluxei16 C++ API intrinsic testcases
gcc/testsuite/ChangeLog:
* g++.target/riscv/rvv/base/vluxei16-1.C: New test.
* g++.target/riscv/rvv/base/vluxei16-2.C: New test.
* g++.target/riscv/rvv/base/vluxei16-3.C: New test.
* g++.target/riscv/rvv/base/vluxei16_mu-1.C: New test.
* g++.target/riscv/rvv/base/vluxei16_mu-2.C: New test.
* g++.target/riscv/rvv/base/vluxei16_mu-3.C: New test.
* g++.target/riscv/rvv/base/vluxei16_tu-1.C: New test.
* g++.target/riscv/rvv/base/vluxei16_tu-2.C: New test.
* g++.target/riscv/rvv/base/vluxei16_tu-3.C: New test.
* g++.target/riscv/rvv/base/vluxei16_tum-1.C: New test.
* g++.target/riscv/rvv/base/vluxei16_tum-2.C: New test.
* g++.target/riscv/rvv/base/vluxei16_tum-3.C: New test.
* g++.target/riscv/rvv/base/vluxei16_tumu-1.C: New test.
* g++.target/riscv/rvv/base/vluxei16_tumu-2.C: New test.
* g++.target/riscv/rvv/base/vluxei16_tumu-3.C: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 23:26:25 +0000 (07:26 +0800)]
RISC-V: Add vluxei8 C++ API intrinsic testcase
gcc/testsuite/ChangeLog:
* g++.target/riscv/rvv/base/vluxei8-1.C: New test.
* g++.target/riscv/rvv/base/vluxei8-2.C: New test.
* g++.target/riscv/rvv/base/vluxei8-3.C: New test.
* g++.target/riscv/rvv/base/vluxei8_mu-1.C: New test.
* g++.target/riscv/rvv/base/vluxei8_mu-2.C: New test.
* g++.target/riscv/rvv/base/vluxei8_mu-3.C: New test.
* g++.target/riscv/rvv/base/vluxei8_tu-1.C: New test.
* g++.target/riscv/rvv/base/vluxei8_tu-2.C: New test.
* g++.target/riscv/rvv/base/vluxei8_tu-3.C: New test.
* g++.target/riscv/rvv/base/vluxei8_tum-1.C: New test.
* g++.target/riscv/rvv/base/vluxei8_tum-2.C: New test.
* g++.target/riscv/rvv/base/vluxei8_tum-3.C: New test.
* g++.target/riscv/rvv/base/vluxei8_tumu-1.C: New test.
* g++.target/riscv/rvv/base/vluxei8_tumu-2.C: New test.
* g++.target/riscv/rvv/base/vluxei8_tumu-3.C: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 23:24:01 +0000 (07:24 +0800)]
RISC-V: Add vsuxei* C++ API intrinsics testcases
gcc/testsuite/ChangeLog:
* g++.target/riscv/rvv/base/vsuxei16-1.C: New test.
* g++.target/riscv/rvv/base/vsuxei16-2.C: New test.
* g++.target/riscv/rvv/base/vsuxei16-3.C: New test.
* g++.target/riscv/rvv/base/vsuxei32-1.C: New test.
* g++.target/riscv/rvv/base/vsuxei32-2.C: New test.
* g++.target/riscv/rvv/base/vsuxei32-3.C: New test.
* g++.target/riscv/rvv/base/vsuxei64-1.C: New test.
* g++.target/riscv/rvv/base/vsuxei64-2.C: New test.
* g++.target/riscv/rvv/base/vsuxei64-3.C: New test.
* g++.target/riscv/rvv/base/vsuxei8-1.C: New test.
* g++.target/riscv/rvv/base/vsuxei8-2.C: New test.
* g++.target/riscv/rvv/base/vsuxei8-3.C: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 23:18:34 +0000 (07:18 +0800)]
RISC-V: Add vsuxei C API intrinsic testcase
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vsuxei16_v-1.c: New test.
* gcc.target/riscv/rvv/base/vsuxei16_v-2.c: New test.
* gcc.target/riscv/rvv/base/vsuxei16_v-3.c: New test.
* gcc.target/riscv/rvv/base/vsuxei16_v_m-1.c: New test.
* gcc.target/riscv/rvv/base/vsuxei16_v_m-2.c: New test.
* gcc.target/riscv/rvv/base/vsuxei16_v_m-3.c: New test.
* gcc.target/riscv/rvv/base/vsuxei32_v-1.c: New test.
* gcc.target/riscv/rvv/base/vsuxei32_v-2.c: New test.
* gcc.target/riscv/rvv/base/vsuxei32_v-3.c: New test.
* gcc.target/riscv/rvv/base/vsuxei32_v_m-1.c: New test.
* gcc.target/riscv/rvv/base/vsuxei32_v_m-2.c: New test.
* gcc.target/riscv/rvv/base/vsuxei32_v_m-3.c: New test.
* gcc.target/riscv/rvv/base/vsuxei64_v-1.c: New test.
* gcc.target/riscv/rvv/base/vsuxei64_v-2.c: New test.
* gcc.target/riscv/rvv/base/vsuxei64_v-3.c: New test.
* gcc.target/riscv/rvv/base/vsuxei64_v_m-1.c: New test.
* gcc.target/riscv/rvv/base/vsuxei64_v_m-2.c: New test.
* gcc.target/riscv/rvv/base/vsuxei64_v_m-3.c: New test.
* gcc.target/riscv/rvv/base/vsuxei8_v-1.c: New test.
* gcc.target/riscv/rvv/base/vsuxei8_v-2.c: New test.
* gcc.target/riscv/rvv/base/vsuxei8_v-3.c: New test.
* gcc.target/riscv/rvv/base/vsuxei8_v_m-1.c: New test.
* gcc.target/riscv/rvv/base/vsuxei8_v_m-2.c: New test.
* gcc.target/riscv/rvv/base/vsuxei8_v_m-3.c: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 23:16:58 +0000 (07:16 +0800)]
RISC-V: Add vsoxei C API intrinsic testcase
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vsoxei16_v-1.c: New test.
* gcc.target/riscv/rvv/base/vsoxei16_v-2.c: New test.
* gcc.target/riscv/rvv/base/vsoxei16_v-3.c: New test.
* gcc.target/riscv/rvv/base/vsoxei16_v_m-1.c: New test.
* gcc.target/riscv/rvv/base/vsoxei16_v_m-2.c: New test.
* gcc.target/riscv/rvv/base/vsoxei16_v_m-3.c: New test.
* gcc.target/riscv/rvv/base/vsoxei32_v-1.c: New test.
* gcc.target/riscv/rvv/base/vsoxei32_v-2.c: New test.
* gcc.target/riscv/rvv/base/vsoxei32_v-3.c: New test.
* gcc.target/riscv/rvv/base/vsoxei32_v_m-1.c: New test.
* gcc.target/riscv/rvv/base/vsoxei32_v_m-2.c: New test.
* gcc.target/riscv/rvv/base/vsoxei32_v_m-3.c: New test.
* gcc.target/riscv/rvv/base/vsoxei64_v-1.c: New test.
* gcc.target/riscv/rvv/base/vsoxei64_v-2.c: New test.
* gcc.target/riscv/rvv/base/vsoxei64_v-3.c: New test.
* gcc.target/riscv/rvv/base/vsoxei64_v_m-1.c: New test.
* gcc.target/riscv/rvv/base/vsoxei64_v_m-2.c: New test.
* gcc.target/riscv/rvv/base/vsoxei64_v_m-3.c: New test.
* gcc.target/riscv/rvv/base/vsoxei8_v-1.c: New test.
* gcc.target/riscv/rvv/base/vsoxei8_v-2.c: New test.
* gcc.target/riscv/rvv/base/vsoxei8_v-3.c: New test.
* gcc.target/riscv/rvv/base/vsoxei8_v_m-1.c: New test.
* gcc.target/riscv/rvv/base/vsoxei8_v_m-2.c: New test.
* gcc.target/riscv/rvv/base/vsoxei8_v_m-3.c: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 23:14:44 +0000 (07:14 +0800)]
RISC-V: Add vsoxei32 && vsoxei64 C++ API intrinsic testcase
gcc/testsuite/ChangeLog:
* g++.target/riscv/rvv/base/vsoxei32-1.C: New test.
* g++.target/riscv/rvv/base/vsoxei32-2.C: New test.
* g++.target/riscv/rvv/base/vsoxei32-3.C: New test.
* g++.target/riscv/rvv/base/vsoxei64-1.C: New test.
* g++.target/riscv/rvv/base/vsoxei64-2.C: New test.
* g++.target/riscv/rvv/base/vsoxei64-3.C: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 23:11:40 +0000 (07:11 +0800)]
RISC-V: Add vsoxei8 && vsoxei16 C++ API intrinsic testcase
gcc/testsuite/ChangeLog:
* g++.target/riscv/rvv/base/vsoxei16-1.C: New test.
* g++.target/riscv/rvv/base/vsoxei16-2.C: New test.
* g++.target/riscv/rvv/base/vsoxei16-3.C: New test.
* g++.target/riscv/rvv/base/vsoxei8-1.C: New test.
* g++.target/riscv/rvv/base/vsoxei8-2.C: New test.
* g++.target/riscv/rvv/base/vsoxei8-3.C: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 23:08:30 +0000 (07:08 +0800)]
RISC-V: Add vluxei64 C API intrinsic testcases
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vluxei64_v-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_m-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_m-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_m-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_mu-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_mu-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_mu-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_tu-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_tu-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_tu-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_tum-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_tum-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_tum-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_tumu-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_tumu-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_tumu-3.c: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 23:06:32 +0000 (07:06 +0800)]
RISC-V: Add vluxei32 C API intrinsic testcases
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vluxei32_v-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei32_v-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei32_v-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei32_v_m-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei32_v_m-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei32_v_m-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei32_v_mu-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei32_v_mu-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei32_v_mu-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei32_v_tu-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei32_v_tu-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei32_v_tu-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei32_v_tum-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei32_v_tum-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei32_v_tum-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei32_v_tumu-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei32_v_tumu-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei32_v_tumu-3.c: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 22:56:39 +0000 (06:56 +0800)]
RISC-V: Add vluxei16 C API intrinsic testcases
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vluxei16_v-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei16_v-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei16_v-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei16_v_m-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei16_v_m-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei16_v_m-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei16_v_mu-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei16_v_mu-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei16_v_mu-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei16_v_tu-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei16_v_tu-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei16_v_tu-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei16_v_tum-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei16_v_tum-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei16_v_tum-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei16_v_tumu-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei16_v_tumu-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei16_v_tumu-3.c: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 15:52:35 +0000 (23:52 +0800)]
RISC-V: Add vluxei8 C API intrinsic testcases
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vluxei8_v-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei8_v-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei8_v-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei8_v_m-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei8_v_m-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei8_v_m-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei8_v_mu-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei8_v_mu-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei8_v_mu-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei8_v_tu-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei8_v_tu-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei8_v_tu-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei8_v_tum-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei8_v_tum-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei8_v_tum-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei8_v_tumu-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei8_v_tumu-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei8_v_tumu-3.c: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 15:50:34 +0000 (23:50 +0800)]
RISC-V: Add vloxei64 C API intrinsic testcases
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vloxei64_v-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei64_v-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei64_v-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei64_v_m-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei64_v_m-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei64_v_m-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei64_v_mu-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei64_v_mu-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei64_v_mu-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei64_v_tu-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei64_v_tu-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei64_v_tu-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei64_v_tum-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei64_v_tum-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei64_v_tum-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei64_v_tumu-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei64_v_tumu-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei64_v_tumu-3.c: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 15:48:46 +0000 (23:48 +0800)]
RISC-V: Add vloxei32 C API intrinsic testcases
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vloxei32_v-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei32_v-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei32_v-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei32_v_m-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei32_v_m-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei32_v_m-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei32_v_mu-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei32_v_mu-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei32_v_mu-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei32_v_tu-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei32_v_tu-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei32_v_tu-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei32_v_tum-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei32_v_tum-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei32_v_tum-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei32_v_tumu-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei32_v_tumu-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei32_v_tumu-3.c: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 15:46:54 +0000 (23:46 +0800)]
RISC-V: Add vloxei16 C API intrinsic testcases
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vloxei16_v-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei16_v-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei16_v-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei16_v_m-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei16_v_m-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei16_v_m-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei16_v_mu-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei16_v_mu-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei16_v_mu-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei16_v_tu-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei16_v_tu-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei16_v_tu-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei16_v_tum-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei16_v_tum-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei16_v_tum-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei16_v_tumu-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei16_v_tumu-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei16_v_tumu-3.c: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 15:44:24 +0000 (23:44 +0800)]
RISC-V: Add vloxei8 C API intrinsic testcases
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vloxei8_v-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei8_v-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei8_v-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei8_v_m-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei8_v_m-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei8_v_m-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei8_v_mu-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei8_v_mu-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei8_v_mu-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei8_v_tu-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei8_v_tu-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei8_v_tu-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei8_v_tum-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei8_v_tum-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei8_v_tum-3.c: New test.
* gcc.target/riscv/rvv/base/vloxei8_v_tumu-1.c: New test.
* gcc.target/riscv/rvv/base/vloxei8_v_tumu-2.c: New test.
* gcc.target/riscv/rvv/base/vloxei8_v_tumu-3.c: New test.
Ju-Zhe Zhong [Sun, 29 Jan 2023 15:34:57 +0000 (23:34 +0800)]
RISC-V: Add VSETVL testcases for indexed loads/stores.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/vsetvl/avl_single-72.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-76.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-77.c: New test.
Flavio Cruz [Fri, 27 Jan 2023 03:45:27 +0000 (22:45 -0500)]
Add support for x86_64-*-gnu-* targets to build x86_64 gnumach/hurd
Tested by building a toolchain and compiling gnumach for x86_64 [1].
This is the basic version without unwind support which I think is only
required to implement exceptions.
gcc/ChangeLog:
* config.gcc: Recognize x86_64-*-gnu* targets and include
i386/gnu64.h.
* config/i386/gnu64.h: Define configuration for new target
including ld.so location.
libgcc/ChangeLog:
* config.host: Recognize x86_64-*-gnu* targets.
* config/i386/gnu-unwind.h: Update to handle __x86_64__ with a
TODO for now.
Andrew Pinski [Sat, 28 Jan 2023 18:27:08 +0000 (18:27 +0000)]
Fix PR 108582: ICE due to PHI-OPT removing a still in use ssa_name.
This patch adds a check in match_simplify_replacement to make sure the middlebb
does not have any phi-nodes as we don't currently move those.
This was just a thinko from before.
Ok? Bootstrapped and tested on x86_64-linux-gnu with no regressions?
PR tree-optimization/108582
gcc/ChangeLog:
* tree-ssa-phiopt.cc (match_simplify_replacement): Add check
for middlebb to have no phi nodes.
Richard Biener [Mon, 30 Jan 2023 08:25:23 +0000 (09:25 +0100)]
tree-optimization/108574 - wrong-code with PRE PHI node processing
The PR108523 was too optimistic in replacing the same value with
an equivalence from a possibly not taken edge. The following
rectifies this and instead refrains from using the equivalence in
the problematic cases.
PR tree-optimization/108574
* tree-ssa-sccvn.cc (visit_phi): Instead of swapping
sameval and def, ignore the equivalence if there's the
danger of oscillating between two values.
* gcc.dg/torture/pr108574-1.c: New testcase.
* gcc.dg/torture/pr108574-2.c: Likewise.
* gcc.dg/torture/pr108574-3.c: Likewise.
YunQiang Su [Fri, 6 Jan 2023 10:15:28 +0000 (18:15 +0800)]
Set CROSS_SYSTEM_HEADER_DIR according includedir
For cross building with option:
--sysroot=/ --prefix=/usr --includedir=/usr/<triple>
just like Debian does, fixinc.sh will use the wrong header files
from /usr/include.
gcc/
* Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
value of includedir.
Richard Biener [Mon, 30 Jan 2023 07:20:03 +0000 (08:20 +0100)]
ipa/108511 - relax assert for undefined local statics
Since we no longer promote undefined local statics extern the
assert in possibly_call_in_translation_unit_p triggers. The
following relaxes it according to Honzas advice.
Mikael Morin [Sun, 29 Jan 2023 20:57:24 +0000 (21:57 +0100)]
fortran: Set name for *LOC default BACK argument [PR108450]
This change fixes an ICE caused by the double resolution of MINLOC,
MAXLOC and FINDLOC expressions which get a default value for the BACK
argument at resolution time. That argument is added without name,
and argument reordering code is not prepared to handle unnamed arguments
coming after named ones, so the second resolution causes a NULL pointer
dereference.
The problem is fixed by explicitly setting the argument name.
PR fortran/108450
gcc/fortran/ChangeLog:
* check.cc (gfc_check_minloc_maxloc): Explicitly set argument name.
(gfc_check_findloc): Ditto.
Jan Hubicka [Sun, 29 Jan 2023 00:27:26 +0000 (01:27 +0100)]
Fix find_always_executed_bbs handling of infinite loops
This patch fixes the stupid typo info find_always_executed_bbs which made
all edges to be considered as ones closing infinite loops. This fix has
somewhat snowballed as, comparing it to finite_function_p, I noticed a
divergence in handling of volatile asms (find_always_executed_bbs is conservative
and thinks that volatile statement may return or do EH, but it is really
impossible and elsewhere we expects that we dont) and I also noticed
a bug in handling early returns which made some loops to be missed.
I also noticed that function assumes that irreducible loops are marked in CFG
which is not necessarily true and it is easy to detect them during the walk.
Bootstrapped/regtested x86_64-linux, comitted.
gcc/ChangeLog:
2023-01-29 Jan Hubicka <hubicka@ucw.cz>
* ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
(stmt_may_terminate_function_p): If assuming return or EH
volatile asm is safe.
(find_always_executed_bbs): Fix handling of terminating BBS and
infinite loops; add debug output.
* tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
gcc/testsuite/ChangeLog:
2023-01-29 Jan Hubicka <hubicka@ucw.cz>
* gcc.dg/ipa/ipa-sra-30.c: New test.
* gcc.dg/ipa/ipa-sra-31.c: New test.
* gcc.dg/tree-ssa/modref-dse-7.c: New test.
Gerald Pfeifer [Sat, 28 Jan 2023 22:07:01 +0000 (23:07 +0100)]
libstdc++: Update links in the "Contributing" manual
libstdc++-v3/ChangeLog:
* doc/xml/manual/appendix_contributing.xml: Adjust link to
ISO C++ standard at ANSI.
Move link to www.open-std.org to https.
* doc/html/manual/appendix_contributing.html: Regenerate.
Harald Anlauf [Tue, 24 Jan 2023 21:36:25 +0000 (22:36 +0100)]
Fortran: fix ICE in compare_bound_int [PR108527]
gcc/fortran/ChangeLog:
PR fortran/108527
* resolve.cc (compare_bound_int): Expression to compare must be of
type INTEGER.
(compare_bound_mpz_t): Likewise.
(check_dimension): Fix comment on checks applied to array section
and clean up associated logic.
gcc/testsuite/ChangeLog:
PR fortran/108527
* gfortran.dg/pr108527.f90: New test.
Co-authored-by: Steven G. Kargl <kargl@gcc.gnu.org>
Jonathan Yong [Wed, 11 Jan 2023 09:51:02 +0000 (09:51 +0000)]
PR c/108192 - Fix test for mingw
gcc/testsuite/ChangeLog:
PR c/108192
* g++.dg/cet-notrack-1.C: Use puts instead of printf,
so function call is not mangled by __mingw_printf when
doing assembly symbol inspection.
Ju-Zhe Zhong [Fri, 27 Jan 2023 23:27:57 +0000 (07:27 +0800)]
RISC-V: Add vlse/vsse C/C++ intrinsic testcases
gcc/testsuite/ChangeLog:
* g++.target/riscv/rvv/base/vlse-1.C: New test.
* g++.target/riscv/rvv/base/vlse_tu-1.C: New test.
* g++.target/riscv/rvv/base/vlse_tum-1.C: New test.
* g++.target/riscv/rvv/base/vlse_tumu-1.C: New test.
* g++.target/riscv/rvv/base/vsse-1.C: New test.
* gcc.target/riscv/rvv/base/vlse-1.c: New test.
* gcc.target/riscv/rvv/base/vlse-2.c: New test.
* gcc.target/riscv/rvv/base/vlse-3.c: New test.
* gcc.target/riscv/rvv/base/vlse-vsse-constraint-1.c: New test.
* gcc.target/riscv/rvv/base/vlse_m-1.c: New test.
* gcc.target/riscv/rvv/base/vlse_m-2.c: New test.
* gcc.target/riscv/rvv/base/vlse_m-3.c: New test.
* gcc.target/riscv/rvv/base/vlse_mu-1.c: New test.
* gcc.target/riscv/rvv/base/vlse_mu-2.c: New test.
* gcc.target/riscv/rvv/base/vlse_mu-3.c: New test.
* gcc.target/riscv/rvv/base/vlse_tu-1.c: New test.
* gcc.target/riscv/rvv/base/vlse_tu-2.c: New test.
* gcc.target/riscv/rvv/base/vlse_tu-3.c: New test.
* gcc.target/riscv/rvv/base/vlse_tum-1.c: New test.
* gcc.target/riscv/rvv/base/vlse_tum-2.c: New test.
* gcc.target/riscv/rvv/base/vlse_tum-3.c: New test.
* gcc.target/riscv/rvv/base/vlse_tumu-1.c: New test.
* gcc.target/riscv/rvv/base/vlse_tumu-2.c: New test.
* gcc.target/riscv/rvv/base/vlse_tumu-3.c: New test.
* gcc.target/riscv/rvv/base/vsse-1.c: New test.
* gcc.target/riscv/rvv/base/vsse-2.c: New test.
* gcc.target/riscv/rvv/base/vsse-3.c: New test.
* gcc.target/riscv/rvv/base/vsse_m-1.c: New test.
* gcc.target/riscv/rvv/base/vsse_m-2.c: New test.
* gcc.target/riscv/rvv/base/vsse_m-3.c: New test.
Gaius Mulley [Fri, 27 Jan 2023 22:18:46 +0000 (22:18 +0000)]
PR-108557 Stuck compilation for empty file
Trying to compile an empty file causes cc1gm2 to hang.
The bug occurs when M2LexBuf.mod calls m2flex.GetToken after
an eof token has been seen which results in m2flex attempting
to read from stdin. The bug fix detects eof per file and
blocks subsequent calls to m2flex.GetToken.
gcc/m2/ChangeLog:
* gm2-compiler/M2Comp.mod: Import MetaString0.
(ExamineCompilationUnit): New variable Message.
Create and format error string.
* gm2-compiler/M2LexBuf.mod: New variable SeenEof.
(GetNonEofToken): New procedure.
(Init): Set SeenEof to FALSE.
(GetToken): Use GetNonEofToken instead of calls to
m2flex.GetToken and GetToken.
(AddTok): Detect eoftok and set SeenEof.
Joseph Myers [Fri, 27 Jan 2023 21:38:57 +0000 (21:38 +0000)]
c: Disallow braces around C2x auto initializers
WG14 agreed at this week's meeting to remove support for braces around
auto scalar initializers, as incompatible with C++ auto handling of
braced initializers; thus remove that support in GCC.
Bootstrapped with no regressions for x86_64-pc-linux-gnu.
gcc/c/
* c-parser.cc (c_parser_declaration_or_fndef): Do not allow braces
around auto initializer.
gcc/testsuite/
* gcc.dg/c2x-auto-1.c, gcc.dg/c2x-auto-3.c: Expect braces around
auto initializers to be disallowed.
Jakub Jelinek [Fri, 27 Jan 2023 19:11:20 +0000 (20:11 +0100)]
libstdc++: Fix up FAIL in 17_intro/names.cc on glibc < 2.19 [PR108568]
On gcc112 which has glibc 2.17 I've noticed
FAIL: 17_intro/names.cc (test for excess errors)
FAIL: experimental/names.cc (test for excess errors)
These are because glibc < 2.19 used __unused as field member of various structs,
including mcontext_t in sys/ucontext.h on ppc64le.
This was changed in glibc with
https://gcc.gnu.org/pipermail/libc-alpha/2013-November/045766.html
names.cc even has
#ifdef __GLIBC_PREREQ
#if ! __GLIBC_PREREQ(2, 19)
// Glibc defines this prior to 2.19
#undef __unused
#endif
#endif
for it, but it doesn't work. The reason is that __GLIBC_PREREQ is defined in
<features.h> but nothing included that header before this spot (it is included later
from bits/stdc++.h).
The following patch on Linux/Hurd conditionally includes features.h to get
the needed macros before deciding if __unused should be undefined or not.
If needed, I could use __GLIBC_PREREQ then but would need to check if it is
defined and between 1996 and 1999 it wasn't.
2023-01-27 Jakub Jelinek <jakub@redhat.com>
PR libstdc++/108568
* testsuite/17_intro/names.cc (__unused): For linux or GNU hurd
include features.h if present and then check __GLIBC__ and
__GLIBC_MINOR__ macros for glibc prior to 2.19, instead of testing
__GLIBC_PREREQ which isn't defined yet.
fast-math-bb-slp-complex-add-pattern-half-float.c no longer fails.
The scans in (loop test) fast-math-complex-add-half-float.c were
marked UNRESOLVED because they scanned slp1 rather than vect.
aarch64: Prevent simd tests from being optimised away
The vqdml[as]l[hs]_laneq_* tests were folded at compile time, meaning
that we didn't have any Advanced SIMD instructions in the assembly.
Kyrill's preference was to use wrapper functions, so this patch does
that for the failing tests and for others that had scan-assemblers
with inline intrinsics calls. (There were some tests that already
used wrapper functions, some that used volatile, some that used
inline asm barriers, and some that had no separation.)
Doing that for vqdmulhs_lane_s32.c meant that we generated the scalar
form of the instruction, rather than a vector instruction operating
on lane 0. That seems fair enough, so the patch keeps that test but
adds a second one for lane 1.
gcc/testsuite/
* gcc.target/aarch64/simd/vfma_f64.c: Use a wrapper function
rather than an asm barrier.
* gcc.target/aarch64/simd/vfms_f64.c: Likewise.
* gcc.target/aarch64/simd/vmul_f64_1.c: Use a wrapper function
rather than volatile.
* gcc.target/aarch64/simd/vmul_n_f64_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlalh_laneq_s16_1.c: Use a wrapper
function. Remove -fno-inline.
* gcc.target/aarch64/simd/vqdmlals_laneq_s32_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlslh_laneq_s16_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsls_laneq_s32_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulhh_lane_s16.c: Likewise.
* gcc.target/aarch64/simd/vqdmulhh_laneq_s16_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulhs_laneq_s32_1.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulhh_lane_s16.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulhh_laneq_s16_1.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulhs_lane_s32.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulhs_laneq_s32_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulhs_lane_s32.c: Likewise.
Allow the scalar form to be used when operating on lane 0.
Add a test for lane 1.
This patch is an optimisation, but it's also a prerequisite for
fixing PR96373 without regressing vect-xorsign_exec.c.
Currently the vectoriser vectorises:
for (i = 0; i < N; i++)
r[i] = a[i] * __builtin_copysignf (1.0f, b[i]);
as two unconditional operations (copysign and mult).
tree-ssa-math-opts.cc later combines them into an "xorsign" function.
This works for both Advanced SIMD and SVE.
However, with the fix for PR96373, the vectoriser will instead
generate a conditional multiplication (IFN_COND_MUL). Something then
needs to fold copysign & IFN_COND_MUL to the equivalent of a conditional
xorsign. Three obvious options were:
(1) Extend tree-ssa-math-opts.cc.
(2) Do the fold in match.pd.
(3) Leave it to rtl combine.
I'm against (3), because this isn't a target-specific optimisation.
(1) would be possible, but would involve open-coding a lot of what
match.pd does for us. And, in contrast to doing the current
tree-ssa-math-opts.cc optimisation in match.pd, there should be
no danger of (2) happening too early. If we have an IFN_COND_MUL
then we're already past the stage of simplifying the original
source code.
There was also a choice between adding a conditional xorsign ifn
and simply open-coding the xorsign. The latter seems simpler,
and means less boiler-plate for target-specific code.
The signed_or_unsigned_type_for change is needed to make sure
that we stay in "SVE space" when doing the optimisation on 128-bit
fixed-length SVE.
gcc/
PR tree-optimization/96373
* tree.h (sign_mask_for): Declare.
* tree.cc (sign_mask_for): New function.
(signed_or_unsigned_type_for): For vector types, try to use the
related_int_vector_mode.
* genmatch.cc (commutative_op): Handle conditional internal functions.
* match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
gcc/testsuite/
PR tree-optimization/96373
* gcc.target/aarch64/sve/cond_xorsign_1.c: New test.
* gcc.target/aarch64/sve/cond_xorsign_2.c: Likewise.
Quite a few gcc.target/aarch64/sve/cond*.c tests started failing
after g:68e0063397ba820e71adc220b2da0581dce29ffa, but it turns out
that we were cheating passes before the patch.
The tests involve comparing the cost of N wide compares, a pack
sequence, and a narrow COND_EXPR with the cost of a single COND_EXPR
on fewer elements. The costs for the former included all operations,
but the costs for the latter didn't model the comparison embedded in
the COND_EXPR. The patch made us include the comparison on both sides,
making it apples-for-apples, but that's enough to tip the balance in
favour of using the wider types.
I think the new choice does reflect the current SVE cost model
correctly. (Whether and how the model should be tweaked is a
different question.) This patch therefore changes the tuning
vector length to one that makes the choice more obvious.
That in turn needs a tweak to compare_inside_loop_cost.
The function compares body_cost1/vf1 with body_cost2/vf2,
but for fully-amsked loops, it limits vf to the actual number
of iterations. This is so that (say) an expensive 16-element
vector body doesn't win over a cheaper 8-element vector body
when there are only 7 elements to process.
However, the limit was applied using known_le, regardless of
the tuning target. For a heuristic like this, it seems better
to use the likely minimum (which is a concept that was only
added after this code went in).
gcc/
* tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
Use the likely minimum VF when bounding the denominators to
the estimated number of iterations.
Gaius Mulley [Fri, 27 Jan 2023 16:38:29 +0000 (16:38 +0000)]
Tidy up to declarations allowing files to be built by gm2
This patch adds missing declarations in export qualified lists
and fixes comparisons of an address type against NIL.
These changes allow make m2/stage2/cc1gm2 to succeed when in
maintainer mode.
gcc/m2/ChangeLog:
* gm2-compiler/M2Options.def: Export GetMQ, SetMQ.
* gm2-compiler/M2Preprocess.mod: (MakeSaveTempsFileName):
Test NewDir against NIL. Test Dumpdir against NIL.
Test GetMD () against NIL. Test GetMMD () against NIL.
Test GetMQ () against NIL. Test GetObj () against NIL.
Test tempfile against NIL.
* gm2-compiler/P2SymBuild.def: Export
BuildNoReturnAttribute.
Andrew MacLeod [Mon, 16 Jan 2023 20:02:51 +0000 (15:02 -0500)]
Correctly detect shifts out of range
get_shift_range was incorrectly communicating that it couldn't calculate
a range when the shift values was always out fo range. Fix this and
alwasy return [0, 0] when the shift value is always out of range.
PR tree-optimization/108306
gcc/
* range-op.cc (operator_lshift::fold_range): Return [0, 0] not
varying for shifts that are always out of void range.
(operator_rshift::fold_range): Return [0, 0] not
varying for shifts that are always out of void range.
Andrew MacLeod [Wed, 25 Jan 2023 16:13:23 +0000 (11:13 -0500)]
Do not try to logical fold floating point relations.
relation_fold_and_or looks for relations among common operands feeding
logical ands and ors. With no knowledge of NANs, it should not attempt
to do this with floating point ssa names.
PR tree-optimization/108447
gcc/
* gimple-range-fold.cc (old_using_range::relation_fold_and_or):
Do not attempt to fold HONOR_NAN types.
Ju-Zhe Zhong [Fri, 20 Jan 2023 02:24:34 +0000 (10:24 +0800)]
RISC-V: Add vle/vse C++ overloaded API intrinsic testcases
gcc/testsuite/ChangeLog:
* g++.target/riscv/rvv/base/vle-1.C: New test.
* g++.target/riscv/rvv/base/vle_tu-1.C: New test.
* g++.target/riscv/rvv/base/vle_tum-1.C: New test.
* g++.target/riscv/rvv/base/vle_tumu-1.C: New test.
* g++.target/riscv/rvv/base/vse-1.C: New test.
* g++.target/riscv/rvv/base/riscv_vector.h: New.
Ju-Zhe Zhong [Thu, 19 Jan 2023 14:31:08 +0000 (22:31 +0800)]
RISC-V: Add vse.v C API intrinsics testcases
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vse-1.c: New test.
* gcc.target/riscv/rvv/base/vse-2.c: New test.
* gcc.target/riscv/rvv/base/vse-3.c: New test.
* gcc.target/riscv/rvv/base/vse_m-1.c: New test.
* gcc.target/riscv/rvv/base/vse_m-2.c: New test.
* gcc.target/riscv/rvv/base/vse_m-3.c: New test.
Ju-Zhe Zhong [Thu, 19 Jan 2023 14:12:49 +0000 (22:12 +0800)]
RISC-V: Add vle.v C API intrinsics testcases
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vle-1.c: New test.
* gcc.target/riscv/rvv/base/vle-2.c: New test.
* gcc.target/riscv/rvv/base/vle-3.c: New test.
* gcc.target/riscv/rvv/base/vle_m-1.c: New test.
* gcc.target/riscv/rvv/base/vle_m-2.c: New test.
* gcc.target/riscv/rvv/base/vle_m-3.c: New test.
* gcc.target/riscv/rvv/base/vle_mu-1.c: New test.
* gcc.target/riscv/rvv/base/vle_mu-2.c: New test.
* gcc.target/riscv/rvv/base/vle_mu-3.c: New test.
* gcc.target/riscv/rvv/base/vle_tu-1.c: New test.
* gcc.target/riscv/rvv/base/vle_tu-2.c: New test.
* gcc.target/riscv/rvv/base/vle_tu-3.c: New test.
* gcc.target/riscv/rvv/base/vle_tum-1.c: New test.
* gcc.target/riscv/rvv/base/vle_tum-2.c: New test.
* gcc.target/riscv/rvv/base/vle_tum-3.c: New test.
* gcc.target/riscv/rvv/base/vle_tumu-1.c: New test.
* gcc.target/riscv/rvv/base/vle_tumu-2.c: New test.
* gcc.target/riscv/rvv/base/vle_tumu-3.c: New test.
* g++.target/riscv/rvv/base/vsm-1.C: New test.
* g++.target/riscv/rvv/rvv.exp: New test.
* gcc.target/riscv/rvv/base/vlm_vsm-1.c: New test.
* gcc.target/riscv/rvv/base/vlm_vsm-2.c: New test.
* gcc.target/riscv/rvv/base/vlm_vsm-3.c: New test.
Ju-Zhe Zhong [Wed, 18 Jan 2023 03:24:34 +0000 (11:24 +0800)]
RISC-V: Finalize VSETVL PASS implementation
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
(vsetvl_discard_result_insn_p): New function.
(reg_killed_by_bb_p): rename to find_reg_killed_by.
(find_reg_killed_by): New name.
(get_vl): allow it to be called by more functions.
(has_vsetvl_killed_avl_p): Add condition.
(get_avl): allow it to be called by more functions.
(insn_should_be_added_p): New function.
(get_all_nonphi_defs): Refine function.
(get_all_sets): Ditto.
(get_same_bb_set): New function.
(any_insn_in_bb_p): Ditto.
(any_set_in_bb_p): Ditto.
(get_vl_vtype_info): Add VLMAX forward optimization.
(source_equal_p): Fix issues.
(extract_single_source): Refine.
(avl_info::multiple_source_equal_p): New function.
(avl_info::operator==): Adjust for final version.
(vl_vtype_info::operator==): Ditto.
(vl_vtype_info::same_avl_p): Ditto.
(vector_insn_info::parse_insn): Ditto.
(vector_insn_info::available_p): New function.
(vector_insn_info::merge): Adjust for final version.
(vector_insn_info::dump): Add hard_empty.
(pass_vsetvl::hard_empty_block_p): New function.
(pass_vsetvl::backward_demand_fusion): Adjust for final version.
(pass_vsetvl::forward_demand_fusion): Ditto.
(pass_vsetvl::demand_fusion): Ditto.
(pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
(pass_vsetvl::compute_local_properties): Adjust for final version.
(pass_vsetvl::can_refine_vsetvl_p): Ditto.
(pass_vsetvl::refine_vsetvls): Ditto.
(pass_vsetvl::commit_vsetvls): Ditto.
(pass_vsetvl::propagate_avl): New function.
(pass_vsetvl::lazy_vsetvl): Adjust for new version.
* config/riscv/riscv-vsetvl.h (enum def_type): New enum.
Xi Ruoyao [Fri, 27 Jan 2023 11:03:05 +0000 (19:03 +0800)]
testsuite: Use noipa attribute for pr95115 test
This prevent the compiler from deeming the NaN result "unused" and
remove the calculation raising INVALID exception. See the discussion
in PR107608 for details.
Jakub Jelinek [Fri, 27 Jan 2023 10:17:35 +0000 (11:17 +0100)]
doc: Fix up return type of __builtin_va_arg_pack_len [PR108560]
__builtin_va_arg_pack_len as implemented returned int since its introduction
in 2007. The initial documentation didn't mention any return type,
which changed in 2010 in r0-103077-gab940b73bfabe2cec4 during some
documentation formatting cleanups
https://gcc.gnu.org/legacy-ml/gcc-patches/2010-09/msg01632.html
I can understand that for formatting some type was needed there
but what exactly hasn't been really discussed.
So, I think we should change documentation to match the implementation,
rather than change implementation to match the documentation.
Most people don't use more than 2147483647 arguments to inline functions,
and on poor targets with 16-bit ints I bet even having more than 65535
arguments to inline functions would be highly unexpected.
2023-01-27 Jakub Jelinek <jakub@redhat.com>
PR other/108560
* doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
from size_t to int.
IPA passes redirect some calls in what it determines to be unreachable code
to builtin_decl_unreachable. But that function returns sometimes
builtin_decl_explicit (BUILT_IN_UNREACHABLE) (which was what GCC 12
and earlier did always), or builtin_decl_explicit (BUILT_IN_TRAP)
(e.g. for -funreachable-traps, -O0, -Og).
Now the cgraph verification code has a code to verify cgraph edges
and has there an exception for these redirections to BUILT_IN_UNREACHABLE,
but doesn't have for BUILT_IN_TRAP, so e.g. the following testcase
ICEs during that verification.
The following patch just adds BUILT_IN_TRAP to those exceptions.
2023-01-27 Jakub Jelinek <jakub@redhat.com>
PR ipa/106061
* cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
redirection of calls to __builtin_trap in addition to redirection
to __builtin_unreachable.
Ju-Zhe Zhong [Thu, 19 Jan 2023 07:02:58 +0000 (15:02 +0800)]
RISC-V: Fix pred_mov constraint for vle.v
The original constraint is incorrect in pred_mov pattern.
Take a look at Alternative 2, the operands[0] is "vr",
operands[1] which is mask operand can be "vm".
Such alternative matching will give the wrong codegen (vle.v v0,0(a5),v0.t)
This is illegal according to RVV ISA.
To fix this issue and not destroy the RA performance, fix this pattern in
this patch.
Ju-Zhe Zhong [Fri, 20 Jan 2023 09:33:09 +0000 (17:33 +0800)]
RISC-V: Add TARGET_MIN_VLEN > 32 into iterators of EEW = 64 vector modes
According to RVV ISA, RVV doesn't support EEW == 64 vector type for zve32x
and zve32f. So it makes sense add predicate in the iterators of EEW = 64
vector modes.
git://gcc.gnu.org / gcc.git / log