Michael Meissner [Fri, 15 Sep 2023 17:34:48 +0000 (13:34 -0400)]
Add -mno-lxvp and -mno-stxvp.
This patch adds the options -mno-lxvp and -mno-stxvp that control whether GCC
will generate vector pair load/stores or split the instructions into separate
vector loads/stores. These switches are not documented, but are there to allow
us to look at some places where the paired load/store instructions slow things
down.
With this patch, GCC will not allow X-form (register + register) vector
pair loads or stores unless both lxvp and stxvp are being generated.
I also added the lxvp and stxvp command line options to the options that the
user can enable or disable with #pragma target or attribute target.
The default is to generate the vector pair load/store instructions.
2023-09-15 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/mma.md (movoo): Add support for -mno-lxvp and
-mno-stxvp.
* config/rs6000/rs6000.cc (rs6000_debug_reg_global): If -mdebug=reg,
print out whether we are generating lxvp and/or stxvp instructions.
(rs6000_option_override_internal): Warn if -mlxvp or -mstxvp was used
without -mmma being set.
(rs6000_setup_reg_addr_masks structure): Add support for -mno-lxvp and
-mno-stxvp.
(rs6000_opt_vars): Add lxvp and stxvp command line options.
* config/rs6000/rs6000.md (isa attribute): Add lxvp and stxvp isa
support.
(enabled attribute): Likewise.
* config/rs6000/rs6000.opt (-mlxvp): New option.
(-mstxvp): Likewise.
Michael Meissner [Fri, 15 Sep 2023 17:05:51 +0000 (13:05 -0400)]
Replace UNSPEC_COPYSIGN with copysign RTL
When I first implemented COPYSIGN support in the power7 days, we did not have a
copysign RTL insn, so I had to use UNSPEC to represent the copysign
instruction. This patch removes those UNSPECs, and it uses the native RTL
copysign insn.
2023-09-15 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete.
(copysign<mode>3_fcpsg): Use copysign RTL instead of UNSPEC.
(copysign<mode>3_hard): Likewise.
(copysign<mode>3_soft): Likewise.
* config/rs6000/vector.md (vector_copysign<mode>3): Use copysign RTL
instead of UNSPEC.
* config/rs6000/vsx.md (vsx_copysign<mode>3): Use copysign RTL instead
of UNSPEC.
Andrew Pinski [Thu, 14 Sep 2023 21:47:04 +0000 (14:47 -0700)]
MATCH: Improve zero_one_valued_p for cases without range information
I noticed we sometimes lose range information in forwprop due to a few
match and simplify patterns optimizing away casts. So the easier way
to these cases is to add a match for zero_one_valued_p wich mathes
a cast from another zero_one_valued_p.
This also adds the case of `x & zero_one_valued_p` as being zero_one_valued_p
which allows catching more cases too.
OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
gcc/ChangeLog:
* match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p.
Also match `a & zero_one_valued_p` too.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/bool-13.c: Update testcase as we now do
the MIN/MAX during forwprop1.
I had missed that integer_onep can match vector types with uniform constant of `1`.
This means the shifter could be an scalar type and then doing a comparison against `0`
would be an invalid transformation.
This fixes the problem by adding a check for the type of the integer_onep to make
sure it is a INTEGRAL_TYPE_P (which does not match a vector type).
OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
PR tree-optimization/111414
gcc/ChangeLog:
* match.pd (`(1 >> X) != 0`): Check to see if
the integer_onep was an integral type (not a vector type).
Andrew MacLeod [Wed, 13 Sep 2023 14:09:16 +0000 (10:09 -0400)]
Always do PHI analysis and before loop analysis.
PHI analysis wasn't being done if loop analysis found a value. Always
do the PHI analysis, and run it for an iniital value before invoking
loop analysis.
* gimple-range-fold.cc (fold_using_range::range_of_phi): Always
run phi analysis, and do it before loop analysis.
Fix PR111407--SSA corruption due to widening_mul opt on conflict across an abnormal edge
This is a bug in tree-ssa-math-opts.cc, when applying the widening mul
optimization, the compiler needs to check whether the operand is in a
ABNORMAL PHI, if YES, we should avoid the transformation.
PR tree-optimization/111407
gcc/ChangeLog:
* tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
when one of the operands is subject to abnormal coalescing.
Piotr Trojanek [Thu, 7 Sep 2023 20:13:51 +0000 (22:13 +0200)]
ada: Explicitly analyze and expand null array aggregates
Null array aggregates have present but empty lists of expressions and
component associations. This confuses the previous code for ordinary
array aggregates, which assumes that if a list of either expressions or
component associations is present, then it is non-empty.
This patch adds explicit handling for null array aggregates to avoid
assertion failures in code for ordinary array aggregates.
gcc/ada/
* exp_aggr.adb (Build_Array_Aggr_Code): Don't build aggregate code
for null array aggregates.
* sem_aggr.adb (Resolve_Array_Aggregate): Don't examine formatting
of a null array aggregate.
Eric Botcazou [Thu, 7 Sep 2023 14:44:36 +0000 (16:44 +0200)]
ada: Fix wrong optimization of extended return for discriminated record type
This happens when the discriminants of the record type have default values.
gcc/ada/ChangeLog:
* inline.adb (Expand_Inlined_Call): In the case of a function call
that returns an unconstrained type and initializes an object, set
the No_Initialization flag on the new declaration of the object.
Patrick Bernardi [Tue, 15 Aug 2023 19:52:57 +0000 (15:52 -0400)]
ada: Do not perform local-exception-to-goto optimization on barrier functions
The local-exception-to-goto optimization is no longer applied to entry
barrier functions as entry barriers cannot contain exception handlers and
this optimization interferes with another optimization that occurs for
simple barrier functions.
In particular, the simple barrier optimization removes the push error label
statements generated by the local-exception-to-goto optimization. This
causes a Storage_Error in GIGI when the restriction No_Exception_Propagation
is active and a protected object contains more than one simple entry
barrier.
gcc/ada/
* exp_ch6.adb (Expand_N_Subprogram_Body): Do not perform
local-exception-to- goto optimization on barrier functions.
* exp_ch9.adb (Expand_Entry_Barrier): Simplify the if statement
around the simple barrier optimization and remove an old, no
longer relevant comment.
Patrick Bernardi [Thu, 17 Aug 2023 20:24:13 +0000 (16:24 -0400)]
ada: Generate runtime restrictions list when the standard library is suppressed
With the introduction of Jorvik support into the light-tasking runtime comes
the requirement to detect voliations of runtime restrictions (for example
Max_Entry_Queue_Length) where previously they could be hard coded in the
runtime. This means we now need the binder to populate
System.System.Restrictions.Run_Time_Restrictions when the standard library
is suppressed.
gcc/ada/
* bindgen.adb (Gen_Adainit): Generate restrictions when standard
library is suppressed.
(Gen_Output_File_Ada): Ditto.
(Gen_Restrictions): Ditto.
Eric Botcazou [Wed, 6 Sep 2023 07:37:29 +0000 (09:37 +0200)]
ada: Fix internal error on aggregate nested in container aggregate
This handles the case where a component association is present.
gcc/ada/
* exp_aggr.adb (Convert_To_Assignments): In the case of a
component association, call Is_Container_Aggregate on the parent's
parent.
(Expand_Array_Aggregate): Likewise.
* doc/gnat_ugn/building_executable_programs_with_gnat.rst: Remove
extended discussion regarding mold run-time dependencies;
packaging changes in GNAT Pro have made them obsolete.
Eric Botcazou [Tue, 5 Sep 2023 11:21:24 +0000 (13:21 +0200)]
ada: Fix internal error on expression function with Refined_Post aspect
This occurs when the expression function calls a protected function and the
-gnata switch is specified, because the compiler wrongly freezes the called
function when analyzing the expression function, a fallout of the wrapping
scheme used for the Post and Refined_Post aspects.
gcc/ada/
* sem_res.adb (Resolve_Call): When the target is an entity, do not
freeze it if the current scope is the inner wrapper function built
for an expression function with a Post or Refined_Post aspect.
Bob Duff [Tue, 5 Sep 2023 18:40:22 +0000 (14:40 -0400)]
ada: Clean up scope depth and related code (tech debt)
The main point of this patch is to remove the special case
for Atree.F_Scope_Depth_Value in the Assert that Field_Present
in Get_Field_Value. Pulling on that thread leads to lots
of related cleanup.
gcc/ada/ChangeLog:
* atree.adb (Node_Kind_Table): Specify parameter explicitly in
GNAT.Table instantiations. Use fully qualified references instead
of relying on use clauses.
(Get_Field_Value): Remove special case for F_Scope_Depth_Value.
That is, enable the Field_Present check in that case.
(It was already enabled for all other fields.) Violations of this
check were already fixed.
(Print_Node_Statistics): Sort the output in decreasing order of
frequencies.
(Print_Field_Statistics): Likewise (sort).
* accessibility.adb (Accessibility_Level): Pass Allow_Alt_Model in
recursive calls. Apparently, an oversight.
(Innermost_Master_Scope_Depth): Need to special-case the 'Old
attribute and allocators.
* einfo-utils.ads (Scope_Depth): Use Scope_Kind_Id to get
predicate checks.
(Scope_Depth_Set): Likewise.
(Scope_Depth_Default_0): Likewise.
* einfo-utils.adb: As for spec.
* frontend.adb (Frontend): Remove unnecessary "return;".
* gen_il-types.ads (Scope_Kind): New union type.
* gen_il-gen-gen_entities.adb (Scope_Kind): New union type.
* sem.ads: Move "with Einfo.Entities;" from body to spec.
(Scope_Stack_Entry): Declare Entity to be of Scope_Kind_Id to get
predicate checks. We had previously been putting non-scopes on the
scope stack; this prevents such anomalies.
* sem.adb: Move "with Einfo.Entities;" from body to spec.
* sem_ch8.ads: Move "with Einfo.Entities;" from body to spec. Add
"with Types;".
(Push_Scope): Use Scope_Kind_Id to get predicate checks.
* sem_ch8.adb: Move "with Einfo.Entities;" from body to spec. Add
"with Types;".
(Push_Scope): Use Scope_Kind_Id to get predicate checks.
(Pop_Scope): Use Scope_Kind_Id on popped entity to get predicate
checks. This prevents anomalies where a scope pushed onto the
stack is later mutated to a nonscope before being popped.
* sem_util.ads (Find_Enclosing_Scope): Add postcondition to ensure
that the enclosing scope of a node N is not the same node N.
Clearly, N does not enclose itself.
* sem_util.adb (Find_Enclosing_Scope): There were several bugs
where Find_Enclosing_Scope(N) = N. For example, if N is an entity,
then we would typically go up to its declaration, and then back
down to the Defining_Entity of the declaration, which is N itself.
There were other cases where Find_Enclosing_Scope of an entity
disagreed with Scope. Clearly, Find_Enclosing_Scope and Scope
should agree (when both are defined). Such bugs caused latent bugs
in accessibility.adb related to 'Old, and fixing bugs here caused
such bugs to be revealed. These are fixed by calling Scope when N
is an entity.
Javier Miranda [Tue, 5 Sep 2023 06:57:10 +0000 (06:57 +0000)]
ada: Crash on creation of extra formals on type extension
Revert previous patch and fix the pending issue.
gcc/ada/
* accessibility.ads (Needs_Result_Accessibility_Extra_Formal):
Removed.
* accessibility.adb (Needs_Result_Accessibility_Level_Param):
Removed.
(Needs_Result_Accessibility_Extra_Formal): Removed.
(Needs_Result_Accessibility_Level): Revert previous patch.
* sem_ch6.adb (Parent_Subprogram): Handle function overriding an
enumeration literal.
(Create_Extra_Formals): Ensure that the parent subprogram has all
its extra formals.
RISC-V: Fix using wrong mode to get reduction insn vlmax
This patch fix using wrong mode when emit vlmax reduction insn. We should
use src operand instead dest operand (which always LMUL=m1) to get the vlmax
length. This patch alse remove dest_mode and mask_mode from insn_expander
constructor, which can be geted by insn_flags.
Mikael Morin [Fri, 15 Sep 2023 11:40:08 +0000 (13:40 +0200)]
fortran: Remove reference count update [PR108957]
Remove one reference count incrementation following the assignment of a
symbol pointer to a local variable. Most symbol pointers are "weak" pointer
and don't need any reference count update when they are assigned, and it is
especially the case of local variables.
This fixes a memory leak with the testcase from the PR (not included).
test: Block slp-16.c check for target support vect_strided6
This testcase FAIL in RISC-V because RISC-V support vect_load_lanes with 6.
FAIL: gcc.dg/vect/slp-16.c -flto -ffat-lto-objects scan-tree-dump-times vect "vectorizing stmts using SLP" 2
FAIL: gcc.dg/vect/slp-16.c scan-tree-dump-times vect "vectorizing stmts using SLP" 2
Since it use vlseg6 (vect_load_lanes with array size = 6)
test: Isolate slp-1.c check of target supports vect_strided5
This test failed in RISC-V:
FAIL: gcc.dg/vect/slp-1.c -flto -ffat-lto-objects scan-tree-dump-times vect "vectorizing stmts using SLP" 4
FAIL: gcc.dg/vect/slp-1.c scan-tree-dump-times vect "vectorizing stmts using SLP" 4
Because this loop:
/* SLP with unrolling by 8. */
for (i = 0; i < N; i++)
{
out[i*5] = 8;
out[i*5 + 1] = 7;
out[i*5 + 2] = 81;
out[i*5 + 3] = 28;
out[i*5 + 4] = 18;
}
is using vect_load_lanes with array size = 5.
instead of SLP.
When we adjust the COST of LANES load store, then it will use SLP.
Like ARM SVE, this test cause FAILs of XPASS:
XPASS: gcc.dg/Wstringop-overflow-47.c pr97027 (test for warnings, line 72)
XPASS: gcc.dg/Wstringop-overflow-47.c pr97027 (test for warnings, line 77)
XPASS: gcc.dg/Wstringop-overflow-47.c pr97027 note (test for warnings, line 68)
RISC-V: Refactor expand_reduction and cleanup enum reduction_type
This patch refactors expand_reduction, remove the reduction_type argument
and add insn_flags argument to determine the passing of the operands.
ops has also been modified to restrict it to only two cases and to remove
operand that are not in use.
Jonathan Wakely [Thu, 14 Sep 2023 09:27:09 +0000 (10:27 +0100)]
libstdc++: Fix constraints for std::variant default constructor
The standard says the default ctor should be constrained, not deleted.
Our use of a defaulted default ctor and _Enable_default_constructor base
class results in it being deleted.
libstdc++-v3/ChangeLog:
* include/std/variant (variant): Remove derivation from
_Enable_default_constructor base class.
(variant::variant()): Constrain.
* testsuite/20_util/variant/default_ctor.cc: New test.
Jonathan Wakely [Tue, 12 Sep 2023 20:28:38 +0000 (21:28 +0100)]
libstdc++: Remove non-void static assertions in variant's std::get [PR111172]
A void template argument would cause a substitution failure when trying
to form a reference for the return type, so the function body would
never be instantiated.
Jonathan Wakely [Thu, 17 Aug 2023 23:24:46 +0000 (00:24 +0100)]
libstdc++: Add operator bool to <charconv> result types (P2497R0)
C++26 adds these convenience conversions.
libstdc++-v3/ChangeLog:
* include/bits/version.def (to_chars): Define new value for
C++26.
* include/bits/version.h: Regenerate.
* include/std/charconv (to_chars_result::operator bool): New
function.
(from_chars_result::operator bool): New function.
* testsuite/20_util/to_chars/version.cc: Update expected value.
* testsuite/20_util/from_chars/result.cc: New test.
* testsuite/20_util/to_chars/result.cc: New test.
aarch64_operands_ok_for_ldpstp contained the code:
/* One of the memory accesses must be a mempair operand.
If it is not the first one, they need to be swapped by the
peephole. */
if (!aarch64_mem_pair_operand (mem_1, GET_MODE (mem_1))
&& !aarch64_mem_pair_operand (mem_2, GET_MODE (mem_2)))
return false;
But the requirement isn't just that one of the accesses must be a
valid mempair operand. It's that the lower access must be, since
that's the access that will be used for the instruction operand.
gcc/
PR target/111411
* config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
the lower memory access to a mem-pair operand.
gcc/testsuite/
PR target/111411
* gcc.dg/rtl/aarch64/pr111411.c: New test.
Yang Yujie [Wed, 13 Sep 2023 09:52:14 +0000 (17:52 +0800)]
LoongArch: Reimplement multilib build option handling.
Library build options from --with-multilib-list used to be processed with
*self_spec, which missed the driver's initial canonicalization. This
caused limitations on CFLAGS override and the use of driver-only options
like -m[no]-lsx.
The problem is solved by promoting the injection rules of --with-multilib-list
options to the first element of DRIVER_SELF_SPECS, to make them execute before
the canonialization. The library-build options are also hard-coded in
the driver and can be used conveniently by the builders of other non-gcc
libraries via the use of -fmultiflags.
* mt-loongarch-mlib: New file. Pass -fmultiflags when building
target libraries (FLAGS_FOR_TARGET).
* mt-loongarch-elf: New file.
* mt-loongarch-gnu: New file.
gcc/ChangeLog:
* config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
* config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
before the driver canonicalization routines.
* config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
to loongarch-driver.h
* config/loongarch/t-linux: Move multilib-related definitions to
t-multilib.
* config/loongarch/t-multilib: New file. Inject library build
options obtained from --with-multilib-list.
* config/loongarch/t-loongarch: Same.
RISC-V: Support combine extend and reduce sum to widen reduce sum
This patch add combine pattern to combine extend and reduce sum
to widen reduce sum. The pattern in autovec.md was adjusted as
needed. Note that the current vectorization cannot generate reduce
operand which is LMUL=M8, because this means that we need an LMUL=M16
for the extended operand, which is currently not possible. So I've
added VI_QHS_NO_M8 and VF_HS_NO_M8 mode iterator, which exclude
mode which is LMUL=M8.
PR target/111381
gcc/ChangeLog:
* config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>):
New combine pattern.
(*fold_left_widen_plus_<mode>): Ditto.
(*mask_len_fold_left_widen_plus_<mode>): Ditto.
* config/riscv/autovec.md (reduc_plus_scal_<mode>):
Change from define_expand to define_insn_and_split.
(fold_left_plus_<mode>): Ditto.
(mask_len_fold_left_plus_<mode>): Ditto.
* config/riscv/riscv-v.cc (expand_reduction):
Support widen reduction.
* config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM):
Add new iterators and attrs.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/widen/widen_reduc-1.c: New test.
* gcc.target/riscv/rvv/autovec/widen/widen_reduc_order-1.c: New test.
* gcc.target/riscv/rvv/autovec/widen/widen_reduc_order-2.c: New test.
* gcc.target/riscv/rvv/autovec/widen/widen_reduc_order_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/widen/widen_reduc_order_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/widen/widen_reduc_run-1.c: New test.
David Malcolm [Thu, 14 Sep 2023 20:28:45 +0000 (16:28 -0400)]
diagnostics: support multithreaded diagnostic paths
This patch extends the existing diagnostic_path class so that as well
as list of events, there is a list of named threads, with each event
being associated with one of the threads.
No GCC diagnostics take advantage of this, but GCC plugins may find a
use for this; an example is provided in the testsuite.
Given that there is still a single list of events within a
diagnostic_path, the events in a diagnostic_path have a specific global
ordering even if they are in multiple threads.
Within the SARIF serialization, the patch adds the "executionOrder"
property to threadFlowLocation objects (SARIF v2.1.0 3.38.11). This is
1-based in order to match the human-readable numbering of events shown
in messages emitted by pretty-printer.cc's "%@".
With -fdiagnostics-path-format=separate-events, the threads are not
shown.
With -fdiagnostics-path-format=inline-events, the threads and the
per-thread stack activity are tracked and visalized separately. An
example can be seen in the testsuite.
gcc/analyzer/ChangeLog:
* checker-event.h (checker_event::get_thread_id): New.
* checker-path.h (class checker_path): Implement thread-related
vfuncs via a single simple_diagnostic_thread instance named
"main".
gcc/ChangeLog:
* diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
* diagnostic-format-sarif.cc (class sarif_thread_flow): New.
(sarif_thread_flow::sarif_thread_flow): New.
(sarif_builder::make_code_flow_object): Reimplement, creating
per-thread threadFlow objects, populating them with the relevant
events.
(sarif_builder::make_thread_flow_object): Delete, moving the
code into sarif_builder::make_code_flow_object.
(sarif_builder::make_thread_flow_location_object): Add
"path_event_idx" param. Use it to set "executionOrder"
property.
* diagnostic-path.h (diagnostic_event::get_thread_id): New
pure-virtual vfunc.
(class diagnostic_thread): New.
(diagnostic_path::num_threads): New pure-virtual vfunc.
(diagnostic_path::get_thread): New pure-virtual vfunc.
(diagnostic_path::multithreaded_p): New decl.
(simple_diagnostic_event::simple_diagnostic_event): Add optional
thread_id param.
(simple_diagnostic_event::get_thread_id): New accessor.
(simple_diagnostic_event::m_thread_id): New.
(class simple_diagnostic_thread): New.
(simple_diagnostic_path::simple_diagnostic_path): Move definition
to diagnostic.cc.
(simple_diagnostic_path::num_threads): New.
(simple_diagnostic_path::get_thread): New.
(simple_diagnostic_path::add_thread): New.
(simple_diagnostic_path::add_thread_event): New.
(simple_diagnostic_path::m_threads): New.
* diagnostic-show-locus.cc (layout::layout): Add pretty_printer
param for overriding the context's printer.
(diagnostic_show_locus): Likwise.
* diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
Move here from diagnostic-path.h. Add main thread.
(simple_diagnostic_path::num_threads): New.
(simple_diagnostic_path::get_thread): New.
(simple_diagnostic_path::add_thread): New.
(simple_diagnostic_path::add_thread_event): New.
(simple_diagnostic_event::simple_diagnostic_event): Add thread_id
param and use it to initialize m_thread_id. Reformat.
* diagnostic.h: Add pretty_printer param for overriding the
context's printer.
* tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
(can_consolidate_events): Compare thread ids.
(class per_thread_summary): New.
(event_range::event_range): Add per_thread_summary arg.
(event_range::print): Add "pp" param and use it rather than dc's
printer.
(event_range::m_thread_id): New field.
(event_range::m_per_thread_summary): New field.
(path_summary::multithreaded_p): New.
(path_summary::get_events_for_thread_id): New.
(path_summary::m_per_thread_summary): New field.
(path_summary::m_thread_id_to_events): New field.
(path_summary::get_or_create_events_for_thread_id): New.
(path_summary::path_summary): Create per_thread_summary instances
as needed and associate the event_range instances with them.
(base_indent): Move here from print_path_summary_as_text.
(per_frame_indent): Likewise.
(class thread_event_printer): New, adapted from parts of
print_path_summary_as_text.
(print_path_summary_as_text): Make static. Reimplement to
moving most of existing code to class thread_event_printer,
capturing state as per-thread as appropriate.
(default_tree_diagnostic_path_printer): Add missing 'break' on
final case.
gcc/testsuite/ChangeLog:
* gcc.dg/plugin/diagnostic-test-paths-multithreaded-inline-events.c:
New test.
* gcc.dg/plugin/diagnostic-test-paths-multithreaded-sarif.c: New
test.
* gcc.dg/plugin/diagnostic-test-paths-multithreaded-separate-events.c:
New test.
* gcc.dg/plugin/diagnostic_plugin_test_paths.c: Add support for
generating multithreaded paths.
* gcc.dg/plugin/plugin.exp: Add the new tests.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
David Malcolm [Thu, 14 Sep 2023 20:28:44 +0000 (16:28 -0400)]
ggc, jit: forcibly clear GTY roots in jit
As part of Antoyo's work on supporting LTO in rustc_codegen_gcc, he
noticed an ICE inside libgccjit when compiling certain rust files.
Debugging libgccjit showed that outdated information from a previous
in-memory compile was referring to ad-hoc locations in the previous
compile's line_table.
The issue turned out to be the function decls in internal_fn_fnspec_array
from the previous compile keeping alive the symtab nodes for these
functions, and from this finding other functions in the previous
compile, walking their CFGs, and finding ad-hoc data pointers in an edge
with a location_t using ad-hoc data from the previous line_table
instance, and thus a use-after-free ICE attempting to use this ad-hoc
data.
Previously in toplev::finalize we've fixed global state "piecemeal" by
calling out to individual source_name_cc_finalize functions. However,
it occurred to me that we have run-time information on where the
GTY-marked pointers are.
Hence this patch takes something of a "big hammer" approach by adding a
new ggc_common_finalize that walks the GC roots, zeroing all of the
pointers. I stepped through this in the debugger and observed that, in
particular, this correctly zeroes the internal_fn_fnspec_array at the end
of a libgccjit compile. Antoyo reports that this fixes the ICE for him.
Doing so uncovered an ICE with libgccjit in dwarf2cfi.cc due to reuse of
global variables from the previous compile, which this patch also fixes.
I noticed that in ggc_mark_roots when clearing deletable roots we only
clear the initial element in each gcc_root_tab_t. This looks like a
latent bug to me, which the patch fixes. That said, there don't seem to
be any deletable roots where the number of elements != 1.
gcc/ChangeLog:
* dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
* dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
* ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
clearing the deletable gcc_root_tab_t.
(ggc_common_finalize): New.
* ggc.h (ggc_common_finalize): New decl.
* toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
ggc_common_finalize.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
Gaius Mulley [Thu, 14 Sep 2023 18:35:24 +0000 (19:35 +0100)]
modula2: introduce case checking when switching on subranges
This patch extends the -Wcase-enum warning to catch missing elements
from subranges. The patch also includes removal of unused parameters
from M2SymInit.mod and M2CaseList.mod.
gcc/m2/ChangeLog:
* gm2-compiler/M2CaseList.mod (appendString): New procedure.
(appendEnum): Re-implement.
(NoOfSetElements): New procedure function.
(isPrintableChar): New procedure function.
(appendTree): New procedure.
(SubrangeErrors): New procedure.
(EmitMissingRangeErrors): Call SubrangeErrors if appropriate.
* gm2-compiler/M2SymInit.mod (SetFieldInitializedNo): Avoid
using a temporary variable once.
(IsLocalVar): Comment out.
(RecordContainsVarient): Remove fieldtype.
(GenerateNoteFlow): Remove lst parameter.
(CheckDeferredRecordAccess): Remove lst parameter.
(CheckUnary): Remove lst parameter. Remove procSym.
(CheckBinary): Remove lst parameter. Remove procSym.
(CheckIndrX): Remove lst parameter. Remove procSym.
(CheckXIndr): Remove bblst and procSym parameters.
(CheckRecordField): Remove procSym, op1tok, op2tok and op2.
(CheckBecomes): Remove procSym and bblst.
(CheckComparison): Remove procSym and bblst.
(CheckAddr): Remove procSym parameter.
* gm2-gcc/m2expr.cc (m2expr_CSTIntToString): New function.
(m2expr_CSTIntToChar): New function.
* gm2-gcc/m2expr.def (CSTIntToString): New procedure function
declaration.
(CSTIntToChar): New procedure function declaration.
* gm2-gcc/m2expr.h (m2expr_CSTIntToChar): New prototype.
(m2expr_CSTIntToString): New prototype.
gcc/testsuite/ChangeLog:
* gm2/switches/case/fail/subrangecase.mod: New test.
* gm2/switches/case/fail/subrangecase2.mod: New test.
* gm2/switches/case/fail/subrangecase3.mod: New test.
* gm2/switches/case/fail/subrangecase4.mod: New test.
* gm2/switches/case/fail/subrangecase5.mod: New test.
* gm2/switches/case/fail/subrangecase6.mod: New test.
* gm2/switches/case/pass/subrangecase.mod: New test.
* gm2/switches/case/pass/subrangecase2.mod: New test.
* gm2/switches/case/pass/subrangecase3.mod: New test.
* gm2/switches/case/pass/subrangecase4.mod: New test.
[RA]: Improve cost calculation of pseudos with equivalences
RISCV target developers reported that RA can spill pseudo used in a
loop although there are enough registers to assign. It happens when
the pseudo has an equivalence outside the loop and the equivalence is
not merged into insns using the pseudo. IRA sets up that memory cost
to zero when the pseudo has an equivalence and it means that the
pseudo will be probably spilled. This approach worked well for i686
(different approaches were benchmarked long time ago on spec2k).
Although common sense says that the code is wrong and this was
confirmed by RISCV developers.
I've tried the following patch on I7-9700k and it improved spec17 fp
by 1.5% (21.1 vs 20.8) although spec17 int is a bit worse by 0.45%
(8.54 vs 8.58). The average generated code size is practically the
same (0.001% difference).
In the future we probably need to try more sophisticated cost
calculation which should take into account that the equiv can not be
combined in usage insns and the costs of reloads because of this.
gcc/ChangeLog:
* ira-costs.cc (find_costs_and_classes): Decrease memory cost
by equiv savings.
The reason for the change is that the semantics of the previous pattern is incorrect.
GCC does not have a standard rtx code to express the reduction calculation process.
It makes more sense to use UNSPEC.
Further, all reduction icode are geted by the UNSPEC and MODE (code_for_pred (unspec, mode)),
so that all reduction patterns can have a uniform icode name. After this adjust, widen_reducop
and widen_freducop are redundant.
RISC-V: Cleanup redundant reduction patterns after refactor vector mode
This patch cleanups redundant reduction patterns after Juzhe change vector mode
from fixed-size to scalable-size. For example, whether it is zvl32b, zvl64b,
zvl128b, RVVM1SI indicates that it occupies a vector register. Therefore, it is
easy to map vector modes to LMUL1 vector modes with define_mode_attr without
creating a separate pattern for each LMUL1 Mode. For example, this patch can
combine four patterns (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>,
@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>
@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>,
@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>) to a single pattern
@pred_reduc_<reduc><mode>.
AArch64 previously costed WHILELO instructions on the first call
to add_stmt_cost. This was because, at the time, only add_stmt_cost
had access to the loop_vec_info.
However, after the AVX512 changes, we only calculate the masks later.
This patch moves the WHILELO costing to finish_cost, which is in any
case a more logical place for it to be. It also means that we can
check the final decision about whether to use predicated loops.
gcc/
* config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
Move WHILELO handling to...
(aarch64_vector_costs::finish_cost): ...here. Check whether the
vectorizer has decided to use a predicated loop.
gcc/testsuite/
* gcc.target/aarch64/sve/cost_model_15.c: New test.
Andrew Pinski [Wed, 13 Sep 2023 23:50:33 +0000 (16:50 -0700)]
MATCH: Support `(a != (CST+1)) & (a > CST)` optimizations
Even though this is done via reassocation, match can support
these with a simple change to detect that the difference is just
one. This allows to optimize these earlier and even during phiopt
for an example.
This patch adds the following cases:
(a != (CST+1)) & (a > CST) -> a > (CST+1)
(a != (CST-1)) & (a < CST) -> a < (CST-1)
(a == (CST-1)) | (a >= CST) -> a >= (CST-1)
(a == (CST+1)) | (a <= CST) -> a <= (CST+1)
Canonicalizations of comparisons causes this case to show up more.
OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
PR tree-optimization/106164
gcc/ChangeLog:
* match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
Expand to support constants that are off by one.
gcc/testsuite/ChangeLog:
* gcc.dg/pr21643.c: Update test now that match does
the combing of the comparisons.
* gcc.dg/tree-ssa/cmpbit-5.c: New test.
* gcc.dg/tree-ssa/phi-opt-35.c: New test.
Andrew Pinski [Wed, 12 Jul 2023 05:14:18 +0000 (22:14 -0700)]
Improve error message for if with an else part while in switch
While writing some match.pd code, I was trying to figure
out why I was getting an `expected ), got (` error message
while writing an if statement with an else clause. For switch
statements, the if statements cannot have an else clause so
it would be better to have a decent error message saying that
explictly.
OK? Bootstrapped and tested on x86_64-linux-gnu.
gcc/ChangeLog:
* genmatch.cc (parser::parse_result): For an else clause
of an if statement inside a switch, error out explictly.
* gcc.target/riscv/rvv/autovec/vls/def.h: Add VLS tests.
* gcc.target/riscv/rvv/autovec/vls/cmp-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/cmp-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/cmp-3.c: New test.
* gcc.target/riscv/rvv/autovec/vls/cmp-4.c: New test.
* gcc.target/riscv/rvv/autovec/vls/cmp-5.c: New test.
* gcc.target/riscv/rvv/autovec/vls/cmp-6.c: New test.
* gcc.target/riscv/rvv/autovec/vls/mask-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/mask-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/mask-3.c: New test.
Jonathan Wakely [Wed, 13 Sep 2023 09:57:08 +0000 (10:57 +0100)]
libstdc++: Support dg-additional-files in tests
Some tests rely on text files with specific content being present in the
test directory. This has historically been done by copying
testsuite/data/*.tst and testsuite/data/*.txt to the test dir at the
start, in the libstdc++_init procedure. Some tests modify their data
files, so if the same test runs more than once in the same directory the
second and subsequent tests will see the modified files, and FAIL
because the content of the file is not in the expected state.
This change adds support for the dg-additional-files directive from the
main compiler testsuite and changes v3_target_compile to copy the
specified files to the directory where the test will run. This ensures
that a fresh copy of the files is present each time the test runs.
Eventually all tests could be transitioned to use dg-additional-files
and then libstdc++_init could be changed to remove the initial copy of
all files. This change only adds dg-additional-files to the tests that
modify their files and FAIL when re-run in the same directory.
The tests that rely on additional data files have comments containing
the strings "@require@" and "@diff@" which seem to be related to the
libstdc++-v3/mkcheck.in testing script that was removed in 2003. Those
comments can be used to find tests that should be migrated to use the
new dg-additional-files support, and then the comments can be removed.
libstdc++-v3/ChangeLog:
* testsuite/27_io/basic_filebuf/seekoff/char/1-io.cc: Use
dg-additional-files. Remove @require@ and @diff@ comments.
* testsuite/27_io/basic_filebuf/seekoff/char/2-io.cc: Likewise.
* testsuite/27_io/basic_filebuf/seekpos/char/1-io.cc: Likewise.
* testsuite/27_io/basic_filebuf/seekpos/char/2-io.cc: Likewise.
* testsuite/lib/dg-options.exp (v3_additional_files): New
global variable.
(dg-additional-files): New proc.
* testsuite/lib/libstdc++.exp (v3_target_compile): Copy
additional files to test directory.
Jonathan Wakely [Tue, 12 Sep 2023 11:04:37 +0000 (12:04 +0100)]
libstdc++: Remove some more unconditional uses of atomics
These atomics cause linker errors on arm4t where __sync_synchronize is
not defined. For single-threaded targets we don't need the atomics.
libstdc++-v3/ChangeLog:
* include/experimental/io_context (io_context) [!_GLIBCXX_HAS_GTHREADS]:
Use a plain integer for _M_work_count for single-threaded
targets.
* include/experimental/memory_resource (__get_default_resource)
[!_GLIBCXX_HAS_GTHREADS]: Use unsynchronized type for
single-threaded targets.
* src/c++17/default_resource.h: Adjust preprocessor conditions
to match memory_resource.cc.
* src/c++17/memory_resource.cc [!_GLIBCXX_HAS_GTHREADS]
(atomic_mem_res): Use unsynchronized type for single-threaded
targets.
Yannick Moy [Fri, 4 Aug 2023 13:01:28 +0000 (15:01 +0200)]
ada: Improve detection of deactivated code for warnings with -gnatwt
Switch -gnatwt is used in GNAT to track deleted code. It can be emitted
by GNAT on code that is intentionally deactivated for a given configuration.
The current test to suppress spurious warnings is not complex enough to
detect all such cases. Now improved, by using the same test as used in
GNATprove to suppress warnings related to a "statically disabled condition
which evaluates to a given value", as described in SPARK UG 7.3.2.
gcc/ada/
* exp_util.adb (Is_Statically_Disabled): New function to detect a
"statically disabled condition which evaluates to a given value",
as described in SPARK UG 7.3.2.
(Kill_Dead_Code): Call the new function Is_Statically_Disabled for
conditions of if statements.
* exp_util.ads (Is_Statically_Disabled): New function spec.
Javier Miranda [Wed, 30 Aug 2023 19:19:13 +0000 (19:19 +0000)]
ada: Assertion failure on expansion of record with invariant
gcc/ada/
* exp_util.adb (Process_Record_Component): Adjust assertion on the
availablity of the invariant procedure; required because the
invariant procedure is built by the expander, and hence it is not
available compiling generic units or when the sources have errors,
since expansion is then disabled.
Javier Miranda [Mon, 28 Aug 2023 18:32:18 +0000 (18:32 +0000)]
ada: Assertion failure on for-of loop iterating on selected component
gcc/ada/
* sem_util.adb (Is_Dependent_Component_Of_Mutable_Object): Protect
access to Entity attribute and add missing code to check function
selector in a prefix form call.
Eric Botcazou [Sun, 27 Aug 2023 07:34:59 +0000 (09:34 +0200)]
ada: Fix late finalization for function call in delta aggregate
The problem occurs at library level because the temporary created for the
function call lives in the elaboration routine but is finalized only when
the package itself is.
It turns out that there is no need for this temporary, since the expansion
of delta aggregates already creates a (properly finalized) temporary.
gcc/ada/
* exp_ch6.adb (Expand_Ctrl_Function_Call): Also do nothing for the
expression of a delta aggregate.
Richard Biener [Thu, 14 Sep 2023 07:31:23 +0000 (09:31 +0200)]
tree-optimization/111294 - better DCE after forwprop
The following adds more aggressive DCE to forwprop to clean up dead
stmts when folding a stmt leaves some operands unused. The patch
uses simple_dce_from_worklist for this purpose, queueing original
operands before substitution and folding, but only if we folded the
stmt.
This removes one dead stmt biasing threading costs in a later pass
but it doesn't resolve the optimization issue in the PR yet.
PR tree-optimization/111294
* tree-ssa-forwprop.cc (pass_forwprop::execute): Track
operands that eventually become dead and use simple_dce_from_worklist
to remove their definitions if they did so.
ptr + 2 is a valid address for an Advanced SIMD load, but not for
an SVE load. We therefore ended up generating:
ldr q0, [x0, 2]
dup z0.q, z0.q[0]
This patch makes us generate LD1RQ for that case too. It takes the
slightly old-school approach of making the predicate broader than
the constraint. That is: any valid memory address is accepted as
an operand before RA. If the instruction remains during RA, LRA will
coerce the address to match the constraint. If the instruction gets
split before RA, the splitter will load invalid addresses into a
scratch register.
gcc/
* config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
Accept all nonimmediate_operands, but keep the existing constraints.
If the instruction is split before RA, load invalid addresses into
a temporary register.
* config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
gcc/testsuite/
* gcc.target/aarch64/sve/acle/general/ld1rq_1.c: New test.
libstdc++: Add dg-require-thread-fence in several tests
Some targets like arm-eabi with newlib and default settings rely on
__sync_synchronize() to ensure synchronization. Newlib does not
implement it by default, to make users aware they have to take special
care.
This makes a few tests fail to link.
This patch requires the missing thread-fence effective target in the
tests that need it, making them UNSUPPORTED instead of FAIL and
UNRESOLVED.
xtensa: Optimize several boolean evaluations of EQ/NE against constant zero
An idiomatic implementation of boolean evaluation of whether a register is
zero or not in Xtensa is to assign 0 and 1 to the temporary and destination,
and then issue the MOV[EQ/NE]Z machine instruction
(See 8.3.2 Instruction Idioms, Xtensa ISA refman., p.599):
As you can see in the above idiom, if the source and destination are the
same register, a move instruction from the source to another temporary
register must be prepended:
Additionally, if TARGET_NSA is configured, the fact that it returns 32 iff
the source of the NSAU machine instruction is 0, otherwise less than, can be
used in boolean evaluation of EQ comparison.
;; A2 = (A3 == 0) ? 1 : 0;
nsau a2, a3 ;; Source and destination can be the same register
srli a2, a2, 5
Furthermore, this patch also saves one instruction when determining whether
the ANDing with mask values in which 1s are lined up from the upper or lower
bit end (for example, 0xFFE00000 or 0x003FFFFF) is 0 or not.
gcc/ChangeLog:
* config/xtensa/xtensa.cc (xtensa_expand_scc):
Revert the changes from the last patch, as the work in the RTL
expansion pass is too far to determine the physical registers.
* config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
(eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
LoongArch: Add tests for ASX vector xvssran/xvssrani/xvssrarn/xvssrarni instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvssran.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssrani.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssrarn.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssrarni.c: New test.
LoongArch: Add tests for ASX vector xvssrln/xvssrlni/xvssrlrn/xvssrlrni instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvssrln.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssrlni.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssrlrn.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssrlrni.c: New test.
LoongArch: Add tests for ASX vector xvpackev/xvpackod/xvpickev/xvpickod/ xvpickve2gr/xvreplgr2vr/xvreplve/xvreplve0/xvreplvei/xvshuf4i/xvshuf instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvpackev.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpackod.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpickev.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpickod.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpickve.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpickve2gr.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvreplgr2vr.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvreplve.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvreplve0.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvreplvei.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvshuf4i_b.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvshuf_b.c: New test.
LoongArch: Add tests for ASX vector xvext2xv/xvexth/xvextins/xvilvh/xvilvl/xvinsgr2vr/ xvinsve0/xvprem/xvpremi instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvext2xv-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvext2xv-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvexth-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvexth-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvextrins.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvilvh.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvilvl.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvinsgr2vr.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvinsve0.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvprem.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpremi.c: New test.
LoongArch: Add tests for ASX vector xvfcmp{saf/seq/sle/slt/sne/sor/sun} instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_saf_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_seq_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_sle_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_slt_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_sne_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_sor_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_sun_s.c: New test.
LoongArch: Add tests for ASX vector xvfcmp{caf/ceq/cle/clt/cne/cor/cun} instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_caf_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_ceq_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_cle_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_clt_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_cne_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_cor_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_cun_s.c: New test.
LoongArch: Add tests for ASX vector xvabsd/xvavg/xvavgr/xvbsll/xvbsrl/xvneg/ xvsat instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvabsd-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvabsd-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvavg-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvavg-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvavgr-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvavgr-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbsll_v.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbsrl_v.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvneg.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsat-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsat-2.c: New test.
LoongArch: Add tests for ASX vector xvfnmadd/xvfrstp/xvfstpi/xvhsubw/ xvmsub/xvrotr/xvrotri/xvld/xvst instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvfnmadd_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfnmadd_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfrstp.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfrstpi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvhsubw-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvhsubw-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvld.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmsub.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvrotr.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvrotri.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvst.c: New test.
LoongArch: Add tests for ASX vector comparison and selection instruction.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvseq.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvseqi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsle-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsle-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslei-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslei-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslt-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslt-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslti-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslti-2.c: New test.
LoongArch: Add tests for ASX vector floating-point conversion instruction.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvfcvt.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcvth.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvffint-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvffint-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvffinth.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfrint_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfrint_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvftint-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvftint-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvftint-3.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvftintl.c: New test.
LoongArch: Add tests for ASX vector floating-point operation instruction.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvfadd_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfadd_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfclass_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfclass_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvflogb_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvflogb_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfmadd_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfmadd_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfmax_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfmax_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfmaxa_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfmaxa_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfsqrt_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfsqrt_s.c: New test.
LoongArch: Add tests for ASX vector xvbitclr/xvbitclri/xvbitrev/xvbitrevi/ xvbitsel/xvbitseli/xvbitset/xvbitseti/xvclo/xvclz/xvpcnt instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvbitclr.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitclri.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitrev.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitrevi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitsel.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitseli.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitset.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitseti.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvclo.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvclz.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpcnt.c: New test.
LoongArch: Add tests for ASX vector xvextl/xvsra/xvsran/xvsrarn instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvextl-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvextl-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsra.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrai.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsran.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrani.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrar.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrari.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrarn.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrarni.c: New test.
LoongArch: Add tests for ASX vector xvsll/xvsrl instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvsll.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslli.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsllwil-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsllwil-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrl.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrli.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrln.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlni.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlr.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlri.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlrn.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlrni.c: New test.
LoongArch: Add tests for ASX vector xvand/xvandi/xvandn/xvor/xvori/ xvnor/xvnori/xvxor/xvxori instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvand.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvandi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvandn.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvnor.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvnori.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvor.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvori.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvorn.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvxor.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvxori.c: New test.
LoongArch: Add tests for ASX vector xvldi/xvmskgez/xvmskltz/xvmsknz/xvmuh /xvsigncov instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvldi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmskgez.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmskltz.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmsknz.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmuh-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmuh-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsigncov.c: New test.
LoongArch: Add tests for ASX vector xvmax/xvmaxi/xvmin/xvmini instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvmax-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmax-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaxi-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaxi-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmin-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmin-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmini-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmini-2.c: New test.
LoongArch: Add tests for ASX vector xvmul/xvmod/xvdiv instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvdiv-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvdiv-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmod-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmod-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmul.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwev-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwev-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwev-3.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwod-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwod-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwod-3.c: New test.
LoongArch: Add tests for ASX vector subtraction instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvssub-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssub-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsub.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsubi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsubwev-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsubwev-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsubwod-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsubwod-2.c: New test.
LoongArch: Add tests for ASX vector xvhadd/xvhaddw/xvmaddwev/xvmaddwod instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvhaddw-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvhaddw-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmadd.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwev-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwev-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwev-3.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwod-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwod-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwod-3.c: New test.
LoongArch: Add tests for ASX vector xvadd/xvadda/xvaddi/xvaddwev/ xvaddwodxvsadd instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvadd.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvadda.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwev-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwev-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwev-3.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwod-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwod-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwod-3.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsadd-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsadd-2.c: New test.
LoongArch: Add tests for SX vector vfmadd/vfnmadd/vld/vst instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vfmadd_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfmadd_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfnmadd_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfnmadd_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vld.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vst.c: New test.
LoongArch: Add tests for SX vector vand/vandi/vandn/vor/vori/vnor/ vnori/vxor/vxori instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vand.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vandi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vandn.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vnor.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vnori.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vor.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vori.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vorn.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vxor.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vxori.c: New test.
LoongArch: Add tests for SX vector handling and shuffle instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vbsll.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vbsrl.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vextrins.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vilvh.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vilvl.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vinsgr2vr.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpackev.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpackod.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpickev.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpickod.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpickve2gr.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpremi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vreplgr2vr.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vreplve.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vreplvei.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vshuf.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vshuf4i.c: New test.
LoongArch: Add tests for SX vector vfcmp instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_caf.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_ceq.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_cle.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_clt.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_cne.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_cor.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_cun.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_saf.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_seq.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_sle.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_slt.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_sne.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_sor.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_sun.c: New test.
LoongArch: Add tests for SX vector vfrstp/vfrstpi/vseq/vseqi/vsle /vslei/vslt/vslti instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vfrstp.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfrstpi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vseq.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vseqi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsle-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsle-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslei-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslei-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslt-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslt-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslti-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslti-2.c: New test.
LoongArch: Add tests for SX vector floating point arithmetic instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vfadd_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfadd_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfclass_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfclass_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vflogb_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vflogb_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfmax_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfmax_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfmaxa_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfmaxa_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfsqrt_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfsqrt_s.c: New test.