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15 months ago[aarch64] Recursively intialize even and odd sub-parts and merge with zip1.
Prathamesh Kulkarni [Sat, 13 May 2023 08:56:51 +0000 (14:26 +0530)]
[aarch64] Recursively intialize even and odd sub-parts and merge with zip1.

gcc/ChangeLog:
* config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
aarch64_expand_vector_init to this, and remove  interleaving case.
Recursively call aarch64_expand_vector_init_fallback, instead of
aarch64_expand_vector_init.
(aarch64_unzip_vector_init): New function.
(aarch64_expand_vector_init): Likewise.

gcc/testsuite/ChangeLog:
* gcc.target/aarch64/ldp_stp_16.c (cons2_8_float): Adjust for new
code-gen.
* gcc.target/aarch64/sve/acle/general/dupq_5.c: Likewise.
* gcc.target/aarch64/sve/acle/general/dupq_6.c: Likewise.
* gcc.target/aarch64/interleave-init-1.c: Rename to ...
* gcc.target/aarch64/vec-init-18.c: ... this.
* gcc.target/aarch64/vec-init-19.c: New test.
* gcc.target/aarch64/vec-init-20.c: Likewise.
* gcc.target/aarch64/vec-init-21.c: Likewise.
* gcc.target/aarch64/vec-init-22-size.c: Likewise.
* gcc.target/aarch64/vec-init-22-speed.c: Likewise.
* gcc.target/aarch64/vec-init-22.h: New header.

15 months agoRISC-V: Pull out function call with side effect from gcc_assert.
Kito Cheng [Sat, 13 May 2023 06:10:53 +0000 (14:10 +0800)]
RISC-V: Pull out function call with side effect from gcc_assert.

It will broken when release mode.

gcc/ChangeLog:

* config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
Pull out function call from the gcc_assert.

15 months agoRISC-V: Improve vector_insn_info::dump for LMUL and policy
Kito Cheng [Thu, 11 May 2023 08:03:55 +0000 (16:03 +0800)]
RISC-V: Improve vector_insn_info::dump for LMUL and policy

Convert vlmul and policy to human readable string, some example below:

Before:
[VALID,Demand field={1(VL),0(DEMAND_NONZERO_AVL),1(SEW),0(DEMAND_GE_SEW),1(LMUL),0(RATIO),0(TAIL_POLICY),0(MASK_POLICY)}
AVL=(reg:DI 0 zero)
SEW=16,VLMUL=3,RATIO=2,TAIL_POLICY=1,MASK_POLICY=1]
             ^                     ^             ^

After:
[VALID,Demand field={1(VL),0(DEMAND_NONZERO_AVL),1(SEW),0(DEMAND_GE_SEW),1(LMUL),0(RATIO),0(TAIL_POLICY),0(MASK_POLICY)}
AVL=(reg:DI 0 zero)
SEW=16,VLMUL=m8,RATIO=2,TAIL_POLICY=agnostic,MASK_POLICY=agnostic]
             ^^                     ^^^^^^^^             ^^^^^^^^

gcc/ChangeLog:

* config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
(policy_to_str): New.
(vector_insn_info::dump): Use vlmul_to_str and policy_to_str.

15 months agoMATCH: Fix PR 109834, ICE with popcount combined with bswap
Andrew Pinski [Fri, 12 May 2023 23:33:44 +0000 (16:33 -0700)]
MATCH: Fix PR 109834, ICE with popcount combined with bswap

After r14-673-gc0dd80e4c4c3, there was a check in the match
patterns which was checking the type is unsigned but
instead of using the type, the patch used the expression.
This adds the needed TREE_TYPE so get the correct answer and don't ICE.

Committed as obvious after a bootstrap/test on x86_64-linux-gnu.

PR tree-optimization/109834

gcc/ChangeLog:

* match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
(popcount(rotate(x,y))->popcount(x)): Likewise.

gcc/testsuite/ChangeLog:

* gcc.c-torture/compile/pr109834-1.c: New test.
* gcc.dg/tree-ssa/pr109834-1.c: New test.

15 months agoDaily bump.
GCC Administrator [Sat, 13 May 2023 00:17:14 +0000 (00:17 +0000)]
Daily bump.

15 months agoFortran: Revise a namelist test case.
Jerry DeLisle [Fri, 12 May 2023 20:38:25 +0000 (13:38 -0700)]
Fortran: Revise a namelist test case.

PR fortran/109662

gcc/testsuite/ChangeLog:

* gfortran.dg/pr109662-a.f90: Add a section to verify that
a short namelist read does not modify the variable.

15 months agoFortran: Initialize last_char for internal units.
Jerry DeLisle [Fri, 12 May 2023 19:23:00 +0000 (12:23 -0700)]
Fortran: Initialize last_char for internal units.

PR fortran/109662

libgfortran/ChangeLog:

* io/unit.c (set_internal_unit): Set the internal unit
last_char to zero so that previous EOF characters do not
influence the next read.

15 months agoi386: Cleanup ix86_expand_vecop_qihi{,2}
Uros Bizjak [Fri, 12 May 2023 17:50:06 +0000 (19:50 +0200)]
i386: Cleanup ix86_expand_vecop_qihi{,2}

Some cleanups while looking at these two functions.

gcc/ChangeLog:

* config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
reject ymm instructions for TARGET_PREFER_AVX128.  Use generic
gen_extend_insn to generate zero/sign extension instructions.
Fix comments.
(ix86_expand_vecop_qihi): Initialize interleave functions
for MULT code only.  Fix comments.

15 months agolibstdc++: Fix -Wnonnull warnings during configure
Jonathan Wakely [Fri, 12 May 2023 11:17:08 +0000 (12:17 +0100)]
libstdc++: Fix -Wnonnull warnings during configure

We should not test for nan by passing it a null pointer, as this can
trigger -Wnonnull warnings.

Also fix an outdated comment about the default -std mode.

libstdc++-v3/ChangeLog:

* acinclude.m4 (GLIBCXX_CHECK_C99_TR1): Use a non-null pointer
to check for nan, nanf, and nanl.
* configure: Regenerate.

15 months agolibstdc++: Remove redundant dependencies on _GLIBCXX_USE_C99_STDINT_TR1
Jonathan Wakely [Fri, 12 May 2023 13:25:50 +0000 (14:25 +0100)]
libstdc++: Remove redundant dependencies on _GLIBCXX_USE_C99_STDINT_TR1

We never need to use std::make_unsigned in std::char_traits<char16_t>
and std::char_traits<char32_t> because <cstdint> guarantees to provide
the types we need, since r9-2028-g8ba7f29e3dd064.

Similarly, experimental::source_location can just assume uint_least32_t
is defined by <cstdint>.

libstdc++-v3/ChangeLog:

* include/bits/char_traits.h (char_traits<char16_t>): Do not
depend on _GLIBCXX_USE_C99_STDINT_TR1.
(char_traits<char32_t>): Likewise.
* include/experimental/source_location: Likewise.

15 months agolibstdc++: Reduce <atomic> dependency on _GLIBCXX_USE_C99_STDINT_TR1
Jonathan Wakely [Fri, 12 May 2023 13:04:04 +0000 (14:04 +0100)]
libstdc++: Reduce <atomic> dependency on _GLIBCXX_USE_C99_STDINT_TR1

Since r9-2028-g8ba7f29e3dd064 we've defined most of <cstdint>
unconditionally, so we can do the same for most of the std::atomic
aliases such as std::atomic_int_least32_t.

The only aliases that need to depend on _GLIBCXX_USE_C99_STDINT_TR1 are
the ones for the integer types that are not guaranteed to be defined,
e.g. std::atomic_int32_t.

libstdc++-v3/ChangeLog:

* include/std/atomic (atomic_int_least8_t, atomic_uint_least8_t)
(atomic_int_least16_t, atomic_uint_least16_t)
(atomic_int_least32_t, atomic_uint_least32_t)
(atomic_int_least64_t, atomic_uint_least64_t)
(atomic_int_fast16_t, atomic_uint_fast16_t)
(atomic_int_fast32_t, atomic_uint_fast32_t)
(atomic_int_fast64_t, atomic_uint_fast64_t)
(atomic_intmax_t, atomic_uintmax_t): Define unconditionally.
* testsuite/29_atomics/headers/stdatomic.h/c_compat.cc: Adjust.

15 months agolibstdc++: Remove <random> dependency on _GLIBCXX_USE_C99_STDINT_TR1
Jonathan Wakely [Fri, 12 May 2023 12:55:17 +0000 (13:55 +0100)]
libstdc++: Remove <random> dependency on _GLIBCXX_USE_C99_STDINT_TR1

Since r9-2028-g8ba7f29e3dd064 we've defined most of <cstdint>
unconditionally, including uint_least32_t. This means that all of
<random> can be defined unconditionally, which means that std::shuffle
and std::ranges::shuffle can be too.

libstdc++-v3/ChangeLog:

* include/bits/algorithmfwd.h (shuffle): Do not depend on
_GLIBCXX_USE_C99_STDINT_TR1.
* include/bits/ranges_algo.h (shuffle): Likewise.
* include/bits/stl_algo.h (shuffle): Likewise.
* include/ext/random: Likewise.
* include/ext/throw_allocator.h (random_condition): Likewise.
* include/std/random: Likewise.
* src/c++11/cow-string-inst.cc: Likewise.
* src/c++11/random.cc: Likewise.

15 months agoPR modula2/109830 m2iso library SeqFile.mod appending to a file overwrites content
Gaius Mulley [Fri, 12 May 2023 16:44:29 +0000 (17:44 +0100)]
PR modula2/109830 m2iso library SeqFile.mod appending to a file overwrites content

This patch is for the m2iso library SeqFile.mod to fix a bug when a
file is opened using OpenAppend.  The patch checks to see if the file
exists and it uses FIO.OpenForRandom to ensure the file is not
overwritten.

gcc/m2/ChangeLog:

PR modula2/109830
* gm2-libs-iso/SeqFile.mod (newCid): New parameter toAppend
used to select FIO.OpenForRandom.
(OpenRead): Pass extra parameter to newCid.
(OpenWrite): Pass extra parameter to newCid.
(OpenAppend): Pass extra parameter to newCid.

gcc/testsuite/ChangeLog:

PR modula2/109830
* gm2/isolib/run/pass/seqappend.mod: New test.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
15 months agoi386: Remove mulv2si emulated sequence for TARGET_SSE2 [PR109797]
Uros Bizjak [Fri, 12 May 2023 16:37:13 +0000 (18:37 +0200)]
i386: Remove mulv2si emulated sequence for TARGET_SSE2 [PR109797]

Remove mulv2si emulated sequence for TARGET_SSE2 and enable
only native PMULLD instruction for TARGET_SSE4_1.  Ideally, the
vectorization for TARGET_SSE2 should depend on more precise cost
estimation (the PR contains patch for ix86_multiplication_cost),
but even with patched cost function the runtime regression
was not fixed.

PR target/109797

gcc/ChangeLog:

* config/i386/mmx.md (mulv2si3): Remove expander.
(mulv2si3): Rename insn pattern from *mulv2si.

15 months agoLTO: Fix writing of toplevel asm with offloading [PR109816]
Tobias Burnus [Fri, 12 May 2023 14:27:40 +0000 (16:27 +0200)]
LTO: Fix writing of toplevel asm with offloading [PR109816]

When offloading was enabled, top-level 'asm' were added to the offloading
section, confusing assemblers which did not support the syntax. Additionally,
with offloading and -flto, the top-level assembler code did not end up
in the host files.

As r14-321-g9a41d2cdbcd added top-level 'asm' to one libstdc++ header file,
the issue became more apparent, causing fails with nvptx for some
C++ testcases.

PR libstdc++/109816

gcc/ChangeLog:

* lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
'!lto_stream_offload_p'.

libgomp/ChangeLog:

* testsuite/libgomp.c++/target-map-class-1.C: New test.
* testsuite/libgomp.c++/target-map-class-2.C: New test.

15 months agolibstdc++: Remove test dependency on _GLIBCXX_USE_C99_STDINT_TR1
Jonathan Wakely [Fri, 12 May 2023 12:44:21 +0000 (13:44 +0100)]
libstdc++: Remove test dependency on _GLIBCXX_USE_C99_STDINT_TR1

This should have been done in r9-2028-g8ba7f29e3dd064 when
std::shared_mutex was changed to be defined without depending on
_GLIBCXX_USE_C99_STDINT_TR1.

libstdc++-v3/ChangeLog:

* testsuite/experimental/feat-cxx14.cc: Remove dependency on
_GLIBCXX_USE_C99_STDINT_TR1.

15 months agolibstdc++: Remove test dependency on _GLIBCXX_USE_C99_STDINT_TR1
Jonathan Wakely [Fri, 12 May 2023 12:38:50 +0000 (13:38 +0100)]
libstdc++: Remove test dependency on _GLIBCXX_USE_C99_STDINT_TR1

This should have been removed in r9-2029-g612c9c702e2c9e when the
char16_t and char32_t specializations of std::codecvt were changed to be
defined unconditionally.

libstdc++-v3/ChangeLog:

* testsuite/22_locale/locale/cons/unicode.cc: Remove dependency
on _GLIBCXX_USE_C99_STDINT_TR1.

15 months agolibstdc++: Remove test dependencies on _GLIBCXX_USE_C99_STDINT_TR1
Jonathan Wakely [Fri, 12 May 2023 12:34:37 +0000 (13:34 +0100)]
libstdc++: Remove test dependencies on _GLIBCXX_USE_C99_STDINT_TR1

These #ifdef checks should have been removed in r9-2029-g612c9c702e2c9e
when the u16string_view and u32string_view aliases were changed to be
defined unconditionally.

libstdc++-v3/ChangeLog:

* testsuite/21_strings/basic_string_view/typedefs.cc: Remove
dependency on _GLIBCXX_USE_C99_STDINT_TR1.
* testsuite/experimental/string_view/typedefs.cc: Likewise.

15 months agoRISC-V: Optimize vsetvli of LCM INSERTED edge for user vsetvli [PR 109743]
Kito Cheng [Fri, 12 May 2023 02:26:06 +0000 (10:26 +0800)]
RISC-V: Optimize vsetvli of LCM INSERTED edge for user vsetvli [PR 109743]

Rebase to trunk and send V3 patch for:
https://gcc.gnu.org/pipermail/gcc-patches/2023-May/617821.html

This patch is fixing: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109743.

This issue happens is because we are currently very conservative in optimization of user vsetvli.

Consider this following case:

bb 1:
  vsetvli a5,a4... (demand AVL = a4).
bb 2:
  RVV insn use a5 (demand AVL = a5).

LCM will hoist vsetvl of bb 2 into bb 1.
We don't do AVL propagation for this situation since it's complicated that
we should analyze the code sequence between vsetvli in bb 1 and RVV insn in bb 2.
They are not necessary the consecutive blocks.

This patch is doing the optimizations after LCM, we will check and eliminate the vsetvli
in LCM inserted edge if such vsetvli is redundant. Such approach is much simplier and safe.

code:
void
foo2 (int32_t *a, int32_t *b, int n)
{
  if (n <= 0)
      return;
  int i = n;
  size_t vl = __riscv_vsetvl_e32m1 (i);

  for (; i >= 0; i--)
  {
    vint32m1_t v = __riscv_vle32_v_i32m1 (a, vl);
    __riscv_vse32_v_i32m1 (b, v, vl);

    if (i >= vl)
      continue;

    if (i == 0)
      return;

    vl = __riscv_vsetvl_e32m1 (i);
  }
}

Before this patch:
foo2:
.LFB2:
.cfi_startproc
ble     a2,zero,.L1
mv      a4,a2
li      a3,-1
vsetvli a5,a2,e32,m1,ta,mu
vsetvli zero,a5,e32,m1,ta,ma  <- can be eliminated.
.L5:
vle32.v v1,0(a0)
vse32.v v1,0(a1)
bgeu    a4,a5,.L3
.L10:
beq     a2,zero,.L1
vsetvli a5,a4,e32,m1,ta,mu
addi    a4,a4,-1
vsetvli zero,a5,e32,m1,ta,ma  <- can be eliminated.
vle32.v v1,0(a0)
vse32.v v1,0(a1)
addiw   a2,a2,-1
bltu    a4,a5,.L10
.L3:
addiw   a2,a2,-1
addi    a4,a4,-1
bne     a2,a3,.L5
.L1:
ret

After this patch:
f:
ble     a2,zero,.L1
mv      a4,a2
li      a3,-1
vsetvli a5,a2,e32,m1,ta,ma
.L5:
vle32.v v1,0(a0)
vse32.v v1,0(a1)
bgeu    a4,a5,.L3
.L10:
beq     a2,zero,.L1
vsetvli a5,a4,e32,m1,ta,ma
addi    a4,a4,-1
vle32.v v1,0(a0)
vse32.v v1,0(a1)
addiw   a2,a2,-1
bltu    a4,a5,.L10
.L3:
addiw   a2,a2,-1
addi    a4,a4,-1
bne     a2,a3,.L5
.L1:
ret

PR target/109743

gcc/ChangeLog:

* config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
(local_avl_compatible_p): New.
(pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
for LCM, rewrite as a backward algorithm.
(pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
interface, handle a BB at once.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/vsetvl/pr109743-1.c: New test.
* gcc.target/riscv/rvv/vsetvl/pr109743-2.c: New test.
* gcc.target/riscv/rvv/vsetvl/pr109743-3.c: New test.
* gcc.target/riscv/rvv/vsetvl/pr109743-4.c: New test.

Co-authored-by: Juzhe-Zhong <juzhe.zhong@rivai.ai>
15 months agotree-optimization/64731 - extend store-from CTOR lowering to TARGET_MEM_REF
Richard Biener [Fri, 12 May 2023 11:43:27 +0000 (13:43 +0200)]
tree-optimization/64731 - extend store-from CTOR lowering to TARGET_MEM_REF

The following also covers TARGET_MEM_REF when decomposing stores from
CTORs to supported elementwise operations.  This avoids spilling
and cleans up after vector lowering which doesn't touch loads or
stores.  It also mimics what we already do for loads.

PR tree-optimization/64731
* tree-ssa-forwprop.cc (pass_forwprop::execute): Also
handle TARGET_MEM_REF destinations of stores from vector
CTORs.

* gcc.target/i386/pr64731.c: New testcase.

15 months agoc++: remove redundant testcase [PR83258]
Patrick Palka [Fri, 12 May 2023 12:37:54 +0000 (08:37 -0400)]
c++: remove redundant testcase [PR83258]

I noticed only after the fact that the new testcase template/function2.C
(from r14-708-gc3afdb8ba8f183) is just a subset of ext/visibility/anon8.C,
so let's get rid of it.

PR c++/83258

gcc/testsuite/ChangeLog:

* g++.dg/ext/visibility/anon8.C: Mention PR83258.
* g++.dg/template/function2.C: Removed.

15 months agoc++: robustify testcase [PR109752]
Patrick Palka [Fri, 12 May 2023 12:36:37 +0000 (08:36 -0400)]
c++: robustify testcase [PR109752]

This rewrites the testcase for PR109752 to make it simpler and more
robust (i.e. no longer dependent on r13-4035-gc41bbfcaf9d6ef).

PR c++/109752

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/concepts-pr109752.C: Rename to ...
* g++.dg/cpp2a/concepts-complete4.C: ... this.  Rewrite.

15 months agotree-optimization/109791 - simplify (unsigned)&foo - (unsigned)(&foo + o)
Richard Biener [Thu, 11 May 2023 12:28:11 +0000 (14:28 +0200)]
tree-optimization/109791 - simplify (unsigned)&foo - (unsigned)(&foo + o)

The following adds another variant of address difference simplification.
The utility ptr_difference_const only handles constant differences
(we also cannot code generate anything else), so exposing a possible
POINTER_PLUS_EXPR in the match and computing the difference on the
base only makes it possible to handle one case of a variable offset.
This simplifies

(unsigned long) &MEM <char[3]> [(void *)&str + 2B] - (unsigned long) (&str + (_69 + 1))

down to (1 - (unsigned long) _69) during niter analysis, allowing
ranger to eliminate a condition later and avoiding a bogus
-Wstringop-overflow diagnostic for the testcase in the PR.

PR tree-optimization/109791
* match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
New pattern.
(minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
Likewise.

15 months agoarm: [MVE intrinsics] rework vsriq
Christophe Lyon [Tue, 28 Feb 2023 16:12:44 +0000 (16:12 +0000)]
arm: [MVE intrinsics] rework vsriq

Implement vsriq using the new MVE builtins framework.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-base.cc (vsriq): New.
* config/arm/arm-mve-builtins-base.def (vsriq): New.
* config/arm/arm-mve-builtins-base.h (vsriq): New.
* config/arm/arm-mve-builtins.cc
(function_instance::has_inactive_argument): Handle vsriq.
* config/arm/arm_mve.h (vsriq): Remove.
(vsriq_m): Remove.
(vsriq_n_u8): Remove.
(vsriq_n_s8): Remove.
(vsriq_n_u16): Remove.
(vsriq_n_s16): Remove.
(vsriq_n_u32): Remove.
(vsriq_n_s32): Remove.
(vsriq_m_n_s8): Remove.
(vsriq_m_n_u8): Remove.
(vsriq_m_n_s16): Remove.
(vsriq_m_n_u16): Remove.
(vsriq_m_n_s32): Remove.
(vsriq_m_n_u32): Remove.
(__arm_vsriq_n_u8): Remove.
(__arm_vsriq_n_s8): Remove.
(__arm_vsriq_n_u16): Remove.
(__arm_vsriq_n_s16): Remove.
(__arm_vsriq_n_u32): Remove.
(__arm_vsriq_n_s32): Remove.
(__arm_vsriq_m_n_s8): Remove.
(__arm_vsriq_m_n_u8): Remove.
(__arm_vsriq_m_n_s16): Remove.
(__arm_vsriq_m_n_u16): Remove.
(__arm_vsriq_m_n_s32): Remove.
(__arm_vsriq_m_n_u32): Remove.
(__arm_vsriq): Remove.
(__arm_vsriq_m): Remove.

15 months agoarm: [MVE intrinsics] factorize vsriq
Christophe Lyon [Tue, 28 Feb 2023 16:12:29 +0000 (16:12 +0000)]
arm: [MVE intrinsics] factorize vsriq

Factorize vsriq builtins so that they use parameterized names.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/iterators.md (mve_insn): Add vsri.
* config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_n_<supf><mode>): .,. this.
(mve_vsriq_m_n_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_m_n_<supf><mode>): ... this.

15 months agoarm: [MVE intrinsics] add ternary_rshift shape
Christophe Lyon [Fri, 3 Mar 2023 10:20:29 +0000 (10:20 +0000)]
arm: [MVE intrinsics] add ternary_rshift shape

This patch adds the ternary_rshift shape description.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
* config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.

15 months agoarm: [MVE intrinsics] rework vsliq
Christophe Lyon [Tue, 28 Feb 2023 17:33:36 +0000 (17:33 +0000)]
arm: [MVE intrinsics] rework vsliq

Implement vsliq using the new MVE builtins framework.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-base.cc (vsliq): New.
* config/arm/arm-mve-builtins-base.def (vsliq): New.
* config/arm/arm-mve-builtins-base.h (vsliq): New.
* config/arm/arm-mve-builtins.cc
(function_instance::has_inactive_argument): Handle vsliq.
* config/arm/arm_mve.h (vsliq): Remove.
(vsliq_m): Remove.
(vsliq_n_u8): Remove.
(vsliq_n_s8): Remove.
(vsliq_n_u16): Remove.
(vsliq_n_s16): Remove.
(vsliq_n_u32): Remove.
(vsliq_n_s32): Remove.
(vsliq_m_n_s8): Remove.
(vsliq_m_n_s32): Remove.
(vsliq_m_n_s16): Remove.
(vsliq_m_n_u8): Remove.
(vsliq_m_n_u32): Remove.
(vsliq_m_n_u16): Remove.
(__arm_vsliq_n_u8): Remove.
(__arm_vsliq_n_s8): Remove.
(__arm_vsliq_n_u16): Remove.
(__arm_vsliq_n_s16): Remove.
(__arm_vsliq_n_u32): Remove.
(__arm_vsliq_n_s32): Remove.
(__arm_vsliq_m_n_s8): Remove.
(__arm_vsliq_m_n_s32): Remove.
(__arm_vsliq_m_n_s16): Remove.
(__arm_vsliq_m_n_u8): Remove.
(__arm_vsliq_m_n_u32): Remove.
(__arm_vsliq_m_n_u16): Remove.
(__arm_vsliq): Remove.
(__arm_vsliq_m): Remove.

15 months agoarm: [MVE intrinsics] factorize vsliq
Christophe Lyon [Mon, 27 Feb 2023 19:16:43 +0000 (19:16 +0000)]
arm: [MVE intrinsics] factorize vsliq

Factorize vsliq builtins so that they use parameterized names.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/iterators.md (mve_insn>): Add vsli.
* config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_n_<supf><mode>): ... this.
(mve_vsliq_m_n_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_m_n_<supf><mode>): ... this.

15 months agoarm: [MVE intrinsics] add ternary_lshift shape
Christophe Lyon [Tue, 28 Feb 2023 16:00:59 +0000 (16:00 +0000)]
arm: [MVE intrinsics] add ternary_lshift shape

This patch adds the ternary_lshift shape description.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
* config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.

15 months agoarm: [MVE intrinsics] rework vpselq
Christophe Lyon [Tue, 28 Feb 2023 15:51:01 +0000 (15:51 +0000)]
arm: [MVE intrinsics] rework vpselq

Implement vpselq using the new MVE builtins framework.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-base.cc (vpselq): New.
* config/arm/arm-mve-builtins-base.def (vpselq): New.
* config/arm/arm-mve-builtins-base.h (vpselq): New.
* config/arm/arm_mve.h (vpselq): Remove.
(vpselq_u8): Remove.
(vpselq_s8): Remove.
(vpselq_u16): Remove.
(vpselq_s16): Remove.
(vpselq_u32): Remove.
(vpselq_s32): Remove.
(vpselq_u64): Remove.
(vpselq_s64): Remove.
(vpselq_f16): Remove.
(vpselq_f32): Remove.
(__arm_vpselq_u8): Remove.
(__arm_vpselq_s8): Remove.
(__arm_vpselq_u16): Remove.
(__arm_vpselq_s16): Remove.
(__arm_vpselq_u32): Remove.
(__arm_vpselq_s32): Remove.
(__arm_vpselq_u64): Remove.
(__arm_vpselq_s64): Remove.
(__arm_vpselq_f16): Remove.
(__arm_vpselq_f32): Remove.
(__arm_vpselq): Remove.

15 months agoarm: [MVE intrinsics] add vpsel shape
Christophe Lyon [Tue, 28 Feb 2023 15:50:16 +0000 (15:50 +0000)]
arm: [MVE intrinsics] add vpsel shape

This patch adds the vpsel shape description.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
* config/arm/arm-mve-builtins-shapes.h (vpsel): New.

15 months agoarm: [MVE intrinsics] factorize vpselq
Christophe Lyon [Tue, 28 Feb 2023 15:49:58 +0000 (15:49 +0000)]
arm: [MVE intrinsics] factorize vpselq

Factorize vpselq builtins so that they use parameterized names.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
gen_mve_vpselq.
* config/arm/iterators.md (MVE_VPSELQ_F): New.
(mve_insn): Add vpsel.
* config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_<supf><mode>): ... this.
(@mve_vpselq_f<mode>): Rename into ...
(@mve_<mve_insn>q_f<mode>): ... this.

15 months agoarm: [MVE intrinsics] rework vfmaq vfmasq vfmsq
Christophe Lyon [Tue, 28 Feb 2023 14:37:26 +0000 (14:37 +0000)]
arm: [MVE intrinsics] rework vfmaq vfmasq vfmsq

Implement vfmaq, vfmasq, vfmsq using the new MVE builtins framework.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
* config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
* config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
* config/arm/arm-mve-builtins.cc
(function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
vfmsq.
* config/arm/arm_mve.h (vfmaq): Remove.
(vfmasq): Remove.
(vfmsq): Remove.
(vfmaq_m): Remove.
(vfmasq_m): Remove.
(vfmsq_m): Remove.
(vfmaq_f16): Remove.
(vfmaq_n_f16): Remove.
(vfmasq_n_f16): Remove.
(vfmsq_f16): Remove.
(vfmaq_f32): Remove.
(vfmaq_n_f32): Remove.
(vfmasq_n_f32): Remove.
(vfmsq_f32): Remove.
(vfmaq_m_f32): Remove.
(vfmaq_m_f16): Remove.
(vfmaq_m_n_f32): Remove.
(vfmaq_m_n_f16): Remove.
(vfmasq_m_n_f32): Remove.
(vfmasq_m_n_f16): Remove.
(vfmsq_m_f32): Remove.
(vfmsq_m_f16): Remove.
(__arm_vfmaq_f16): Remove.
(__arm_vfmaq_n_f16): Remove.
(__arm_vfmasq_n_f16): Remove.
(__arm_vfmsq_f16): Remove.
(__arm_vfmaq_f32): Remove.
(__arm_vfmaq_n_f32): Remove.
(__arm_vfmasq_n_f32): Remove.
(__arm_vfmsq_f32): Remove.
(__arm_vfmaq_m_f32): Remove.
(__arm_vfmaq_m_f16): Remove.
(__arm_vfmaq_m_n_f32): Remove.
(__arm_vfmaq_m_n_f16): Remove.
(__arm_vfmasq_m_n_f32): Remove.
(__arm_vfmasq_m_n_f16): Remove.
(__arm_vfmsq_m_f32): Remove.
(__arm_vfmsq_m_f16): Remove.
(__arm_vfmaq): Remove.
(__arm_vfmasq): Remove.
(__arm_vfmsq): Remove.
(__arm_vfmaq_m): Remove.
(__arm_vfmasq_m): Remove.
(__arm_vfmsq_m): Remove.

15 months agoarm: [MVE intrinsics] factorize vfmaq vfmsq vfmasq
Christophe Lyon [Tue, 28 Feb 2023 14:36:42 +0000 (14:36 +0000)]
arm: [MVE intrinsics] factorize vfmaq vfmsq vfmasq

Factorize vmvnq builtins so that they use parameterized names.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
VFMSQ_M_F.
(MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
(MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
(mve_insn): Add vfma, vfmas, vfms.
* config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
into ...
(@mve_<mve_insn>q_f<mode>): ... this.
(mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
(@mve_<mve_insn>q_n_f<mode>): ... this.
(mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
@mve_<mve_insn>q_m_f<mode>.
(mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
@mve_<mve_insn>q_m_n_f<mode>.

15 months agoarm: [MVE intrinsics] add ternary_opt_n shape
Christophe Lyon [Tue, 28 Feb 2023 14:37:06 +0000 (14:37 +0000)]
arm: [MVE intrinsics] add ternary_opt_n shape

This patch adds the ternary_opt_n shape description.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
* config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.

15 months agoarm: [MVE intrinsics] rework vmvnq
Christophe Lyon [Mon, 27 Feb 2023 18:50:53 +0000 (18:50 +0000)]
arm: [MVE intrinsics] rework vmvnq

Implement vmvnq using the new MVE builtins framework.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-base.cc
(FUNCTION_WITH_RTX_M_N_NO_F): New.
(vmvnq): New.
* config/arm/arm-mve-builtins-base.def (vmvnq): New.
* config/arm/arm-mve-builtins-base.h (vmvnq): New.
* config/arm/arm_mve.h (vmvnq): Remove.
(vmvnq_m): Remove.
(vmvnq_x): Remove.
(vmvnq_s8): Remove.
(vmvnq_s16): Remove.
(vmvnq_s32): Remove.
(vmvnq_n_s16): Remove.
(vmvnq_n_s32): Remove.
(vmvnq_u8): Remove.
(vmvnq_u16): Remove.
(vmvnq_u32): Remove.
(vmvnq_n_u16): Remove.
(vmvnq_n_u32): Remove.
(vmvnq_m_u8): Remove.
(vmvnq_m_s8): Remove.
(vmvnq_m_u16): Remove.
(vmvnq_m_s16): Remove.
(vmvnq_m_u32): Remove.
(vmvnq_m_s32): Remove.
(vmvnq_m_n_s16): Remove.
(vmvnq_m_n_u16): Remove.
(vmvnq_m_n_s32): Remove.
(vmvnq_m_n_u32): Remove.
(vmvnq_x_s8): Remove.
(vmvnq_x_s16): Remove.
(vmvnq_x_s32): Remove.
(vmvnq_x_u8): Remove.
(vmvnq_x_u16): Remove.
(vmvnq_x_u32): Remove.
(vmvnq_x_n_s16): Remove.
(vmvnq_x_n_s32): Remove.
(vmvnq_x_n_u16): Remove.
(vmvnq_x_n_u32): Remove.
(__arm_vmvnq_s8): Remove.
(__arm_vmvnq_s16): Remove.
(__arm_vmvnq_s32): Remove.
(__arm_vmvnq_n_s16): Remove.
(__arm_vmvnq_n_s32): Remove.
(__arm_vmvnq_u8): Remove.
(__arm_vmvnq_u16): Remove.
(__arm_vmvnq_u32): Remove.
(__arm_vmvnq_n_u16): Remove.
(__arm_vmvnq_n_u32): Remove.
(__arm_vmvnq_m_u8): Remove.
(__arm_vmvnq_m_s8): Remove.
(__arm_vmvnq_m_u16): Remove.
(__arm_vmvnq_m_s16): Remove.
(__arm_vmvnq_m_u32): Remove.
(__arm_vmvnq_m_s32): Remove.
(__arm_vmvnq_m_n_s16): Remove.
(__arm_vmvnq_m_n_u16): Remove.
(__arm_vmvnq_m_n_s32): Remove.
(__arm_vmvnq_m_n_u32): Remove.
(__arm_vmvnq_x_s8): Remove.
(__arm_vmvnq_x_s16): Remove.
(__arm_vmvnq_x_s32): Remove.
(__arm_vmvnq_x_u8): Remove.
(__arm_vmvnq_x_u16): Remove.
(__arm_vmvnq_x_u32): Remove.
(__arm_vmvnq_x_n_s16): Remove.
(__arm_vmvnq_x_n_s32): Remove.
(__arm_vmvnq_x_n_u16): Remove.
(__arm_vmvnq_x_n_u32): Remove.
(__arm_vmvnq): Remove.
(__arm_vmvnq_m): Remove.
(__arm_vmvnq_x): Remove.

15 months agoarm: [MVE intrinsics] factorize vmvnq
Christophe Lyon [Mon, 27 Feb 2023 18:50:28 +0000 (18:50 +0000)]
arm: [MVE intrinsics] factorize vmvnq

Factorize vmvnq builtins so that they use parameterized names.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/iterators.md (mve_insn): Add vmvn.
* config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_n_<supf><mode>): ... this.
(mve_vmvnq_m_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_m_<supf><mode>): ... this.
(mve_vmvnq_m_n_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_m_n_<supf><mode>): ... this.

15 months agoarm: [MVE intrinsics] add mvn shape
Christophe Lyon [Mon, 27 Feb 2023 18:50:04 +0000 (18:50 +0000)]
arm: [MVE intrinsics] add mvn shape

This patch adds the mvn shape description.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-shapes.cc (mvn): New.
* config/arm/arm-mve-builtins-shapes.h (mvn): New.

15 months agoarm: [MVE intrinsics] rework vbrsrq
Christophe Lyon [Mon, 27 Feb 2023 18:07:40 +0000 (18:07 +0000)]
arm: [MVE intrinsics] rework vbrsrq

Implement vbrsrq using the new MVE builtins framework.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
* config/arm/arm-mve-builtins-base.def (vbrsrq): New.
* config/arm/arm-mve-builtins-base.h (vbrsrq): New.
* config/arm/arm_mve.h (vbrsrq): Remove.
(vbrsrq_m): Remove.
(vbrsrq_x): Remove.
(vbrsrq_n_f16): Remove.
(vbrsrq_n_f32): Remove.
(vbrsrq_n_u8): Remove.
(vbrsrq_n_s8): Remove.
(vbrsrq_n_u16): Remove.
(vbrsrq_n_s16): Remove.
(vbrsrq_n_u32): Remove.
(vbrsrq_n_s32): Remove.
(vbrsrq_m_n_s8): Remove.
(vbrsrq_m_n_s32): Remove.
(vbrsrq_m_n_s16): Remove.
(vbrsrq_m_n_u8): Remove.
(vbrsrq_m_n_u32): Remove.
(vbrsrq_m_n_u16): Remove.
(vbrsrq_m_n_f32): Remove.
(vbrsrq_m_n_f16): Remove.
(vbrsrq_x_n_s8): Remove.
(vbrsrq_x_n_s16): Remove.
(vbrsrq_x_n_s32): Remove.
(vbrsrq_x_n_u8): Remove.
(vbrsrq_x_n_u16): Remove.
(vbrsrq_x_n_u32): Remove.
(vbrsrq_x_n_f16): Remove.
(vbrsrq_x_n_f32): Remove.
(__arm_vbrsrq_n_u8): Remove.
(__arm_vbrsrq_n_s8): Remove.
(__arm_vbrsrq_n_u16): Remove.
(__arm_vbrsrq_n_s16): Remove.
(__arm_vbrsrq_n_u32): Remove.
(__arm_vbrsrq_n_s32): Remove.
(__arm_vbrsrq_m_n_s8): Remove.
(__arm_vbrsrq_m_n_s32): Remove.
(__arm_vbrsrq_m_n_s16): Remove.
(__arm_vbrsrq_m_n_u8): Remove.
(__arm_vbrsrq_m_n_u32): Remove.
(__arm_vbrsrq_m_n_u16): Remove.
(__arm_vbrsrq_x_n_s8): Remove.
(__arm_vbrsrq_x_n_s16): Remove.
(__arm_vbrsrq_x_n_s32): Remove.
(__arm_vbrsrq_x_n_u8): Remove.
(__arm_vbrsrq_x_n_u16): Remove.
(__arm_vbrsrq_x_n_u32): Remove.
(__arm_vbrsrq_n_f16): Remove.
(__arm_vbrsrq_n_f32): Remove.
(__arm_vbrsrq_m_n_f32): Remove.
(__arm_vbrsrq_m_n_f16): Remove.
(__arm_vbrsrq_x_n_f16): Remove.
(__arm_vbrsrq_x_n_f32): Remove.
(__arm_vbrsrq): Remove.
(__arm_vbrsrq_m): Remove.
(__arm_vbrsrq_x): Remove.

15 months agoarm: [MVE intrinsics] factorize vrbsrq
Christophe Lyon [Mon, 27 Feb 2023 18:06:41 +0000 (18:06 +0000)]
arm: [MVE intrinsics] factorize vrbsrq

Factorize vrbsrq builtins so that they use parameterized names.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
(mve_insn): Add vbrsr.
* config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
(@mve_<mve_insn>q_n_f<mode>): ... this.
(mve_vbrsrq_n_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_n_<supf><mode>): ... this.
(mve_vbrsrq_m_n_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
(mve_vbrsrq_m_n_f<mode>): Rename into ...
(@mve_<mve_insn>q_m_n_f<mode>): ... this.

15 months agoarm: [MVE intrinsics] add binary_imm32 shape
Christophe Lyon [Mon, 27 Feb 2023 18:25:32 +0000 (18:25 +0000)]
arm: [MVE intrinsics] add binary_imm32 shape

This patch adds the binary_imm32 shape description.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
* config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.

15 months agoarm: [MVE intrinsics] rework vqshluq
Christophe Lyon [Mon, 27 Feb 2023 14:13:47 +0000 (14:13 +0000)]
arm: [MVE intrinsics] rework vqshluq

Implement vqshluq using the new MVE builtins framework.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-base.cc (vqshluq): New.
* config/arm/arm-mve-builtins-base.def (vqshluq): New.
* config/arm/arm-mve-builtins-base.h (vqshluq): New.
* config/arm/arm_mve.h (vqshluq): Remove.
(vqshluq_m): Remove.
(vqshluq_n_s8): Remove.
(vqshluq_n_s16): Remove.
(vqshluq_n_s32): Remove.
(vqshluq_m_n_s8): Remove.
(vqshluq_m_n_s16): Remove.
(vqshluq_m_n_s32): Remove.
(__arm_vqshluq_n_s8): Remove.
(__arm_vqshluq_n_s16): Remove.
(__arm_vqshluq_n_s32): Remove.
(__arm_vqshluq_m_n_s8): Remove.
(__arm_vqshluq_m_n_s16): Remove.
(__arm_vqshluq_m_n_s32): Remove.
(__arm_vqshluq): Remove.
(__arm_vqshluq_m): Remove.

15 months agoarm: [MVE intrinsics] factorize vqshluq
Christophe Lyon [Mon, 27 Feb 2023 14:13:00 +0000 (14:13 +0000)]
arm: [MVE intrinsics] factorize vqshluq

Factorize vqshluq builtins so that they use parameterized names.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/iterators.md (mve_insn): Add vqshlu.
(supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
(VQSHLUQ_M_N, VQSHLUQ_N): New.
* config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
(@mve_<mve_insn>q_n_<supf><mode>): ... this.
(mve_vqshluq_m_n_s<mode>): Change name into ...
(@mve_<mve_insn>q_m_n_<supf><mode>): ... this.

15 months agoarm: [MVE intrinsics] add binary_lshift_unsigned shape
Christophe Lyon [Mon, 27 Feb 2023 14:13:26 +0000 (14:13 +0000)]
arm: [MVE intrinsics] add binary_lshift_unsigned shape

This patch adds the binary_lshift_unsigned shape description.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-shapes.cc
(binary_lshift_unsigned): New.
* config/arm/arm-mve-builtins-shapes.h
(binary_lshift_unsigned): New.

15 months agoarm: [MVE intrinsics] rework vrmlaldavhaq vrmlaldavhaxq vrmlsldavhaq vrmlsldavhaxq
Christophe Lyon [Mon, 27 Feb 2023 12:38:31 +0000 (12:38 +0000)]
arm: [MVE intrinsics] rework vrmlaldavhaq vrmlaldavhaxq vrmlsldavhaq vrmlsldavhaxq

Implement vrmlaldavhaq, vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq
using the new MVE builtins framework.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
(vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
* config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
(vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
* config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
(vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
* config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
* config/arm/arm_mve.h (vrmlaldavhaq): Remove.
(vrmlaldavhaxq): Remove.
(vrmlsldavhaq): Remove.
(vrmlsldavhaxq): Remove.
(vrmlaldavhaq_p): Remove.
(vrmlaldavhaxq_p): Remove.
(vrmlsldavhaq_p): Remove.
(vrmlsldavhaxq_p): Remove.
(vrmlaldavhaq_s32): Remove.
(vrmlaldavhaq_u32): Remove.
(vrmlaldavhaxq_s32): Remove.
(vrmlsldavhaq_s32): Remove.
(vrmlsldavhaxq_s32): Remove.
(vrmlaldavhaq_p_s32): Remove.
(vrmlaldavhaq_p_u32): Remove.
(vrmlaldavhaxq_p_s32): Remove.
(vrmlsldavhaq_p_s32): Remove.
(vrmlsldavhaxq_p_s32): Remove.
(__arm_vrmlaldavhaq_s32): Remove.
(__arm_vrmlaldavhaq_u32): Remove.
(__arm_vrmlaldavhaxq_s32): Remove.
(__arm_vrmlsldavhaq_s32): Remove.
(__arm_vrmlsldavhaxq_s32): Remove.
(__arm_vrmlaldavhaq_p_s32): Remove.
(__arm_vrmlaldavhaq_p_u32): Remove.
(__arm_vrmlaldavhaxq_p_s32): Remove.
(__arm_vrmlsldavhaq_p_s32): Remove.
(__arm_vrmlsldavhaxq_p_s32): Remove.
(__arm_vrmlaldavhaq): Remove.
(__arm_vrmlaldavhaxq): Remove.
(__arm_vrmlsldavhaq): Remove.
(__arm_vrmlsldavhaxq): Remove.
(__arm_vrmlaldavhaq_p): Remove.
(__arm_vrmlaldavhaxq_p): Remove.
(__arm_vrmlsldavhaq_p): Remove.
(__arm_vrmlsldavhaxq_p): Remove.

15 months agoarm: [MVE intrinsics] factorize vrmlaldavhaq vrmlaldavhaxq vrmlsldavhaq vrmlsldavhaxq
Christophe Lyon [Mon, 27 Feb 2023 12:37:41 +0000 (12:37 +0000)]
arm: [MVE intrinsics] factorize vrmlaldavhaq vrmlaldavhaxq vrmlsldavhaq vrmlsldavhaxq

Factorize vrmlaldavhaq, vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq
builtins so that they use the same parameterized names.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
(MVE_VRMLxLDAVHAxQ_P): New.
(mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
vrmlsldavhax.
(supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
VRMLALDAVHAQ_P_S.
* config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
(mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
(mve_vrmlsldavhaq_sv4si): Merge into ...
(@mve_<mve_insn>q_<supf>v4si): ... this.
(mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
(mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
(mve_vrmlsldavhaxq_p_sv4si): Merge into ...
(@mve_<mve_insn>q_p_<supf>v4si): ... this.

15 months agoarm: [MVE intrinsics] rework vqdmullbq vqdmulltq
Christophe Lyon [Mon, 27 Feb 2023 10:34:04 +0000 (10:34 +0000)]
arm: [MVE intrinsics] rework vqdmullbq vqdmulltq

Implement vqdmullbq, vqdmulltq using the new MVE builtins framework.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
* config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
New.
* config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
* config/arm/arm_mve.h (vqdmulltq): Remove.
(vqdmullbq): Remove.
(vqdmullbq_m): Remove.
(vqdmulltq_m): Remove.
(vqdmulltq_s16): Remove.
(vqdmulltq_n_s16): Remove.
(vqdmullbq_s16): Remove.
(vqdmullbq_n_s16): Remove.
(vqdmulltq_s32): Remove.
(vqdmulltq_n_s32): Remove.
(vqdmullbq_s32): Remove.
(vqdmullbq_n_s32): Remove.
(vqdmullbq_m_n_s32): Remove.
(vqdmullbq_m_n_s16): Remove.
(vqdmullbq_m_s32): Remove.
(vqdmullbq_m_s16): Remove.
(vqdmulltq_m_n_s32): Remove.
(vqdmulltq_m_n_s16): Remove.
(vqdmulltq_m_s32): Remove.
(vqdmulltq_m_s16): Remove.
(__arm_vqdmulltq_s16): Remove.
(__arm_vqdmulltq_n_s16): Remove.
(__arm_vqdmullbq_s16): Remove.
(__arm_vqdmullbq_n_s16): Remove.
(__arm_vqdmulltq_s32): Remove.
(__arm_vqdmulltq_n_s32): Remove.
(__arm_vqdmullbq_s32): Remove.
(__arm_vqdmullbq_n_s32): Remove.
(__arm_vqdmullbq_m_n_s32): Remove.
(__arm_vqdmullbq_m_n_s16): Remove.
(__arm_vqdmullbq_m_s32): Remove.
(__arm_vqdmullbq_m_s16): Remove.
(__arm_vqdmulltq_m_n_s32): Remove.
(__arm_vqdmulltq_m_n_s16): Remove.
(__arm_vqdmulltq_m_s32): Remove.
(__arm_vqdmulltq_m_s16): Remove.
(__arm_vqdmulltq): Remove.
(__arm_vqdmullbq): Remove.
(__arm_vqdmullbq_m): Remove.
(__arm_vqdmulltq_m): Remove.

15 months agoarm: [MVE intrinsics] factorize vqdmullbq vqdmulltq
Christophe Lyon [Mon, 27 Feb 2023 10:33:21 +0000 (10:33 +0000)]
arm: [MVE intrinsics] factorize vqdmullbq vqdmulltq

Factorize vqdmullbq, vqdmulltq builtins so that they use the same
parameterized names.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
(MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
(mve_insn): Add vqdmullb, vqdmullt.
(supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
VQDMULLTQ_N_S.
* config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
(mve_vqdmulltq_n_s<mode>): Merge into ...
(@mve_<mve_insn>q_n_<supf><mode>): ... this.
(mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
(@mve_<mve_insn>q_<supf><mode>): ... this.
(mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
...
(@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
(mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
(@mve_<mve_insn>q_m_<supf><mode>): ... this.

15 months agoarm: [MVE intrinsics] add binary_widen_opt_n shape
Christophe Lyon [Mon, 27 Feb 2023 10:32:55 +0000 (10:32 +0000)]
arm: [MVE intrinsics] add binary_widen_opt_n shape

This patch adds the binary_widen_opt_n shape description.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
* config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.

15 months agoRISC-V: Suppress unused parameter warning in riscv-common.cc
Kito Cheng [Fri, 12 May 2023 08:54:57 +0000 (16:54 +0800)]
RISC-V: Suppress unused parameter warning in riscv-common.cc

gcc/ChangeLog:

* common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
Drop unused parameter.
(riscv_select_multilib): Ditto.
(riscv_compute_multilib): Update call site of
riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.

15 months agolibgomp testsuite: Generalize 'lang_library_path' into a list of 'lang_library_paths'
Thomas Schwinge [Sun, 2 Nov 2014 16:49:31 +0000 (17:49 +0100)]
libgomp testsuite: Generalize 'lang_library_path' into a list of 'lang_library_paths'

..., and use that for libquadmath, too.

libgomp/
* testsuite/lib/libgomp.exp (libgomp_target_compile): Generalize
'lang_library_path' into a list of 'lang_library_paths'.
* testsuite/libgomp.c++/c++.exp: Adjust.
* testsuite/libgomp.oacc-c++/c++.exp: Likewise.
* testsuite/libgomp.fortran/fortran.exp: Adjust.  Use that for
libquadmath, too.
* testsuite/libgomp.oacc-fortran/fortran.exp: Likewise.

15 months agolibgomp testsuite: Get rid of 'lang_test_file_found'
Thomas Schwinge [Sat, 1 Nov 2014 15:25:26 +0000 (16:25 +0100)]
libgomp testsuite: Get rid of 'lang_test_file_found'

Instead, 'return' early from the '*.exp' files that we're not able to test.
Also, change 'puts' into 'verbose -log'.  While re-indenting the previous
'if { $lang_test_file_found } { [...] }' code, also simplify 'ld_library_path'
setup.

libgomp/
* testsuite/lib/libgomp.exp (libgomp_target_compile): Don't look
at 'lang_test_file_found'.
* testsuite/libgomp.c++/c++.exp: Don't set and use it, and instead
'return' early if not able to test.  Simplify 'ld_library_path' setup.
* testsuite/libgomp.fortran/fortran.exp: Likewise.
* testsuite/libgomp.oacc-c++/c++.exp: Likewise.
* testsuite/libgomp.oacc-fortran/fortran.exp: Likewise.

15 months agolibgomp C++, Fortran testsuites: Resolve 'lang_test_file_found' first
Thomas Schwinge [Sat, 1 Nov 2014 15:25:26 +0000 (16:25 +0100)]
libgomp C++, Fortran testsuites: Resolve 'lang_test_file_found' first

libgomp/
* testsuite/libgomp.c++/c++.exp: Resolve 'lang_test_file_found'
first.
* testsuite/libgomp.fortran/fortran.exp: Likewise.
* testsuite/libgomp.oacc-c++/c++.exp: Likewise.
* testsuite/libgomp.oacc-fortran/fortran.exp: Likewise.

15 months agolibgomp testsuite: Localize 'lang_[...]' etc.
Thomas Schwinge [Tue, 9 May 2023 08:09:35 +0000 (10:09 +0200)]
libgomp testsuite: Localize 'lang_[...]' etc.

..., instead of letting them bleed into the next '*.exp' file, requiring
clean-up there.

libgomp/
* testsuite/libgomp.c++/c++.exp: Localize 'lang_[...]' etc.
* testsuite/libgomp.c/c.exp: Likewise.
* testsuite/libgomp.fortran/fortran.exp: Likewise.
* testsuite/libgomp.graphite/graphite.exp: Likewise.
* testsuite/libgomp.oacc-c++/c++.exp: Likewise.
* testsuite/libgomp.oacc-c/c.exp: Likewise.
* testsuite/libgomp.oacc-fortran/fortran.exp: Likewise.

15 months agoRISC-V: Fix fail of vmv-imm-rv64.c in rv32
Juzhe Zhong [Fri, 12 May 2023 06:38:46 +0000 (14:38 +0800)]
RISC-V: Fix fail of vmv-imm-rv64.c in rv32

After update local codebase to the trunk. I realize there is one more
fail in RV32.
After this patch, all fails of RVV are cleaned up.
Thanks.

FAIL: gcc.target/riscv/rvv/autovec/vmv-imm-rv64.c -O3 -ftree-vectorize
(test for excess errors)
Excess errors:
cc1: error: ABI requires '-march=rv32'

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vmv-imm-rv64.c: Add ABI

Signed-off-by: Juzhe Zhong <juzhe.zhong@rivai.ai>
15 months agoRISC-V: Add basic vec_init for VLS RVV auto-vectorization
Juzhe Zhong [Fri, 12 May 2023 03:09:18 +0000 (11:09 +0800)]
RISC-V: Add basic vec_init for VLS RVV auto-vectorization

typedef int8_t vnx16qi __attribute__((vector_size (16)));

typedef int8_t vnx16qi __attribute__ ((vector_size (16)));
typedef int8_t vnx32qi __attribute__ ((vector_size (32)));
typedef int8_t vnx64qi __attribute__ ((vector_size (64)));
typedef int8_t vnx128qi __attribute__ ((vector_size (128)));

__attribute__ ((noipa)) void
f_vnx128qi (int8_t a, int8_t b, int8_t c, int8_t d, int8_t e, int8_t f,
int8_t g, int8_t h, int8_t *out)
{
  vnx128qi v
    = {a, b, c, d, e, f, g, h, a, b, c, d, e, f, g, h,
       a, b, c, d, e, f, g, h, a, b, c, d, e, f, g, h,
       a, b, c, d, e, f, g, h, a, b, c, d, e, f, g, h,
       a, b, c, d, e, f, g, h, a, b, c, d, e, f, g, h,
       a, b, c, d, e, f, g, h, a, b, c, d, e, f, g, h,
       a, b, c, d, e, f, g, h, a, b, c, d, e, f, g, h,
       a, b, c, d, e, f, g, h, a, b, c, d, e, f, g, h,
       a, b, c, d, e, f, g, h, a, b, c, d, e, f, g, h};
  *(vnx128qi *) out = v;
}

This patch codegen:
f_vnx128qi:
        andi    a1,a1,0xff
        andi    a0,a0,0xff
        slli    a1,a1,8
        andi    a2,a2,0xff
        or      a1,a1,a0
        slli    a2,a2,16
        andi    a3,a3,0xff
        or      a2,a2,a1
        slli    a3,a3,24
        andi    a4,a4,0xff
        or      a3,a3,a2
        slli    a4,a4,32
        andi    a5,a5,0xff
        or      a4,a4,a3
        slli    a5,a5,40
        andi    a6,a6,0xff
        or      a5,a5,a4
        slli    a6,a6,48
        or      a6,a6,a5
        vsetvli a5,zero,e64,m8,ta,ma
        ld      a5,0(sp)
        slli    a7,a7,56
        or      a7,a7,a6
        vmv.v.x v8,a7
        vs8r.v  v8,0(a5)
        ret

We support more optimizations cases in the future. But they are not
included in this patch.

Signed-off-by: Juzhe Zhong <juzhe.zhong@rivai.ai>
gcc/ChangeLog:

* config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
* config/riscv/riscv-protos.h (expand_vec_init): New function.
* config/riscv/riscv-v.cc (class rvv_builder): New class.
(rvv_builder::can_duplicate_repeating_sequence_p): New function.
(rvv_builder::get_merged_repeating_sequence): Ditto.
(expand_vector_init_insert_elems): Ditto.
(expand_vec_init): Ditto.
* config/riscv/vector-iterators.md: New attribute.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/rvv.exp:
* gcc.target/riscv/rvv/autovec/vls-vlmax/insert-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/insert-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/insert-3.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/insert_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/insert_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/repeat-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/repeat-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/repeat-3.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/repeat-4.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/repeat-5.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/repeat-6.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/repeat_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/repeat_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/repeat_run-3.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/repeat_run-4.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/repeat_run-5.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/repeat_run-6.c: New test.

15 months agoRISC-V: Reorganize binary autovec testcases
Pan Li [Fri, 12 May 2023 02:27:56 +0000 (10:27 +0800)]
RISC-V: Reorganize binary autovec testcases

1. This patch is moving binary autovec testcases into binop directory to
   make it
easier to maintain.

2. Current binary autovec only tested in LMUL = 1, enable testing in
   LMUL = 2/4/8.

Tested on both rv32/rv64, with no fails in RVV.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/shift-run-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/shift-run-template.h: ...here.
* gcc.target/riscv/rvv/autovec/shift-run.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/shift-run.c: ...here.
* gcc.target/riscv/rvv/autovec/shift-rv32gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/shift-rv32gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/shift-rv64gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/shift-rv64gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/shift-scalar-run.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/shift-scalar-run.c: ...here.
* gcc.target/riscv/rvv/autovec/shift-scalar-rv32gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/shift-scalar-rv32gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/shift-scalar-rv64gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/shift-scalar-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h: ...here.
* gcc.target/riscv/rvv/autovec/shift-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/shift-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vadd-run-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vadd-run-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vadd-run.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vadd-run.c: ...here.
* gcc.target/riscv/rvv/autovec/vadd-rv32gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vadd-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vadd-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vand-run-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vand-run-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vand-run.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vand-run.c: ...here.
* gcc.target/riscv/rvv/autovec/vand-rv32gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vand-rv32gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vand-rv64gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vand-rv64gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vand-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vand-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vdiv-run-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vdiv-run-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vdiv-run.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vdiv-run.c: ...here.
* gcc.target/riscv/rvv/autovec/vdiv-rv32gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vdiv-rv32gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vdiv-rv64gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vdiv-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vdiv-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vmax-run-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vmax-run-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vmax-run.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vmax-run.c: ...here.
* gcc.target/riscv/rvv/autovec/vmax-rv32gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vmax-rv32gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vmax-rv64gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vmax-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vmax-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vmin-run-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vmin-run-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vmin-run.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vmin-run.c: ...here.
* gcc.target/riscv/rvv/autovec/vmin-rv32gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vmin-rv32gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vmin-rv64gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vmin-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vmin-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vmul-run-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vmul-run-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vmul-run.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vmul-run.c: ...here.
* gcc.target/riscv/rvv/autovec/vmul-rv32gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vmul-rv64gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vmul-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vmul-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vor-run-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vor-run-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vor-run.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vor-run.c: ...here.
* gcc.target/riscv/rvv/autovec/vor-rv32gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vor-rv32gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vor-rv64gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vor-rv64gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vor-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vor-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vrem-run-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vrem-run-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vrem-run.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vrem-run.c: ...here.
* gcc.target/riscv/rvv/autovec/vrem-rv32gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vrem-rv64gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vrem-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vrem-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vsub-run-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vsub-run-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vsub-run.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vsub-run.c: ...here.
* gcc.target/riscv/rvv/autovec/vsub-rv32gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vsub-rv32gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vsub-rv64gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vsub-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vsub-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vxor-run-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vxor-run-template.h: ...here.
* gcc.target/riscv/rvv/autovec/vxor-run.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vxor-run.c: ...here.
* gcc.target/riscv/rvv/autovec/vxor-rv32gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vxor-rv32gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vxor-rv64gcv.c: ...here.
* gcc.target/riscv/rvv/autovec/vxor-template.h: Moved to...
* gcc.target/riscv/rvv/autovec/binop/vxor-template.h: ...here.
* gcc.target/riscv/rvv/rvv.exp: Add autovec LMUL = 2/4/8 for binary.

Signed-off-by: Juzhe Zhong <juzhe.zhong@rivai.ai>
15 months agoRISC-V: Fix RVV binary auto-vectorizaiton test fails
Pan Li [Fri, 12 May 2023 02:21:51 +0000 (10:21 +0800)]
RISC-V: Fix RVV binary auto-vectorizaiton test fails

In rv32:
FAIL: gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmin-run.c -O3 -ftree-vectorize (test
for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vand-run.c -O3 -ftree-vectorize (test
for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vrem-run.c -O3 -ftree-vectorize (test
for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmul-run.c -O3 -ftree-vectorize (test
for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/shift-run.c -O3 -ftree-vectorize
(test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vand-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vdiv-run.c -O3 -ftree-vectorize (test
for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vor-run.c -O3 -ftree-vectorize (test
for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/shift-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/shift-scalar-run.c -O3
-ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmax-run.c -O3 -ftree-vectorize (test
for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vor-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)

In rv64:
FAIL: gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)

Signed-off-by: Juzhe Zhong <juzhe.zhong@rivai.ai>
gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/shift-run.c: Fix fail.
* gcc.target/riscv/rvv/autovec/shift-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/shift-scalar-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vand-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vand-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vdiv-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmax-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmin-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmul-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vor-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vor-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vrem-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vxor-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c: Ditto.

15 months agors6000: Change ilp32 target check for scalar-extract-sig and scalar-insert-exp test...
Haochen Gui [Thu, 11 May 2023 02:13:06 +0000 (10:13 +0800)]
rs6000: Change ilp32 target check for scalar-extract-sig and scalar-insert-exp test cases

gcc/testsuite/
* gcc.target/powerpc/bfp/scalar-extract-sig-2.c: Replace ilp32 check
with dg-skip-if has_arch_ppc64.
* gcc.target/powerpc/bfp/scalar-insert-exp-2.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-5.c: Likewise.

15 months agors6000: Change mode and insn condition for scalar insert exp instruction
Haochen Gui [Thu, 11 May 2023 02:10:50 +0000 (10:10 +0800)]
rs6000: Change mode and insn condition for scalar insert exp instruction

gcc/
* config/rs6000/rs6000-builtins.def
(__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
to xsiexpdp_di.
(__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
xsiexpdpf to xsiexpdpf_di.
* config/rs6000/vsx.md (xsiexpdp): Rename to...
(xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
replace TARGET_64BIT with TARGET_POWERPC64.
(xsiexpdpf): Rename to...
(xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
replace TARGET_64BIT with TARGET_POWERPC64.

gcc/testsuite/
* gcc.target/powerpc/bfp/scalar-insert-exp-0.c: Replace lp64 check
with has_arch_ppc64.
* gcc.target/powerpc/bfp/scalar-insert-exp-1.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-12.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-13.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-3.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-4.c: Likewise.

15 months agors6000: Change mode and insn condition for scalar extract sig instruction
Haochen Gui [Thu, 11 May 2023 02:08:57 +0000 (10:08 +0800)]
rs6000: Change mode and insn condition for scalar extract sig instruction

gcc/
* config/rs6000/rs6000-builtins.def
(__builtin_vsx_scalar_extract_sig): Set return type to const signed
long long.
* config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
TARGET_POWERPC64.

gcc/testsuite/
* gcc.target/powerpc/bfp/scalar-extract-sig-0.c: Replace lp64 check
with has_arch_ppc64.
* gcc.target/powerpc/bfp/scalar-extract-sig-1.c: Likewise.
* gcc.target/powerpc/bfp/scalar-extract-sig-6.c: Likewise.

15 months agors6000: Change mode and insn condition for scalar extract exp instruction
Haochen Gui [Thu, 11 May 2023 02:07:01 +0000 (10:07 +0800)]
rs6000: Change mode and insn condition for scalar extract exp instruction

gcc/
* config/rs6000/rs6000-builtins.def
(__builtin_vsx_scalar_extract_exp): Set return type to const signed
int and set its bif-pattern to xsxexpdp_si, move it from power9-64
to power9 catalog.
* config/rs6000/vsx.md (xsxexpdp): Rename to ...
(xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
TARGET_64BIT check.
* doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
requirement when it has a 64-bit argument.

gcc/testsuite/
* gcc.target/powerpc/bfp/scalar-extract-exp-0.c: Remove lp64 check.
* gcc.target/powerpc/bfp/scalar-extract-exp-1.c: Likewise.
* gcc.target/powerpc/bfp/scalar-extract-exp-2.c: Delete as the case
is invalid now.
* gcc.target/powerpc/bfp/scalar-extract-exp-6.c: Remove lp64 check.

15 months agoVar-Tracking: Typedef pointer_mux<tree_node, rtx_def> as decl_or_value
Pan Li [Thu, 11 May 2023 06:12:51 +0000 (14:12 +0800)]
Var-Tracking: Typedef pointer_mux<tree_node, rtx_def> as decl_or_value

The decl_or_value is defined as void * before this PATCH. It will take
care of both the tree_node and rtx_def. Unfortunately, given a void
pointer cannot tell the input is tree_node or rtx_def.

Then we have some implicit structure layout requirement similar as
below. Or we will touch unreasonable bits when cast void * to tree_node
or rtx_def.

+--------+-----------+----------+
| offset | tree_node | rtx_def  |
+--------+-----------+----------+
|      0 | code: 16  | code: 16 | <- require the same location and bitssize
+--------+-----------+----------+
|     16 | ...       | mode: 8  |
+--------+-----------+----------+
| ...                           |
+--------+-----------+----------+
|     24 | ...       | ...      |
+--------+-----------+----------+

This behavior blocks the PATCH that extend the rtx_def mode from 8 to
16 bits for running out of machine mode. This PATCH introduced the
pointer_mux to tell the input is tree_node or rtx_def, and decouple
the above implicit dependency.

Signed-off-by: Pan Li <pan2.li@intel.com>
Co-Authored-By: Richard Sandiford <richard.sandiford@arm.com>
Co-Authored-By: Richard Biener <rguenther@suse.de>
Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
gcc/ChangeLog:

* mux-utils.h: Add overload operator == and != for pointer_mux.
* var-tracking.cc: Included mux-utils.h for pointer_tmux.
(decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
(dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
(dv_as_decl): Ditto.
(dv_as_opaque): Removed due to unnecessary.
(struct variable_hasher): Take decl_or_value as compare_type.
(variable_hasher::equal): Diito.
(dv_from_decl): Reconciled to the new type, aka pointer_mux.
(dv_from_value): Ditto.
(attrs_list_member):  Ditto.
(vars_copy): Ditto.
(var_reg_decl_set): Ditto.
(var_reg_delete_and_set): Ditto.
(find_loc_in_1pdv): Ditto.
(canonicalize_values_star): Ditto.
(variable_post_merge_new_vals): Ditto.
(dump_onepart_variable_differences): Ditto.
(variable_different_p): Ditto.
(set_slot_part): Ditto.
(clobber_slot_part): Ditto.
(clobber_variable_part): Ditto.

15 months agoDaily bump.
GCC Administrator [Fri, 12 May 2023 00:18:12 +0000 (00:18 +0000)]
Daily bump.

15 months agoPR modula2/109810 ICE fix when an array is assigned by a larger string
Gaius Mulley [Thu, 11 May 2023 23:15:28 +0000 (00:15 +0100)]
PR modula2/109810 ICE fix when an array is assigned by a larger string

This patch fixes an ICE when an array variable is assigned with
a string which exceeds the array size.  It improves the accuracy
of the virtual token used to indicate the error message.

gcc/m2/ChangeLog:

PR modula2/109810
* gm2-compiler/M2ALU.mod (ConvertConstToType): Use
PrepareCopyString in place of DoCopyString.
* gm2-compiler/M2GenGCC.def (DoCopyString): Rename to ...
(PrepareCopyString): ... this.
* gm2-compiler/M2GenGCC.mod (CodeStatement): Call CodeReturnValue
with a single parameter.  Call CodeXIndr with a single parameter.
(CodeReturnValue): Remove parameters and replace with a single
quadno.  Reimplement using PrepareCopyString.  Issue error
if the string exceeds designator space.
(DoCopyString): Reimplement and rename to ...
(PrepareCopyString): ... this.
(CodeXIndr): Remove parameters and replace with a single
quadno.  Reimplement using PrepareCopyString.  Issue error
if the string exceeds designator space.
(CodeBecomes): Remove parameters and replace with a single
quadno.  Reimplement using PrepareCopyString.  Issue error
if the string exceeds designator space.
* gm2-compiler/M2Quads.def (BuildReturn): Rename parameter to
tokreturn.
* gm2-compiler/M2Quads.mod (BuildReturn): Rename parameter to
tokreturn.  Rename tokno to tokcombined.

gcc/testsuite/ChangeLog:

PR modula2/109810
* gm2/pim/fail/highice.mod: New test.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
15 months agoc++: 'mutable' subobject of constexpr variable [PR109745]
Patrick Palka [Thu, 11 May 2023 20:31:33 +0000 (16:31 -0400)]
c++: 'mutable' subobject of constexpr variable [PR109745]

r13-2701-g7107ea6fb933f1 made us correctly accept during constexpr
evaluation 'mutable' member accesses of objects constructed during
that evaluation, while continuing to reject such accesses for constexpr
objects constructed outside of that evaluation, by considering the
CONSTRUCTOR_MUTABLE_POISON flag during cxx_eval_component_reference.

However, this flag is set only for the outermost CONSTRUCTOR of a
constexpr variable initializer, so if we're accessing a 'mutable' member
of a nested CONSTRUCTOR, the flag won't be set and we won't reject the
access.  This can lead to us accepting invalid code, as in the first
testcase, or even wrong code generation due to our speculative constexpr
evaluation, as in the second and third testcase.

This patch fixes this by setting CONSTRUCTOR_MUTABLE_POISON recursively
rather than only on the outermost CONSTRUCTOR.

PR c++/109745

gcc/cp/ChangeLog:

* typeck2.cc (poison_mutable_constructors): Define.
(store_init_value): Use it instead of setting
CONSTRUCTOR_MUTABLE_POISON directly.

gcc/testsuite/ChangeLog:

* g++.dg/cpp0x/constexpr-mutable4.C: New test.
* g++.dg/cpp0x/constexpr-mutable5.C: New test.
* g++.dg/cpp1y/constexpr-mutable2.C: New test.

15 months agolibstdc++: Use RAII types in strtod-based std::from_chars implementation
Jonathan Wakely [Thu, 4 May 2023 14:22:07 +0000 (15:22 +0100)]
libstdc++: Use RAII types in strtod-based std::from_chars implementation

This adds auto_locale and auto_ferounding types to use RAII for changing
and restoring the local and floating-point environment when using strtod
to implement std::from_chars.

The destructors for the RAII objects run slightly later than the
previous statements that restored the locale/fenv, but the differences
are just some trivial assignments and an isinf call.

Reviewed-by: Patrick Palka <ppalka@redhat.com>
libstdc++-v3/ChangeLog:

* src/c++17/floating_from_chars.cc [USE_STRTOD_FOR_FROM_CHARS]
(auto_locale, auto_ferounding): New class types.
(from_chars_impl): Use auto_locale and auto_ferounding.

15 months agolibstdc++: Fix chrono::hh_mm_ss::subseconds() [PR109772]
Jonathan Wakely [Wed, 10 May 2023 15:15:03 +0000 (16:15 +0100)]
libstdc++: Fix chrono::hh_mm_ss::subseconds() [PR109772]

I borked the logic in r13-4526-g5329e1a8e1480d so that the selected
partial specialization of hh_mm_ss::__subseconds might not be able to
represent the correct number of subseconds. This can result in a
truncated value being stored for the subseconds, e.g., 4755859375 gets
truncated to 460892079 because the correct value doesn't fit in
uint_least32_t.

Instead of checking whether the maximum value of the incoming duration
type can be represented, we would need to check whether that maximum value
can be represented after being converted to the correct precision type:

       template<typename _Tp>
         static constexpr bool __fits
           = duration_cast<precision>(_Duration::max()).count()
               <= duration_values<_Tp>::max();

However, this can fail to compile, due to integer overflow in the
constexpr multiplications. Instead, we could limit the check to the case
where the incoming duration has the same period as the precision, where
no conversion is needed and so no overflow can happen. But that seems of
very limited value, as it would only benefit specializations like
hh_mm_ss<duration<int, std::pico>>, which can only represent a
time-of-day between -00:00:00.0215 and +00:00:00.0215 measured in
picoseconds!

Additionally, the hh_mm_ss::__subseconds partial specializations do not
have disjoint constraints, so that some hh_mm_ss specializations result
in ambiguities tying to match a __subseconds partial specialization.

The most practical fix is to just stop using the __fits variable
template in the constraints of the partial specializations. This fixes
the truncated values by not selecting an inappropriate partial
specialization, and fixes the ambiguous match by ensuring the
constraints are disjoint.

Fixing this changes the layout of some specializations, so is an ABI
change. It only affects specializations that have a small (less than
64-bit) representation type and either a very small period (e.g. like
the picosecond specialization above) or a non-power-of-ten period like
ratio<1, 1024>.  For example both hh_mm_ss<duration<int, std::pico>> and
hh_mm_ss<duration<int, ratio<1, 1024>> are affected (increasing from 16
bytes to 24 on x86_64), but hh_mm_ss<duration<int, ratio<1, 1000>> and
hh_mm_ss<duration<long, ratio<1, 1024>> are not affected.

libstdc++-v3/ChangeLog:

PR libstdc++/109772
* include/std/chrono (hh_mm_ss::__fits): Remove variable
template.
(hh_mm_ss::__subseconds): Remove __fits from constraints.
* testsuite/std/time/hh_mm_ss/109772.cc: New test.
* testsuite/std/time/hh_mm_ss/1.cc: Adjust expected size for
hh_mm_ss<duration<int, std::pico>>.

15 months agolibstdc++: Enforce value_type consistency in strings and streams
Jonathan Wakely [Wed, 10 May 2023 20:30:10 +0000 (21:30 +0100)]
libstdc++: Enforce value_type consistency in strings and streams

P1463R1 made it ill-formed for allocator-aware containers (including
std::basic_string) to use an allocator that has a different value_type
from the container itself. We already enforce that for other containers
(since r8-4828-g866e4d3853ccc0), but not for std::basic_string. We
traditionally accepted it as an extension and rebound the allocator, so
this change only adds the enforcement for C++20 and later.

Similarly, P1148R0 made it ill-formed for strings and streams to use a
traits type that has an incorrect char_type. We already enforce that for
std::basic_string_view, so we just need to add it to std::basic_ios and
std::basic_string.

The assertion for the allocator's value_type caused some testsuite
regressions:
FAIL: 21_strings/basic_string/cons/char/deduction.cc (test for excess errors)
FAIL: 21_strings/basic_string/cons/wchar_t/deduction.cc (test for excess errors)
FAIL: 21_strings/basic_string/requirements/explicit_instantiation/debug.cc (test for excess errors)
FAIL: 21_strings/basic_string/requirements/explicit_instantiation/int.cc (test for excess errors)

The last two are testing the traditional extension that rebinds the
allocator, so need to be disabled for C++20.

The first two are similar to LWG 3076 where an incorrect constructor is
considered for CTAD. In this case, determining that it's not viable
requires instantiating std::basic_string<Iter, char_traits<Iter>, Alloc>
which then fails the new assertion, because Alloc::value_type is not the
same as Iter. This is only a problem because the size_type parameter of
the non-viable constructor is an alias for
_Alloc_traits_impl<A>::size_type which is a nested type, and so the
enclosing basic_string specialization needs to be instantiated. If we
remove the _Alloc_traits_impl wrapper that was added in
r12-5413-g2d76292bd6719d, then the definition of size_type no longer
depends on basic_string, and we don't instantiate an invalid
specialization and don't fail the assertion. The work done by
_Alloc_traits_impl::allocate can be done in a _S_allocate function
instead, which is probably more efficient to compile anyway.

libstdc++-v3/ChangeLog:

* config/abi/pre/gnu.ver: Export basic_string::_S_allocate.
* include/bits/basic_ios.h: Add static assertion checking
traits_type::value_type.
* include/bits/basic_string.h: Likewise. Do not rebind
allocator, and add static assertion checking its value_type.
(basic_string::_Alloc_traits_impl): Remove class template.
(basic_string::_S_allocate): New static member function.
(basic_string::assign): Use _S_allocate.
* include/bits/basic_string.tcc (basic_string::_M_create)
(basic_string::reserve, basic_string::_M_replace): Likewise.
* testsuite/21_strings/basic_string/requirements/explicit_instantiation/debug.cc:
Disable for C++20 and later.
* testsuite/21_strings/basic_string/requirements/explicit_instantiation/int.cc:
Likweise.

15 months agoaarch64: convert vector shift + bitwise and + multiply to vector compare
mtsamis [Mon, 1 Aug 2022 12:11:02 +0000 (14:11 +0200)]
aarch64: convert vector shift + bitwise and + multiply to vector compare

When using SWAR (SIMD in a register) techniques a comparison operation
within such a register can be made by using a combination of shifts,
bitwise and and multiplication. If code using this scheme is
vectorized then there is potential to replace all these operations
with a single vector comparison, by reinterpreting the vector types to
match the width of the SWAR register.

For example, for the test function packed_cmp_16_32, the original
generated code is:
        ldr     q0, [x0]
        add     w1, w1, 1
        ushr    v0.4s, v0.4s, 15
        and     v0.16b, v0.16b, v2.16b
        shl     v1.4s, v0.4s, 16
        sub     v0.4s, v1.4s, v0.4s
        str     q0, [x0], 16
        cmp     w2, w1
        bhi     .L20
with this pattern the above can be optimized to:
        ldr     q0, [x0]
        add     w1, w1, 1
        cmlt    v0.8h, v0.8h, #0
        str     q0, [x0], 16
        cmp     w2, w1
        bhi     .L20
The effect is similar for x86-64.

Bootstrapped and reg-tested for x86 and aarch64.

gcc/ChangeLog:

* match.pd: simplify vector shift + bit_and + multiply.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/swar_to_vec_cmp.c: New test.

Signed-off-by: Manolis Tsamis <manolis.tsamis@vrull.eu>
Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
15 months agoarm: [MVE intrinsics] rework vmlaq vmlasq vqdmlahq vqdmlashq vqrdmlahq vqrdmlashq
Christophe Lyon [Fri, 24 Feb 2023 14:39:08 +0000 (14:39 +0000)]
arm: [MVE intrinsics] rework vmlaq vmlasq vqdmlahq vqdmlashq vqrdmlahq vqrdmlashq

Implement vmlaq, vmlasq, vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq
using the new MVE builtins framework.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
(vqdmlashq, vqrdmlahq, vqrdmlashq): New.
* config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
(vqdmlashq, vqrdmlahq, vqrdmlashq): New.
* config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
(vqdmlashq, vqrdmlahq, vqrdmlashq): New.
* config/arm/arm-mve-builtins.cc
(function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
* config/arm/arm_mve.h (vqrdmlashq): Remove.
(vqrdmlahq): Remove.
(vqdmlashq): Remove.
(vqdmlahq): Remove.
(vmlasq): Remove.
(vmlaq): Remove.
(vmlaq_m): Remove.
(vmlasq_m): Remove.
(vqdmlashq_m): Remove.
(vqdmlahq_m): Remove.
(vqrdmlahq_m): Remove.
(vqrdmlashq_m): Remove.
(vmlasq_n_u8): Remove.
(vmlaq_n_u8): Remove.
(vqrdmlashq_n_s8): Remove.
(vqrdmlahq_n_s8): Remove.
(vqdmlahq_n_s8): Remove.
(vqdmlashq_n_s8): Remove.
(vmlasq_n_s8): Remove.
(vmlaq_n_s8): Remove.
(vmlasq_n_u16): Remove.
(vmlaq_n_u16): Remove.
(vqrdmlashq_n_s16): Remove.
(vqrdmlahq_n_s16): Remove.
(vqdmlashq_n_s16): Remove.
(vqdmlahq_n_s16): Remove.
(vmlasq_n_s16): Remove.
(vmlaq_n_s16): Remove.
(vmlasq_n_u32): Remove.
(vmlaq_n_u32): Remove.
(vqrdmlashq_n_s32): Remove.
(vqrdmlahq_n_s32): Remove.
(vqdmlashq_n_s32): Remove.
(vqdmlahq_n_s32): Remove.
(vmlasq_n_s32): Remove.
(vmlaq_n_s32): Remove.
(vmlaq_m_n_s8): Remove.
(vmlaq_m_n_s32): Remove.
(vmlaq_m_n_s16): Remove.
(vmlaq_m_n_u8): Remove.
(vmlaq_m_n_u32): Remove.
(vmlaq_m_n_u16): Remove.
(vmlasq_m_n_s8): Remove.
(vmlasq_m_n_s32): Remove.
(vmlasq_m_n_s16): Remove.
(vmlasq_m_n_u8): Remove.
(vmlasq_m_n_u32): Remove.
(vmlasq_m_n_u16): Remove.
(vqdmlashq_m_n_s8): Remove.
(vqdmlashq_m_n_s32): Remove.
(vqdmlashq_m_n_s16): Remove.
(vqdmlahq_m_n_s8): Remove.
(vqdmlahq_m_n_s32): Remove.
(vqdmlahq_m_n_s16): Remove.
(vqrdmlahq_m_n_s8): Remove.
(vqrdmlahq_m_n_s32): Remove.
(vqrdmlahq_m_n_s16): Remove.
(vqrdmlashq_m_n_s8): Remove.
(vqrdmlashq_m_n_s32): Remove.
(vqrdmlashq_m_n_s16): Remove.
(__arm_vmlasq_n_u8): Remove.
(__arm_vmlaq_n_u8): Remove.
(__arm_vqrdmlashq_n_s8): Remove.
(__arm_vqdmlashq_n_s8): Remove.
(__arm_vqrdmlahq_n_s8): Remove.
(__arm_vqdmlahq_n_s8): Remove.
(__arm_vmlasq_n_s8): Remove.
(__arm_vmlaq_n_s8): Remove.
(__arm_vmlasq_n_u16): Remove.
(__arm_vmlaq_n_u16): Remove.
(__arm_vqrdmlashq_n_s16): Remove.
(__arm_vqdmlashq_n_s16): Remove.
(__arm_vqrdmlahq_n_s16): Remove.
(__arm_vqdmlahq_n_s16): Remove.
(__arm_vmlasq_n_s16): Remove.
(__arm_vmlaq_n_s16): Remove.
(__arm_vmlasq_n_u32): Remove.
(__arm_vmlaq_n_u32): Remove.
(__arm_vqrdmlashq_n_s32): Remove.
(__arm_vqdmlashq_n_s32): Remove.
(__arm_vqrdmlahq_n_s32): Remove.
(__arm_vqdmlahq_n_s32): Remove.
(__arm_vmlasq_n_s32): Remove.
(__arm_vmlaq_n_s32): Remove.
(__arm_vmlaq_m_n_s8): Remove.
(__arm_vmlaq_m_n_s32): Remove.
(__arm_vmlaq_m_n_s16): Remove.
(__arm_vmlaq_m_n_u8): Remove.
(__arm_vmlaq_m_n_u32): Remove.
(__arm_vmlaq_m_n_u16): Remove.
(__arm_vmlasq_m_n_s8): Remove.
(__arm_vmlasq_m_n_s32): Remove.
(__arm_vmlasq_m_n_s16): Remove.
(__arm_vmlasq_m_n_u8): Remove.
(__arm_vmlasq_m_n_u32): Remove.
(__arm_vmlasq_m_n_u16): Remove.
(__arm_vqdmlahq_m_n_s8): Remove.
(__arm_vqdmlahq_m_n_s32): Remove.
(__arm_vqdmlahq_m_n_s16): Remove.
(__arm_vqrdmlahq_m_n_s8): Remove.
(__arm_vqrdmlahq_m_n_s32): Remove.
(__arm_vqrdmlahq_m_n_s16): Remove.
(__arm_vqrdmlashq_m_n_s8): Remove.
(__arm_vqrdmlashq_m_n_s32): Remove.
(__arm_vqrdmlashq_m_n_s16): Remove.
(__arm_vqdmlashq_m_n_s8): Remove.
(__arm_vqdmlashq_m_n_s16): Remove.
(__arm_vqdmlashq_m_n_s32): Remove.
(__arm_vmlasq): Remove.
(__arm_vmlaq): Remove.
(__arm_vqrdmlashq): Remove.
(__arm_vqdmlashq): Remove.
(__arm_vqrdmlahq): Remove.
(__arm_vqdmlahq): Remove.
(__arm_vmlaq_m): Remove.
(__arm_vmlasq_m): Remove.
(__arm_vqdmlahq_m): Remove.
(__arm_vqrdmlahq_m): Remove.
(__arm_vqrdmlashq_m): Remove.
(__arm_vqdmlashq_m): Remove.

15 months agoarm: [MVE intrinsics] factorize vmlaq_n vmlasq_n vqdmlahq_n vqdmlashq_n vqrdmlahq_n...
Christophe Lyon [Fri, 24 Feb 2023 14:38:45 +0000 (14:38 +0000)]
arm: [MVE intrinsics] factorize vmlaq_n vmlasq_n vqdmlahq_n vqdmlashq_n vqrdmlahq_n vqrdmlashq_n

Factorize vmlaq_n, vmlasq_n, vqdmlahq_n, vqdmlashq_n, vqrdmlahq_n,
vqrdmlashq_n builtins so that they use the same parameterized names.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/iterators.md (MVE_VMLxQ_N): New.
(mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
vqrdmlash.
(supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
VQRDMLASHQ_N_S.
* config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
(mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
(mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
(mve_vqrdmlashq_n_<supf><mode>): Merge into ...
(@mve_<mve_insn>q_n_<supf><mode>): ... this.

15 months agoarm: [MVE intrinsics] add ternary_n shape
Christophe Lyon [Fri, 24 Feb 2023 14:38:03 +0000 (14:38 +0000)]
arm: [MVE intrinsics] add ternary_n shape

This patch adds the ternary_n shape description.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
* config/arm/arm-mve-builtins-shapes.h (ternary_n): New.

15 months agoarm: [MVE intrinsics] rework vqrdmladhq vqrdmladhxq vqrdmlsdhq vqrdmlsdhxq vqdmladhq...
Christophe Lyon [Fri, 24 Feb 2023 13:27:53 +0000 (13:27 +0000)]
arm: [MVE intrinsics] rework vqrdmladhq vqrdmladhxq vqrdmlsdhq vqrdmlsdhxq vqdmladhq vqdmladhxq vqdmlsdhq vqdmlsdhxq

Implement vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq,
vqdmladhxq, vqdmlsdhq, vqdmlsdhxq using the new MVE builtins
framework.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
(vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
(vqrdmlsdhxq): New.
* config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
(vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
(vqrdmlsdhxq): New.
* config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
(vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
(vqrdmlsdhxq): New.
* config/arm/arm-mve-builtins.cc
(function_instance::has_inactive_argument): Handle vqrdmladhq,
vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
vqdmlsdhq, vqdmlsdhxq.
* config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
(vqrdmlsdhq): Remove.
(vqrdmladhxq): Remove.
(vqrdmladhq): Remove.
(vqdmlsdhxq): Remove.
(vqdmlsdhq): Remove.
(vqdmladhxq): Remove.
(vqdmladhq): Remove.
(vqdmladhq_m): Remove.
(vqdmladhxq_m): Remove.
(vqdmlsdhq_m): Remove.
(vqdmlsdhxq_m): Remove.
(vqrdmladhq_m): Remove.
(vqrdmladhxq_m): Remove.
(vqrdmlsdhq_m): Remove.
(vqrdmlsdhxq_m): Remove.
(vqrdmlsdhxq_s8): Remove.
(vqrdmlsdhq_s8): Remove.
(vqrdmladhxq_s8): Remove.
(vqrdmladhq_s8): Remove.
(vqdmlsdhxq_s8): Remove.
(vqdmlsdhq_s8): Remove.
(vqdmladhxq_s8): Remove.
(vqdmladhq_s8): Remove.
(vqrdmlsdhxq_s16): Remove.
(vqrdmlsdhq_s16): Remove.
(vqrdmladhxq_s16): Remove.
(vqrdmladhq_s16): Remove.
(vqdmlsdhxq_s16): Remove.
(vqdmlsdhq_s16): Remove.
(vqdmladhxq_s16): Remove.
(vqdmladhq_s16): Remove.
(vqrdmlsdhxq_s32): Remove.
(vqrdmlsdhq_s32): Remove.
(vqrdmladhxq_s32): Remove.
(vqrdmladhq_s32): Remove.
(vqdmlsdhxq_s32): Remove.
(vqdmlsdhq_s32): Remove.
(vqdmladhxq_s32): Remove.
(vqdmladhq_s32): Remove.
(vqdmladhq_m_s8): Remove.
(vqdmladhq_m_s32): Remove.
(vqdmladhq_m_s16): Remove.
(vqdmladhxq_m_s8): Remove.
(vqdmladhxq_m_s32): Remove.
(vqdmladhxq_m_s16): Remove.
(vqdmlsdhq_m_s8): Remove.
(vqdmlsdhq_m_s32): Remove.
(vqdmlsdhq_m_s16): Remove.
(vqdmlsdhxq_m_s8): Remove.
(vqdmlsdhxq_m_s32): Remove.
(vqdmlsdhxq_m_s16): Remove.
(vqrdmladhq_m_s8): Remove.
(vqrdmladhq_m_s32): Remove.
(vqrdmladhq_m_s16): Remove.
(vqrdmladhxq_m_s8): Remove.
(vqrdmladhxq_m_s32): Remove.
(vqrdmladhxq_m_s16): Remove.
(vqrdmlsdhq_m_s8): Remove.
(vqrdmlsdhq_m_s32): Remove.
(vqrdmlsdhq_m_s16): Remove.
(vqrdmlsdhxq_m_s8): Remove.
(vqrdmlsdhxq_m_s32): Remove.
(vqrdmlsdhxq_m_s16): Remove.
(__arm_vqrdmlsdhxq_s8): Remove.
(__arm_vqrdmlsdhq_s8): Remove.
(__arm_vqrdmladhxq_s8): Remove.
(__arm_vqrdmladhq_s8): Remove.
(__arm_vqdmlsdhxq_s8): Remove.
(__arm_vqdmlsdhq_s8): Remove.
(__arm_vqdmladhxq_s8): Remove.
(__arm_vqdmladhq_s8): Remove.
(__arm_vqrdmlsdhxq_s16): Remove.
(__arm_vqrdmlsdhq_s16): Remove.
(__arm_vqrdmladhxq_s16): Remove.
(__arm_vqrdmladhq_s16): Remove.
(__arm_vqdmlsdhxq_s16): Remove.
(__arm_vqdmlsdhq_s16): Remove.
(__arm_vqdmladhxq_s16): Remove.
(__arm_vqdmladhq_s16): Remove.
(__arm_vqrdmlsdhxq_s32): Remove.
(__arm_vqrdmlsdhq_s32): Remove.
(__arm_vqrdmladhxq_s32): Remove.
(__arm_vqrdmladhq_s32): Remove.
(__arm_vqdmlsdhxq_s32): Remove.
(__arm_vqdmlsdhq_s32): Remove.
(__arm_vqdmladhxq_s32): Remove.
(__arm_vqdmladhq_s32): Remove.
(__arm_vqdmladhq_m_s8): Remove.
(__arm_vqdmladhq_m_s32): Remove.
(__arm_vqdmladhq_m_s16): Remove.
(__arm_vqdmladhxq_m_s8): Remove.
(__arm_vqdmladhxq_m_s32): Remove.
(__arm_vqdmladhxq_m_s16): Remove.
(__arm_vqdmlsdhq_m_s8): Remove.
(__arm_vqdmlsdhq_m_s32): Remove.
(__arm_vqdmlsdhq_m_s16): Remove.
(__arm_vqdmlsdhxq_m_s8): Remove.
(__arm_vqdmlsdhxq_m_s32): Remove.
(__arm_vqdmlsdhxq_m_s16): Remove.
(__arm_vqrdmladhq_m_s8): Remove.
(__arm_vqrdmladhq_m_s32): Remove.
(__arm_vqrdmladhq_m_s16): Remove.
(__arm_vqrdmladhxq_m_s8): Remove.
(__arm_vqrdmladhxq_m_s32): Remove.
(__arm_vqrdmladhxq_m_s16): Remove.
(__arm_vqrdmlsdhq_m_s8): Remove.
(__arm_vqrdmlsdhq_m_s32): Remove.
(__arm_vqrdmlsdhq_m_s16): Remove.
(__arm_vqrdmlsdhxq_m_s8): Remove.
(__arm_vqrdmlsdhxq_m_s32): Remove.
(__arm_vqrdmlsdhxq_m_s16): Remove.
(__arm_vqrdmlsdhxq): Remove.
(__arm_vqrdmlsdhq): Remove.
(__arm_vqrdmladhxq): Remove.
(__arm_vqrdmladhq): Remove.
(__arm_vqdmlsdhxq): Remove.
(__arm_vqdmlsdhq): Remove.
(__arm_vqdmladhxq): Remove.
(__arm_vqdmladhq): Remove.
(__arm_vqdmladhq_m): Remove.
(__arm_vqdmladhxq_m): Remove.
(__arm_vqdmlsdhq_m): Remove.
(__arm_vqdmlsdhxq_m): Remove.
(__arm_vqrdmladhq_m): Remove.
(__arm_vqrdmladhxq_m): Remove.
(__arm_vqrdmlsdhq_m): Remove.
(__arm_vqrdmlsdhxq_m): Remove.

15 months agoarm: [MVE intrinsics] factorize vqdmladhq vqdmladhxq vqdmlsdhq vqdmlsdhxq vqrdmladhq...
Christophe Lyon [Fri, 24 Feb 2023 13:27:34 +0000 (13:27 +0000)]
arm: [MVE intrinsics] factorize vqdmladhq vqdmladhxq vqdmlsdhq vqdmlsdhxq vqrdmladhq vqrdmladhxq vqrdmlsdhq vqrdmlsdhxq

Factorize vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqrdmladhq,
vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq builtins so that they use the
same parameterized names.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
(mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
(supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
* config/arm/mve.md (mve_vqrdmladhq_s<mode>)
(mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
(mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
(mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
(mve_vqdmladhq_s<mode>): Merge into ...
(@mve_<mve_insn>q_<supf><mode>): ... this.

15 months agoarm: [MVE intrinsics] add ternary shape
Christophe Lyon [Fri, 24 Feb 2023 13:26:39 +0000 (13:26 +0000)]
arm: [MVE intrinsics] add ternary shape

This patch adds the ternary shape description.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-shapes.cc (ternary): New.
* config/arm/arm-mve-builtins-shapes.h (ternary): New.

15 months agoarm: [MVE intrinsics] rework vmlaldavaq vmlaldavaxq vmlsldavaq vmlsldavaxq
Christophe Lyon [Fri, 24 Feb 2023 10:47:07 +0000 (10:47 +0000)]
arm: [MVE intrinsics] rework vmlaldavaq vmlaldavaxq vmlsldavaq vmlsldavaxq

Implement vmlaldavaq, vmlaldavaxq, vmlsldavaq, vmlsldavaxq using the
new MVE builtins framework.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
(vmlsldavaq, vmlsldavaxq): New.
* config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
(vmlsldavaq, vmlsldavaxq): New.
* config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
(vmlsldavaq, vmlsldavaxq): New.
* config/arm/arm_mve.h (vmlaldavaq): Remove.
(vmlaldavaxq): Remove.
(vmlsldavaq): Remove.
(vmlsldavaxq): Remove.
(vmlaldavaq_p): Remove.
(vmlaldavaxq_p): Remove.
(vmlsldavaq_p): Remove.
(vmlsldavaxq_p): Remove.
(vmlaldavaq_s16): Remove.
(vmlaldavaxq_s16): Remove.
(vmlsldavaq_s16): Remove.
(vmlsldavaxq_s16): Remove.
(vmlaldavaq_u16): Remove.
(vmlaldavaq_s32): Remove.
(vmlaldavaxq_s32): Remove.
(vmlsldavaq_s32): Remove.
(vmlsldavaxq_s32): Remove.
(vmlaldavaq_u32): Remove.
(vmlaldavaq_p_s32): Remove.
(vmlaldavaq_p_s16): Remove.
(vmlaldavaq_p_u32): Remove.
(vmlaldavaq_p_u16): Remove.
(vmlaldavaxq_p_s32): Remove.
(vmlaldavaxq_p_s16): Remove.
(vmlsldavaq_p_s32): Remove.
(vmlsldavaq_p_s16): Remove.
(vmlsldavaxq_p_s32): Remove.
(vmlsldavaxq_p_s16): Remove.
(__arm_vmlaldavaq_s16): Remove.
(__arm_vmlaldavaxq_s16): Remove.
(__arm_vmlsldavaq_s16): Remove.
(__arm_vmlsldavaxq_s16): Remove.
(__arm_vmlaldavaq_u16): Remove.
(__arm_vmlaldavaq_s32): Remove.
(__arm_vmlaldavaxq_s32): Remove.
(__arm_vmlsldavaq_s32): Remove.
(__arm_vmlsldavaxq_s32): Remove.
(__arm_vmlaldavaq_u32): Remove.
(__arm_vmlaldavaq_p_s32): Remove.
(__arm_vmlaldavaq_p_s16): Remove.
(__arm_vmlaldavaq_p_u32): Remove.
(__arm_vmlaldavaq_p_u16): Remove.
(__arm_vmlaldavaxq_p_s32): Remove.
(__arm_vmlaldavaxq_p_s16): Remove.
(__arm_vmlsldavaq_p_s32): Remove.
(__arm_vmlsldavaq_p_s16): Remove.
(__arm_vmlsldavaxq_p_s32): Remove.
(__arm_vmlsldavaxq_p_s16): Remove.
(__arm_vmlaldavaq): Remove.
(__arm_vmlaldavaxq): Remove.
(__arm_vmlsldavaq): Remove.
(__arm_vmlsldavaxq): Remove.
(__arm_vmlaldavaq_p): Remove.
(__arm_vmlaldavaxq_p): Remove.
(__arm_vmlsldavaq_p): Remove.
(__arm_vmlsldavaxq_p): Remove.

15 months agoarm: [MVE intrinsics] factorize vmlaldavaq vmlaldavaxq vmlsldavaq vmlsldavaxq
Christophe Lyon [Fri, 24 Feb 2023 10:38:02 +0000 (10:38 +0000)]
arm: [MVE intrinsics] factorize vmlaldavaq vmlaldavaxq vmlsldavaq vmlsldavaxq

Factorize vmlaldavaq, vmlaldavaxq, vmlsldavaq, vmlsldavaxq builtins so
that they use the same parameterized names.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
New.
(mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
(supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
* config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
(mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
(mve_vmlaldavaxq_s<mode>): Merge into ...
(@mve_<mve_insn>q_<supf><mode>): ... this.
(mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
(mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
...
(@mve_<mve_insn>q_p_<supf><mode>): ... this.

15 months agoarm: [MVE intrinsics] add binary_acca_int64 shape
Christophe Lyon [Fri, 24 Feb 2023 10:38:26 +0000 (10:38 +0000)]
arm: [MVE intrinsics] add binary_acca_int64 shape

This patch adds the binary_acca_int64 shape description.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
* config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.

15 months agoarm: [MVE intrinsics] rework vrmlaldavhq vrmlaldavhxq vrmlsldavhq vrmlsldavhxq
Christophe Lyon [Thu, 23 Feb 2023 11:56:47 +0000 (11:56 +0000)]
arm: [MVE intrinsics] rework vrmlaldavhq vrmlaldavhxq vrmlsldavhq vrmlsldavhxq

Implement vrmlaldavhq, vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq using
the new MVE builtins framework.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
(vrmlsldavhq, vrmlsldavhxq): New.
* config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
(vrmlsldavhq, vrmlsldavhxq): New.
* config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
(vrmlsldavhq, vrmlsldavhxq): New.
* config/arm/arm-mve-builtins-functions.h
(unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
* config/arm/arm_mve.h (vrmlaldavhq): Remove.
(vrmlsldavhxq): Remove.
(vrmlsldavhq): Remove.
(vrmlaldavhxq): Remove.
(vrmlaldavhq_p): Remove.
(vrmlaldavhxq_p): Remove.
(vrmlsldavhq_p): Remove.
(vrmlsldavhxq_p): Remove.
(vrmlaldavhq_u32): Remove.
(vrmlsldavhxq_s32): Remove.
(vrmlsldavhq_s32): Remove.
(vrmlaldavhxq_s32): Remove.
(vrmlaldavhq_s32): Remove.
(vrmlaldavhq_p_s32): Remove.
(vrmlaldavhxq_p_s32): Remove.
(vrmlsldavhq_p_s32): Remove.
(vrmlsldavhxq_p_s32): Remove.
(vrmlaldavhq_p_u32): Remove.
(__arm_vrmlaldavhq_u32): Remove.
(__arm_vrmlsldavhxq_s32): Remove.
(__arm_vrmlsldavhq_s32): Remove.
(__arm_vrmlaldavhxq_s32): Remove.
(__arm_vrmlaldavhq_s32): Remove.
(__arm_vrmlaldavhq_p_s32): Remove.
(__arm_vrmlaldavhxq_p_s32): Remove.
(__arm_vrmlsldavhq_p_s32): Remove.
(__arm_vrmlsldavhxq_p_s32): Remove.
(__arm_vrmlaldavhq_p_u32): Remove.
(__arm_vrmlaldavhq): Remove.
(__arm_vrmlsldavhxq): Remove.
(__arm_vrmlsldavhq): Remove.
(__arm_vrmlaldavhxq): Remove.
(__arm_vrmlaldavhq_p): Remove.
(__arm_vrmlaldavhxq_p): Remove.
(__arm_vrmlsldavhq_p): Remove.
(__arm_vrmlsldavhxq_p): Remove.

15 months agoarm: [MVE intrinsics] factorize vrmlaldavhq vrmlaldavhxq vrmlsldavhq vrmlsldavhxq
Christophe Lyon [Thu, 23 Feb 2023 11:52:18 +0000 (11:52 +0000)]
arm: [MVE intrinsics] factorize vrmlaldavhq vrmlaldavhxq vrmlsldavhq vrmlsldavhxq

Factorize vrmlaldavhq, vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq
builtins so that they use the same parameterized names.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
New.
(mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
(supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
* config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
(mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
(mve_vrmlaldavhq_<supf>v4si): Merge into ...
(@mve_<mve_insn>q_<supf>v4si): ... this.
(mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
(mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
into ...
(@mve_<mve_insn>q_p_<supf>v4si): ... this.

15 months agoarm: [MVE intrinsics] rework vmlaldavq vmlaldavxq vmlsldavq vmlsldavxq
Christophe Lyon [Wed, 22 Feb 2023 17:09:18 +0000 (17:09 +0000)]
arm: [MVE intrinsics] rework vmlaldavq vmlaldavxq vmlsldavq vmlsldavxq

Implement vmlaldavq, vmlaldavxq, vmlsldavq, vmlsldavxq using the new
MVE builtins framework.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
(vmlsldavq, vmlsldavxq): New.
* config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
(vmlsldavq, vmlsldavxq): New.
* config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
(vmlsldavq, vmlsldavxq): New.
* config/arm/arm_mve.h (vmlaldavq): Remove.
(vmlsldavxq): Remove.
(vmlsldavq): Remove.
(vmlaldavxq): Remove.
(vmlaldavq_p): Remove.
(vmlaldavxq_p): Remove.
(vmlsldavq_p): Remove.
(vmlsldavxq_p): Remove.
(vmlaldavq_u16): Remove.
(vmlsldavxq_s16): Remove.
(vmlsldavq_s16): Remove.
(vmlaldavxq_s16): Remove.
(vmlaldavq_s16): Remove.
(vmlaldavq_u32): Remove.
(vmlsldavxq_s32): Remove.
(vmlsldavq_s32): Remove.
(vmlaldavxq_s32): Remove.
(vmlaldavq_s32): Remove.
(vmlaldavq_p_s16): Remove.
(vmlaldavxq_p_s16): Remove.
(vmlsldavq_p_s16): Remove.
(vmlsldavxq_p_s16): Remove.
(vmlaldavq_p_u16): Remove.
(vmlaldavq_p_s32): Remove.
(vmlaldavxq_p_s32): Remove.
(vmlsldavq_p_s32): Remove.
(vmlsldavxq_p_s32): Remove.
(vmlaldavq_p_u32): Remove.
(__arm_vmlaldavq_u16): Remove.
(__arm_vmlsldavxq_s16): Remove.
(__arm_vmlsldavq_s16): Remove.
(__arm_vmlaldavxq_s16): Remove.
(__arm_vmlaldavq_s16): Remove.
(__arm_vmlaldavq_u32): Remove.
(__arm_vmlsldavxq_s32): Remove.
(__arm_vmlsldavq_s32): Remove.
(__arm_vmlaldavxq_s32): Remove.
(__arm_vmlaldavq_s32): Remove.
(__arm_vmlaldavq_p_s16): Remove.
(__arm_vmlaldavxq_p_s16): Remove.
(__arm_vmlsldavq_p_s16): Remove.
(__arm_vmlsldavxq_p_s16): Remove.
(__arm_vmlaldavq_p_u16): Remove.
(__arm_vmlaldavq_p_s32): Remove.
(__arm_vmlaldavxq_p_s32): Remove.
(__arm_vmlsldavq_p_s32): Remove.
(__arm_vmlsldavxq_p_s32): Remove.
(__arm_vmlaldavq_p_u32): Remove.
(__arm_vmlaldavq): Remove.
(__arm_vmlsldavxq): Remove.
(__arm_vmlsldavq): Remove.
(__arm_vmlaldavxq): Remove.
(__arm_vmlaldavq_p): Remove.
(__arm_vmlaldavxq_p): Remove.
(__arm_vmlsldavq_p): Remove.
(__arm_vmlsldavxq_p): Remove.

15 months agoarm: [MVE intrinsics] factorize vmlaldavq vmlaldavxq vmlsldavq vmlsldavxq
Christophe Lyon [Wed, 22 Feb 2023 16:36:11 +0000 (16:36 +0000)]
arm: [MVE intrinsics] factorize vmlaldavq vmlaldavxq vmlsldavq vmlsldavxq

Factorize vmlaldavq, vmlaldavxq, vmlsldavq, vmlsldavxq builtins so
that they use parameterized names.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
(mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
(supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
* config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
(mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
(mve_vmlsldavxq_s<mode>): Merge into ...
(@mve_<mve_insn>q_<supf><mode>): ... this.
(mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
(mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
...
(@mve_<mve_insn>q_p_<supf><mode>): ... this.

15 months agoarm: [MVE intrinsics] add binary_acc_int64 shape
Christophe Lyon [Wed, 22 Feb 2023 16:36:38 +0000 (16:36 +0000)]
arm: [MVE intrinsics] add binary_acc_int64 shape

This patch adds the binary_acc_int64 shape description.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
* config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.

15 months agoarm: [MVE intrinsics] rework vabavq
Christophe Lyon [Tue, 21 Feb 2023 23:05:21 +0000 (23:05 +0000)]
arm: [MVE intrinsics] rework vabavq

Implement vabavq using the new MVE builtins framework.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-base.cc (vabavq): New.
* config/arm/arm-mve-builtins-base.def (vabavq): New.
* config/arm/arm-mve-builtins-base.h (vabavq): New.
* config/arm/arm_mve.h (vabavq): Remove.
(vabavq_p): Remove.
(vabavq_s8): Remove.
(vabavq_s16): Remove.
(vabavq_s32): Remove.
(vabavq_u8): Remove.
(vabavq_u16): Remove.
(vabavq_u32): Remove.
(vabavq_p_s8): Remove.
(vabavq_p_u8): Remove.
(vabavq_p_s16): Remove.
(vabavq_p_u16): Remove.
(vabavq_p_s32): Remove.
(vabavq_p_u32): Remove.
(__arm_vabavq_s8): Remove.
(__arm_vabavq_s16): Remove.
(__arm_vabavq_s32): Remove.
(__arm_vabavq_u8): Remove.
(__arm_vabavq_u16): Remove.
(__arm_vabavq_u32): Remove.
(__arm_vabavq_p_s8): Remove.
(__arm_vabavq_p_u8): Remove.
(__arm_vabavq_p_s16): Remove.
(__arm_vabavq_p_u16): Remove.
(__arm_vabavq_p_s32): Remove.
(__arm_vabavq_p_u32): Remove.
(__arm_vabavq): Remove.
(__arm_vabavq_p): Remove.

15 months agoarm: [MVE intrinsics] factorize vabavq
Christophe Lyon [Tue, 21 Feb 2023 23:05:14 +0000 (23:05 +0000)]
arm: [MVE intrinsics] factorize vabavq

Factorize vabavq builtins so that they use parameterized names.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/iterators.md (mve_insn): Add vabav.
* config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_<supf><mode>): ... this,.
(mve_vabavq_p_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_p_<supf><mode>): ... this,.

15 months agoarm: [MVE intrinsics] rework vmladavaq vmladavaxq vmlsdavaq vmlsdavaxq
Christophe Lyon [Tue, 21 Feb 2023 22:49:30 +0000 (22:49 +0000)]
arm: [MVE intrinsics] rework vmladavaq vmladavaxq vmlsdavaq vmlsdavaxq

Implement vmladavaq, vmladavaxq, vmlsdavaq, vmlsdavaxq using the new
MVE builtins framework.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
(vmlsdavaq, vmlsdavaxq): New.
* config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
(vmlsdavaq, vmlsdavaxq): New.
* config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
(vmlsdavaq, vmlsdavaxq): New.
* config/arm/arm_mve.h (vmladavaq): Remove.
(vmlsdavaxq): Remove.
(vmlsdavaq): Remove.
(vmladavaxq): Remove.
(vmladavaq_p): Remove.
(vmladavaxq_p): Remove.
(vmlsdavaq_p): Remove.
(vmlsdavaxq_p): Remove.
(vmladavaq_u8): Remove.
(vmlsdavaxq_s8): Remove.
(vmlsdavaq_s8): Remove.
(vmladavaxq_s8): Remove.
(vmladavaq_s8): Remove.
(vmladavaq_u16): Remove.
(vmlsdavaxq_s16): Remove.
(vmlsdavaq_s16): Remove.
(vmladavaxq_s16): Remove.
(vmladavaq_s16): Remove.
(vmladavaq_u32): Remove.
(vmlsdavaxq_s32): Remove.
(vmlsdavaq_s32): Remove.
(vmladavaxq_s32): Remove.
(vmladavaq_s32): Remove.
(vmladavaq_p_s8): Remove.
(vmladavaq_p_s32): Remove.
(vmladavaq_p_s16): Remove.
(vmladavaq_p_u8): Remove.
(vmladavaq_p_u32): Remove.
(vmladavaq_p_u16): Remove.
(vmladavaxq_p_s8): Remove.
(vmladavaxq_p_s32): Remove.
(vmladavaxq_p_s16): Remove.
(vmlsdavaq_p_s8): Remove.
(vmlsdavaq_p_s32): Remove.
(vmlsdavaq_p_s16): Remove.
(vmlsdavaxq_p_s8): Remove.
(vmlsdavaxq_p_s32): Remove.
(vmlsdavaxq_p_s16): Remove.
(__arm_vmladavaq_u8): Remove.
(__arm_vmlsdavaxq_s8): Remove.
(__arm_vmlsdavaq_s8): Remove.
(__arm_vmladavaxq_s8): Remove.
(__arm_vmladavaq_s8): Remove.
(__arm_vmladavaq_u16): Remove.
(__arm_vmlsdavaxq_s16): Remove.
(__arm_vmlsdavaq_s16): Remove.
(__arm_vmladavaxq_s16): Remove.
(__arm_vmladavaq_s16): Remove.
(__arm_vmladavaq_u32): Remove.
(__arm_vmlsdavaxq_s32): Remove.
(__arm_vmlsdavaq_s32): Remove.
(__arm_vmladavaxq_s32): Remove.
(__arm_vmladavaq_s32): Remove.
(__arm_vmladavaq_p_s8): Remove.
(__arm_vmladavaq_p_s32): Remove.
(__arm_vmladavaq_p_s16): Remove.
(__arm_vmladavaq_p_u8): Remove.
(__arm_vmladavaq_p_u32): Remove.
(__arm_vmladavaq_p_u16): Remove.
(__arm_vmladavaxq_p_s8): Remove.
(__arm_vmladavaxq_p_s32): Remove.
(__arm_vmladavaxq_p_s16): Remove.
(__arm_vmlsdavaq_p_s8): Remove.
(__arm_vmlsdavaq_p_s32): Remove.
(__arm_vmlsdavaq_p_s16): Remove.
(__arm_vmlsdavaxq_p_s8): Remove.
(__arm_vmlsdavaxq_p_s32): Remove.
(__arm_vmlsdavaxq_p_s16): Remove.
(__arm_vmladavaq): Remove.
(__arm_vmlsdavaxq): Remove.
(__arm_vmlsdavaq): Remove.
(__arm_vmladavaxq): Remove.
(__arm_vmladavaq_p): Remove.
(__arm_vmladavaxq_p): Remove.
(__arm_vmlsdavaq_p): Remove.
(__arm_vmlsdavaxq_p): Remove.

15 months agoarm: [MVE intrinsics] add binary_acca_int32 shape
Christophe Lyon [Tue, 21 Feb 2023 22:49:16 +0000 (22:49 +0000)]
arm: [MVE intrinsics] add binary_acca_int32 shape

This patch adds the binary_acca_int32 shape description.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
* config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.

15 months agoarm: [MVE intrinsics] rework vmladavq vmladavxq vmlsdavq vmlsdavxq
Christophe Lyon [Tue, 21 Feb 2023 22:31:42 +0000 (22:31 +0000)]
arm: [MVE intrinsics] rework vmladavq vmladavxq vmlsdavq vmlsdavxq

Implement vmladavq, vmladavxq, vmlsdavq, vmlsdavxq using the new MVE
builtins framework.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
(vmlsdavq, vmlsdavxq): New.
* config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
(vmlsdavq, vmlsdavxq): New.
* config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
(vmlsdavq, vmlsdavxq): New.
* config/arm/arm_mve.h (vmladavq): Remove.
(vmlsdavxq): Remove.
(vmlsdavq): Remove.
(vmladavxq): Remove.
(vmladavq_p): Remove.
(vmlsdavxq_p): Remove.
(vmlsdavq_p): Remove.
(vmladavxq_p): Remove.
(vmladavq_u8): Remove.
(vmlsdavxq_s8): Remove.
(vmlsdavq_s8): Remove.
(vmladavxq_s8): Remove.
(vmladavq_s8): Remove.
(vmladavq_u16): Remove.
(vmlsdavxq_s16): Remove.
(vmlsdavq_s16): Remove.
(vmladavxq_s16): Remove.
(vmladavq_s16): Remove.
(vmladavq_u32): Remove.
(vmlsdavxq_s32): Remove.
(vmlsdavq_s32): Remove.
(vmladavxq_s32): Remove.
(vmladavq_s32): Remove.
(vmladavq_p_u8): Remove.
(vmlsdavxq_p_s8): Remove.
(vmlsdavq_p_s8): Remove.
(vmladavxq_p_s8): Remove.
(vmladavq_p_s8): Remove.
(vmladavq_p_u16): Remove.
(vmlsdavxq_p_s16): Remove.
(vmlsdavq_p_s16): Remove.
(vmladavxq_p_s16): Remove.
(vmladavq_p_s16): Remove.
(vmladavq_p_u32): Remove.
(vmlsdavxq_p_s32): Remove.
(vmlsdavq_p_s32): Remove.
(vmladavxq_p_s32): Remove.
(vmladavq_p_s32): Remove.
(__arm_vmladavq_u8): Remove.
(__arm_vmlsdavxq_s8): Remove.
(__arm_vmlsdavq_s8): Remove.
(__arm_vmladavxq_s8): Remove.
(__arm_vmladavq_s8): Remove.
(__arm_vmladavq_u16): Remove.
(__arm_vmlsdavxq_s16): Remove.
(__arm_vmlsdavq_s16): Remove.
(__arm_vmladavxq_s16): Remove.
(__arm_vmladavq_s16): Remove.
(__arm_vmladavq_u32): Remove.
(__arm_vmlsdavxq_s32): Remove.
(__arm_vmlsdavq_s32): Remove.
(__arm_vmladavxq_s32): Remove.
(__arm_vmladavq_s32): Remove.
(__arm_vmladavq_p_u8): Remove.
(__arm_vmlsdavxq_p_s8): Remove.
(__arm_vmlsdavq_p_s8): Remove.
(__arm_vmladavxq_p_s8): Remove.
(__arm_vmladavq_p_s8): Remove.
(__arm_vmladavq_p_u16): Remove.
(__arm_vmlsdavxq_p_s16): Remove.
(__arm_vmlsdavq_p_s16): Remove.
(__arm_vmladavxq_p_s16): Remove.
(__arm_vmladavq_p_s16): Remove.
(__arm_vmladavq_p_u32): Remove.
(__arm_vmlsdavxq_p_s32): Remove.
(__arm_vmlsdavq_p_s32): Remove.
(__arm_vmladavxq_p_s32): Remove.
(__arm_vmladavq_p_s32): Remove.
(__arm_vmladavq): Remove.
(__arm_vmlsdavxq): Remove.
(__arm_vmlsdavq): Remove.
(__arm_vmladavxq): Remove.
(__arm_vmladavq_p): Remove.
(__arm_vmlsdavxq_p): Remove.
(__arm_vmlsdavq_p): Remove.
(__arm_vmladavxq_p): Remove.

15 months agoarm: [MVE intrinsics] factorize vmladav vmladavx vmlsdav vmlsdavx vmladava vmladavax...
Christophe Lyon [Tue, 21 Feb 2023 22:31:22 +0000 (22:31 +0000)]
arm: [MVE intrinsics] factorize vmladav vmladavx vmlsdav vmlsdavx vmladava vmladavax vmlsdava vmlsdavax

Factorize vmladav, vmladavx, vmlsdav, vmlsdavx, vmladava, vmladavax,
vmlsdava, vmlsdavax builtins so that they use the same parameterized
names.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
(MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
(mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
vmlsdavax, vmlsdav, vmlsdavx.
(supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
VMLSDAVXQ_S.
* config/arm/mve.md (mve_vmladavq_<supf><mode>)
(mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
(mve_vmlsdavxq_s<mode>): Merge into ...
(@mve_<mve_insn>q_<supf><mode>): ... this.
(mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
(mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
...
(@mve_<mve_insn>q_<supf><mode>): ... this.
(mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
(mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
(@mve_<mve_insn>q_p_<supf><mode>): ... this.
(mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
(mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
...
(@mve_<mve_insn>q_p_<supf><mode>): ... this.

15 months agoarm: [MVE intrinsics] add binary_acc_int32 shape
Christophe Lyon [Tue, 21 Feb 2023 22:30:25 +0000 (22:30 +0000)]
arm: [MVE intrinsics] add binary_acc_int32 shape

This patch adds the binary_acc_int32 shape description.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
* config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.

15 months agoarm: [MVE intrinsics] rework vaddlvaq
Christophe Lyon [Tue, 21 Feb 2023 21:36:57 +0000 (21:36 +0000)]
arm: [MVE intrinsics] rework vaddlvaq

Implement vaddlvaq using the new MVE builtins framework.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
* config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
* config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
* config/arm/arm_mve.h (vaddlvaq): Remove.
(vaddlvaq_p): Remove.
(vaddlvaq_u32): Remove.
(vaddlvaq_s32): Remove.
(vaddlvaq_p_s32): Remove.
(vaddlvaq_p_u32): Remove.
(__arm_vaddlvaq_u32): Remove.
(__arm_vaddlvaq_s32): Remove.
(__arm_vaddlvaq_p_s32): Remove.
(__arm_vaddlvaq_p_u32): Remove.
(__arm_vaddlvaq): Remove.
(__arm_vaddlvaq_p): Remove.

15 months agoarm: [MVE intrinsics] add unary_widen_acc shape
Christophe Lyon [Tue, 21 Feb 2023 21:36:44 +0000 (21:36 +0000)]
arm: [MVE intrinsics] add unary_widen_acc shape

This patch adds the unary_widen_acc shape description.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
* config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.

15 months agoarm: [MVE intrinsics] factorize vaddlvaq
Christophe Lyon [Tue, 21 Feb 2023 21:36:19 +0000 (21:36 +0000)]
arm: [MVE intrinsics] factorize vaddlvaq

Factorize vaddlvaq builtins so that they use parameterized names.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/iterators.md (mve_insn): Add vaddlva.
* config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
(@mve_<mve_insn>q_<supf>v4si): ... this.
(mve_vaddlvaq_p_<supf>v4si): Rename into ...
(@mve_<mve_insn>q_p_<supf>v4si): ... this.

15 months agoi386: Handle V4HI and V2SImode in ix86_widen_mult_cost [PR109807]
Uros Bizjak [Thu, 11 May 2023 18:54:24 +0000 (20:54 +0200)]
i386: Handle V4HI and V2SImode in ix86_widen_mult_cost [PR109807]

Do not crash when asking ix86_widen_mult_cost for the cost of
a widening mul operation to V4HI or V2SImode.

gcc/ChangeLog:

PR target/109807
* config/i386/i386.cc (ix86_widen_mult_cost):
Handle V4HImode and V2SImode.

gcc/testsuite/ChangeLog:

PR target/109807
* gcc.target/i386/pr109807.c: New test.

15 months agoImprove simple_dce for phis that only used in itself
Andrew Pinski [Thu, 11 May 2023 14:59:06 +0000 (07:59 -0700)]
Improve simple_dce for phis that only used in itself

While I was looking at differences before and after
r14-569-g21e2ef2dc25de3, I noticed that one phi node was
not being removed.
For an example, while compiling combine.cc, in expand_field_assignment,
we would remove `# pos_51 = PHI <pos_221(31), pos_51(30)>`
but we don't any more since pos_51 has more than zero users
but in this case it is only itself.
This patch improves simple_dce_from_worklist to detect that
case and now we able to remove this phi statement again.

OK? Bootstrapped and tested on x86_64-linux-gnu.

gcc/ChangeLog:

* tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
defined by a phi node with more than one uses, allow for the
only uses are in that same defining statement.

15 months agosyscall: add prlimit
Ian Lance Taylor [Wed, 19 Apr 2023 22:05:54 +0000 (15:05 -0700)]
syscall: add prlimit

As of https://go.dev/cl/476695 golang.org/x/sys/unix can call
syscall.prlimit, so we need such a function in libgo.

For golang/go#46279
Fixes golang/go#59712

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/486576

15 months agoc++: Add testcase for already fixed PR [PR103807]
Patrick Palka [Thu, 11 May 2023 14:38:02 +0000 (10:38 -0400)]
c++: Add testcase for already fixed PR [PR103807]

We accept this testcase since r13-806-g221acd67ca50f8.

PR c++/103807

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/lambda-targ1.C: New test.

15 months agoRISC-V: Allow vector constants in riscv_const_insns.
Robin Dapp [Wed, 26 Apr 2023 18:32:36 +0000 (20:32 +0200)]
RISC-V: Allow vector constants in riscv_const_insns.

This patch adds various vector constants to riscv_const_insns in order
for them to be properly recognized as immediate operands.  This then
allows to emit vmv.v.i instructions via autovectorization.

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_const_insns): Add permissible
vector constants.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vmv-imm-rv32.c: New test.
* gcc.target/riscv/rvv/autovec/vmv-imm-rv64.c: New test.
* gcc.target/riscv/rvv/autovec/vmv-imm-template.h: New test.
* gcc.target/riscv/rvv/autovec/vmv-imm-run.c: New test.

15 months agoc++: converted lambda as template argument [PR83258, ...]
Patrick Palka [Thu, 11 May 2023 14:04:25 +0000 (10:04 -0400)]
c++: converted lambda as template argument [PR83258, ...]

r8-1253-g3d2e25a240c711 removed the template argument linkage requirement
in convert_nontype_argument for C++17 (which r9-3836-g4be5c72cf3ea3e later
factored out into invalid_tparm_referent_p), but we need to also remove
the one in convert_nontype_argument_function for benefit of the first and
third testcase which we currently reject even in C++17/20 mode.

And in invalid_tparm_referent_p we're inadvertendly returning false for
the address of a lambda's static op() since it's DECL_ARTIFICIAL, which
currently causes us to reject the second (C++20) testcase.  But this
DECL_ARTIFICIAL check seems to be relevant only for VAR_DECL, and in fact
this code path was originally reachable only for VAR_DECL until recently
(r13-6970-gb5e38b1c166357).  So this patch restricts the check to VAR_DECL.

Co-authored-by: Jonathan Wakely <jwakely@redhat.com>
PR c++/83258
PR c++/80488
PR c++/97700

gcc/cp/ChangeLog:

* pt.cc (convert_nontype_argument_function): Remove linkage
requirement for C++17 and later.
(invalid_tparm_referent_p) <case ADDR_EXPR>: Restrict
DECL_ARTIFICIAL rejection test to VAR_DECL.

gcc/testsuite/ChangeLog:

* g++.dg/ext/visibility/anon8.C: Don't expect a "no linkage"
error for the template argument &B2:fn in C++17 mode.
* g++.dg/cpp0x/lambda/lambda-conv15.C: New test.
* g++.dg/cpp2a/nontype-class56.C: New test.
* g++.dg/template/function2.C: New test.

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