This was approved for C++26 last week at the WG21 meeting in Kona.
libstdc++-v3/ChangeLog:
* include/Makefile.am: Add new header.
* include/Makefile.in: Regenerate.
* include/bits/version.def (saturation_arithmetic): Define.
* include/bits/version.h: Regenerate.
* include/std/numeric: Include new header.
* include/bits/sat_arith.h: New file.
* testsuite/26_numerics/saturation/add.cc: New test.
* testsuite/26_numerics/saturation/cast.cc: New test.
* testsuite/26_numerics/saturation/div.cc: New test.
* testsuite/26_numerics/saturation/mul.cc: New test.
* testsuite/26_numerics/saturation/sub.cc: New test.
* testsuite/26_numerics/saturation/version.cc: New test.
Jakub Jelinek [Fri, 17 Nov 2023 14:43:31 +0000 (15:43 +0100)]
c++: Implement C++ DR 2406 - [[fallthrough]] attribute and iteration statements
The following patch implements
CWG 2406 - [[fallthrough]] attribute and iteration statements
The genericization of some loops leaves nothing at all or just a label
after a body of a loop, so if the loop is later followed by
case or default label in a switch, the fallthrough statement isn't
diagnosed.
The following patch implements it by marking the IFN_FALLTHROUGH call
in such a case, such that during gimplification it can be pedantically
diagnosed even if it is followed by case or default label or some normal
labels followed by case/default labels.
While looking into this, I've discovered other problems.
expand_FALLTHROUGH_r is removing the IFN_FALLTHROUGH calls from the IL,
but wasn't telling that to walk_gimple_stmt/walk_gimple_seq_mod, so
the callers would then skip the next statement after it, and it would
return non-NULL if the removed stmt was last in the sequence. This could
lead to wi->callback_result being set even if it didn't appear at the very
end of switch sequence.
The patch makes use of wi->removed_stmt such that the callers properly
know what happened, and use different way to handle the end of switch
sequence case.
That change discovered a bug in the gimple-walk handling of
wi->removed_stmt. If that flag is set, the callback is telling the callers
that the current statement has been removed and so the innermost
walk_gimple_seq_mod shouldn't gsi_next. The problem is that
wi->removed_stmt is only reset at the start of a walk_gimple_stmt, but that
can be too late for some cases. If we have two nested gimple sequences,
say GIMPLE_BIND as the last stmt of some gimple seq, we remove the last
statement inside of that GIMPLE_BIND, set wi->removed_stmt there, don't
do gsi_next correctly because already gsi_remove moved us to the next stmt,
there is no next stmt, so we return back to the caller, but wi->removed_stmt
is still set and so we don't do gsi_next even in the outer sequence, despite
the GIMPLE_BIND (etc.) not being removed. That means we walk the
GIMPLE_BIND with its whole sequence again.
The patch fixes that by resetting wi->removed_stmt after we've used that
flag in walk_gimple_seq_mod. Nothing really uses that flag after the
outermost walk_gimple_seq_mod, it is just a private notification that
the stmt callback has removed a stmt.
2023-11-17 Jakub Jelinek <jakub@redhat.com>
PR c++/107571
gcc/
* gimplify.cc (expand_FALLTHROUGH_r): Use wi->removed_stmt after
gsi_remove, change the way of passing fallthrough stmt at the end
of sequence to expand_FALLTHROUGH. Diagnose IFN_FALLTHROUGH
with GF_CALL_NOTHROW flag.
(expand_FALLTHROUGH): Change loc into array of 2 location_t elts,
don't test wi.callback_result, instead check whether first
elt is not UNKNOWN_LOCATION and in that case pedwarn with the
second location.
* gimple-walk.cc (walk_gimple_seq_mod): Clear wi->removed_stmt
after the flag has been used.
* internal-fn.def (FALLTHROUGH): Mention in comment the special
meaning of the TREE_NOTHROW/GF_CALL_NOTHROW flag on the calls.
gcc/c-family/
* c-gimplify.cc (genericize_c_loop): For C++ mark IFN_FALLTHROUGH
call at the end of loop body as TREE_NOTHROW.
gcc/testsuite/
* g++.dg/DRs/dr2406.C: New test.
Jonathan Wakely [Fri, 17 Nov 2023 12:52:45 +0000 (12:52 +0000)]
libstdc++: Add more Doxygen comments and another test for std::out_ptr
Improve Doxygen comments for std::out_ptr etc. and add a test for the
feature test macro. Also remove a redundant preprocessor condition.
Ideally the docs for std::out_ptr and std::inout_ptr would show examples
of how to use them and what they do, but that would take some effort.
I'll aim to do that before GCC 14 is released.
libstdc++-v3/ChangeLog:
* include/bits/out_ptr.h: Add Doxygen comments. Remove a
redundant preprocessor condition.
* testsuite/20_util/smartptr.adapt/version.cc: New test.
Jakub Jelinek [Fri, 17 Nov 2023 14:10:51 +0000 (15:10 +0100)]
match.pd: Optimize ctz/popcount/parity/ffs on extended argument [PR112566]
ctz(ext(X)) is the same as ctz(X) in the UB on zero case (or could be also
in the 2 argument case on large BITINT_TYPE by preserving the argument, not
implemented in this patch),
popcount(zext(X)) is the same as popcount(X),
parity(zext(X)) is the same as parity(X),
parity(sext(X)) is the same as parity(X) provided the bit difference between
the extended and unextended types is even,
ffs(ext(X)) is the same as ffs(X).
The following patch optimizes those in match.pd if those are beneficial
(always in the large BITINT_TYPE case, or if the narrower type has optab
and the wider doesn't, or the wider is larger than word and narrower is
one of the standard argument sizes (tested just int and long long, as
long is on most targets same bitsize as one of those two).
Joseph in the PR mentioned that ctz(narrow(X)) is the same as ctz(X)
if UB on 0, but that can be handled incrementally (and would need different
decisions when it is profitable).
And clz(zext(X)) is clz(X) + bit_difference, but not sure we want to change
that in match.pd at all, perhaps during insn selection?
2023-11-17 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/112566
PR tree-optimization/83171
* match.pd (ctz(ext(X)) -> ctz(X), popcount(zext(X)) -> popcount(X),
parity(ext(X)) -> parity(X), ffs(ext(X)) -> ffs(X)): New
simplifications.
( __builtin_ffs (X) == 0 -> X == 0): Use FFS rather than
BUILT_IN_FFS BUILT_IN_FFSL BUILT_IN_FFSLL BUILT_IN_FFSIMAX.
* gcc.dg/pr112566-1.c: New test.
* gcc.dg/pr112566-2.c: New test.
* gcc.target/i386/pr78057.c (foo): Pass another long long argument
and use it in __builtin_ia32_*zcnt_u64 instead of the int one.
Jakub Jelinek [Fri, 17 Nov 2023 14:09:44 +0000 (15:09 +0100)]
vect: Fix check_reduction_path [PR112374]
As mentioned in the PR, the intent of the r14-5076 changes was that
it doesn't count one of the uses on the use_stmt, but what actually
got implemented is that it does this processing on any op_use_stmt,
even if it is not the use_stmt statement, which means that it
can increase count even on debug stmts (-fcompare-debug failures),
or if there would be some other use stmt with 2+ uses it could count
that as a single use. Though, because it fails whenever cnt != 1
and I believe use_stmt must be one of the uses, it would probably
fail in the latter case anyway.
The following patch fixes that by doing this extra processing only when
op_use_stmt is use_stmt, and using the normal processing otherwise
(so ignore debug stmts, and increase on any uses on the stmt).
2023-11-17 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/112374
* tree-vect-loop.cc (check_reduction_path): Perform the cond_fn_p
special case only if op_use_stmt == use_stmt, use as_a rather than
dyn_cast in that case.
* gcc.dg/pr112374-1.c: New test.
* gcc.dg/pr112374-2.c: New test.
* g++.dg/opt/pr112374.C: New test.
Tobias Burnus [Fri, 17 Nov 2023 12:34:55 +0000 (13:34 +0100)]
Fortran: Accept -std=f2023, update line-length for Fortran 2023
This patch accepts -std=f2023, uses it by default and bumps for the
free-source form the line length to 10,000 and the statement length
alias number of continuation lines to unlimited.
gcc/fortran/ChangeLog:
* gfortran.texi (_gfortran_set_options): Document GFC_STD_F2023.
* invoke.texi (std,pedantic,Wampersand,Wtabs): Add -std=2023.
* lang.opt (std=f2023): Add.
* libgfortran.h (GFC_STD_F2023, GFC_STD_OPT_F23): Add.
* options.cc (set_default_std_flags): Add GFC_STD_F2023.
(gfc_init_options): Set max_continue_free to 1,000,000.
(gfc_post_options): Set flag_free_line_length if unset.
(gfc_handle_option): Add OPT_std_f2023, set max_continue_free = 255
for -std=f2003, f2008 and f2018.
Georg-Johann Lay [Fri, 17 Nov 2023 11:51:16 +0000 (12:51 +0100)]
PR target/53372: Don't ignore section attribute with address-space.
gcc/
PR target/53372
* config/avr/avr.cc (avr_asm_named_section) [AVR_SECTION_PROGMEM]:
Only return some .progmem*.data section if the user did not
specify a section attribute.
(avr_section_type_flags) [avr_progmem_p]: Unset SECTION_NOTYPE
in returned section flags.
gcc/testsuite/
PR target/53372
* gcc.target/avr/pr53372-1.c: New test.
* gcc.target/avr/pr53372-2.c: New test.
* config/loongarch/lsx.md (copysign<mode>3): Allow operand[2] to
be an reg_or_vector_same_val_operand. If it's a const vector
with same negative elements, expand the copysign with a bitset
instruction. Otherwise, force it into an register.
* config/loongarch/lasx.md (copysign<mode>3): Likewise.
gcc/testsuite/ChangeLog:
* g++.target/loongarch/vect-copysign-negconst.C: New test.
* g++.target/loongarch/vect-copysign-negconst-run.C: New test.
Haochen Gui [Fri, 17 Nov 2023 09:17:59 +0000 (17:17 +0800)]
rs6000: Fix regression cases caused 16-byte by pieces move
The previous patch enables 16-byte by pieces move. Originally 16-byte
move is implemented via pattern. expand_block_move does an optimization
on P8 LE to leverage V2DI reversed load/store for memory to memory move.
Now 16-byte move is implemented via by pieces move and finally split to
two DI load/store. This patch creates an insn_and_split pattern to
retake the optimization.
Haochen Gui [Fri, 17 Nov 2023 09:12:32 +0000 (17:12 +0800)]
rs6000: Enable vector mode for by pieces equality compare
This patch adds a new expand pattern - cbranchv16qi4 to enable vector
mode by pieces equality compare on rs6000. The macro MOVE_MAX_PIECES
(COMPARE_MAX_PIECES) is set to 16 bytes when EFFICIENT_UNALIGNED_VSX
is enabled, otherwise keeps unchanged. The macro STORE_MAX_PIECES is
set to the same value as MOVE_MAX_PIECES by default, so now it's
explicitly defined and keeps unchanged.
Li Wei [Fri, 17 Nov 2023 02:38:02 +0000 (10:38 +0800)]
LoongArch: Implement C[LT]Z_DEFINED_VALUE_AT_ZERO
The LoongArch has defined ctz and clz on the backend, but if we want GCC
do CTZ transformation optimization in forwprop2 pass, GCC need to know
the value of c[lt]z at zero, which may be beneficial for some test cases
(like spec2017 deepsjeng_r).
After implementing the macro, we test dynamic instruction count on
deepsjeng_r:
- before 1688423249186
- after 1660311215745 (1.66% reduction)
Richard Biener [Mon, 30 Oct 2023 12:17:11 +0000 (13:17 +0100)]
Assert we don't create recursive DW_AT_{abstract_origin,specification}
We have a support case that shows GCC 7 sometimes creates
DW_TAG_label refering to itself via a DW_AT_abstract_origin
when using LTO. This for example triggers the sanity check
added below during LTO bootstrap.
Making this check cover more than just DW_AT_abstract_origin
breaks bootstrap on trunk for
/* GNU extension: Record what type our vtable lives in. */
if (TYPE_VFIELD (type))
{
tree vtype = DECL_FCONTEXT (TYPE_VFIELD (type));
Jiahao Xu [Thu, 16 Nov 2023 08:44:36 +0000 (16:44 +0800)]
LoongArch: Increase cost of vector aligned store/load.
Based on SPEC2017 performance evaluation results, it's better to make them equal
to the cost of unaligned store/load so as to avoid odd alignment peeling.
Andrew Pinski [Mon, 13 Nov 2023 20:18:34 +0000 (20:18 +0000)]
Only allow (copysign x, NEG_CONST) -> (fneg (fabs x)) simplification for constant folding [PR112483]
On targets with native copysign instructions, (copysign x, -1) is
usually more efficient than (fneg (fabs x)). Since r14-5284, in the
middle end we always optimize (fneg (fabs x)) to (copysign x, -1), not
vice versa. If the target does not support native fcopysign,
expand_COPYSIGN will expand it as (fneg (fabs x)) anyway.
gcc/ChangeLog:
PR rtl-optimization/112483
* simplify-rtx.cc (simplify_binary_operation_1) <case COPYSIGN>:
Call simplify_unary_operation for NEG instead of
simplify_gen_unary.
Uros Bizjak [Thu, 16 Nov 2023 17:07:36 +0000 (18:07 +0100)]
i386: Optimize QImode insn with high input registers
Sometimes the compiler emits the following code with <insn>qi_ext<mode>_0:
shrl $8, %eax
addb %bh, %al
Patch introduces new low part QImode insn patterns with both of
their input arguments extracted from high register. This invalid
insn is split after reload to a move from the high register
and <insn>qi_ext<mode>_0 instruction. The combine pass is able to
convert shift to zero/sign-extract sub-RTX, which we split to the
optimal:
movzbl %bh, %edx
addb %ah, %dl
PR target/78904
gcc/ChangeLog:
* config/i386/i386.md (*addqi_ext2<mode>_0):
New define_insn_and_split pattern.
(*subqi_ext2<mode>_0): Ditto.
(*<code>qi_ext2<mode>_0): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr78904-10.c: New test.
* gcc.target/i386/pr78904-10a.c: New test.
* gcc.target/i386/pr78904-10b.c: New test.
hppa: Revise REG+D address support to allow long displacements before reload
In analyzing PR rtl-optimization/112415, I realized that restricting
REG+D offsets to 5-bits before reload results in very poor code and
complexities in optimizing these instructions after reload. The
general problem is long displacements are not allowed for floating
point accesses when generating PA 1.1 code. Even with PA 2.0, there
is a ELF linker bug that prevents using long displacements for
floating point loads and stores.
In the past, enabling long displacements before reload caused issues
in reload. However, there have been fixes in the handling of reloads
for floating-point accesses. This change allows long displacements
before reload and corrects a couple of issues in the constraint
handling for integer and floating-point accesses.
2023-11-16 John David Anglin <danglin@gcc.gnu.org>
gcc/ChangeLog:
PR rtl-optimization/112415
* config/pa/pa.cc (pa_legitimate_address_p): Allow 14-bit
displacements before reload. Simplify logic flow. Revise
comments.
* config/pa/pa.h (TARGET_ELF64): New define.
(INT14_OK_STRICT): Update define and comment.
* config/pa/pa64-linux.h (TARGET_ELF64): Define.
* config/pa/predicates.md (base14_operand): Don't check
alignment of short displacements.
(integer_store_memory_operand): Don't return true when
reload_in_progress is true. Remove INT_5_BITS check.
(floating_point_store_memory_operand): Don't return true when
reload_in_progress is true. Use INT14_OK_STRICT to check
whether long displacements are always okay.
Eric Botcazou [Thu, 16 Nov 2023 17:36:44 +0000 (18:36 +0100)]
Fix internal error on function returning dynamically-sized type
This is a tree sharing issue for the internal return type synthesized for
a function returning a dynamically-sized type and taking an Out or In/Out
parameter passed by copy.
gcc/ada/
* gcc-interface/decl.cc (gnat_to_gnu_subprog_type): Also create a
TYPE_DECL for the return type built for the CI/CO mechanism.
gcc/testsuite/
* gnat.dg/varsize4.ads, gnat.dg/varsize4.adb: New test.
* gnat.dg/varsize4_pkg.ads: New helper.
Jonathan Wakely [Thu, 16 Nov 2023 16:11:18 +0000 (16:11 +0000)]
libstdc++: Fix aligned formatting of stacktrace_entry and thread::id [PR112564]
The formatter for std::thread::id should default to right-align, and the
formatter for std::stacktrace_entry should not just ignore the
fill-and-align and width from the format-spec!
libstdc++-v3/ChangeLog:
PR libstdc++/112564
* include/std/stacktrace (formatter::format): Format according
to format-spec.
* include/std/thread (formatter::format): Use _Align_right as
default.
* testsuite/19_diagnostics/stacktrace/output.cc: Check
fill-and-align handling. Change compile test to run.
* testsuite/30_threads/thread/id/output.cc: Check fill-and-align
handling.
Jakub Jelinek [Thu, 16 Nov 2023 16:42:22 +0000 (17:42 +0100)]
c++: Fix error recovery ICE [PR112365]
check_field_decls for DECL_C_BIT_FIELD FIELD_DECLs with error_mark_node
TREE_TYPE continues early and doesn't call check_bitfield_decl which would
either set DECL_BIT_FIELD, or clear DECL_C_BIT_FIELD. So, the following
testcase ICEs after emitting tons of errors, because
SET_DECL_FIELD_CXX_ZERO_WIDTH_BIT_FIELD asserts DECL_BIT_FIELD.
The patch skips that for FIELD_DECLs with error_mark_node, another
option would be to check DECL_BIT_FIELD in addition to DECL_C_BIT_FIELD.
2023-11-16 Jakub Jelinek <jakub@redhat.com>
PR c++/112365
* class.cc (layout_class_type): Don't
SET_DECL_FIELD_CXX_ZERO_WIDTH_BIT_FIELD on FIELD_DECLs with
error_mark_node type.
Patrick Palka [Thu, 16 Nov 2023 14:32:07 +0000 (09:32 -0500)]
c++: constantness of call to function pointer [PR111703]
potential_constant_expression for CALL_EXPR tests FUNCTION_POINTER_TYPE_P
on the callee rather than on the type of the callee, which means we
always pass want_rval=any when recursing and so may fail to identify a
non-constant function pointer callee as such. Fixing this turns out to
further work around PR111703.
David Malcolm [Thu, 16 Nov 2023 13:29:19 +0000 (08:29 -0500)]
diagnostics: make m_lang_mask private
No functional change intended.
gcc/ChangeLog:
* diagnostic.cc (diagnostic_context::set_option_hooks): Add
"lang_mask" param.
* diagnostic.h (diagnostic_context::option_enabled_p): Update for
move of m_lang_mask.
(diagnostic_context::set_option_hooks): Add "lang_mask" param.
(diagnostic_context::get_lang_mask): New.
(diagnostic_context::m_lang_mask): Move into m_option_callbacks,
thus making private.
* lto-wrapper.cc (main): Update for new lang_mask param of
set_option_hooks.
* toplev.cc (init_asm_output): Use get_lang_mask.
(general_init): Move initialization of global_dc's lang_mask to
new lang_mask param of set_option_hooks.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
Tamar Christina [Thu, 16 Nov 2023 12:11:22 +0000 (12:11 +0000)]
middle-end: skip checking loop exits if loop malformed [PR111878]
Before my refactoring if the loop->latch was incorrect then find_loop_location
skipped checking the edges and would eventually return a dummy location.
It turns out that a loop can have
loops_state_satisfies_p (LOOPS_HAVE_RECORDED_EXITS) but also not have a latch
in which case get_loop_exit_edges traps.
Jonathan Wakely [Wed, 15 Nov 2023 23:02:34 +0000 (23:02 +0000)]
libstdc++: Implement std::out_ptr and std::inout_ptr for C++23 [PR111667]
This implements that changes from P1132R8, including optimized paths for
std::shared_ptr and std::unique_ptr.
For std::shared_ptr we pre-allocate a new control block in the
std::out_ptr_t constructor so that the destructor is non-throwing. This
requires some care because unlike the shared_ptr(Y*, D, A) constructor,
we don't want to invoke the deleter if allocating the control block
throws, because we don't own any pointer yet. In order to avoid the
unwanted deleter invocation, we create the control block manually. We
also want to avoid invoking the deleter on a null pointer on
destruction, so we destroy the control block manually if there is no
pointer to take ownership of.
For std::unique_ptr and for raw pointers, the out_ptr_t object hands out
direct access to the pointer, so that we don't have anything to do
(except possibly assign a new deleter) in the ~out_ptr_t destructor.
These optimizations avoid requiring additional temporary storage for the
pointer (and optional arguments), and avoid additional instructions to
copy that pointer into the smart pointer at the end.
libstdc++-v3/ChangeLog:
PR libstdc++/111667
* include/Makefile.am: Add new header.
* include/Makefile.in: Regenerate.
* include/bits/out_ptr.h: New file.
* include/bits/shared_ptr.h (__is_shared_ptr): Move definition
to here ...
* include/bits/shared_ptr_atomic.h (__is_shared_ptr): ... from
here.
* include/bits/shared_ptr_base.h (__shared_count): Declare
out_ptr_t as a friend.
(_Sp_counted_deleter, __shared_ptr): Likewise.
* include/bits/unique_ptr.h (unique_ptr, unique_ptr<T[], D>):
Declare out_ptr_t and inout_ptr_t as friends.
(__is_unique_ptr): Define new variable template.
* include/bits/version.def (out_ptr): Define.
* include/bits/version.h: Regenerate.
* include/std/memory: Include new header.
* testsuite/20_util/smartptr.adapt/inout_ptr/1.cc: New test.
* testsuite/20_util/smartptr.adapt/inout_ptr/2.cc: New test.
* testsuite/20_util/smartptr.adapt/inout_ptr/shared_ptr_neg.cc:
New test.
* testsuite/20_util/smartptr.adapt/inout_ptr/void_ptr.cc: New
test.
* testsuite/20_util/smartptr.adapt/out_ptr/1.cc: New test.
* testsuite/20_util/smartptr.adapt/out_ptr/2.cc: New test.
* testsuite/20_util/smartptr.adapt/out_ptr/shared_ptr_neg.cc:
New test.
* testsuite/20_util/smartptr.adapt/out_ptr/void_ptr.cc: New
test.
Jonathan Wakely [Tue, 19 Sep 2023 16:46:32 +0000 (17:46 +0100)]
libstdc++: Only declare feature test macros in standard headers
This change moves the definitions of feature test macros (or strictly
speaking, the requests for <bits/version.h> to define them) so that only
standard headers define them. For example, <bits/shared_ptr.h> will no
longer define macros related to std::shared_ptr, only <memory> and
<version> will define them. This means that __cpp_lib_shared_ptr_arrays
will not be defined by <future> or by other headers that include
<bits/shared_ptr.h>. It will only be defined when <memory> has been
included. This will discourage users from relying on transitive
includes.
As a result, internal headers that need to query the macros should use
the internal macros like __glibcxx_shared_ptr_arrays instead of
__cpp_lib_shared_ptr_arrays, as those internal macros are defined by the
internal headers after icluding <bits/version.h>. There are some
exceptions to this rule, because __cpp_lib_is_constant_evaluated is
defined by bits/c++config.h and so is available everywhere, and
__cpp_lib_three_way_comparison is defined by <compare> which several
headers are explicitly specified to include, so its macro is guaranteed
to be usable too.
N.B. not many internal headers actually need an explicit include of
<bits/version.h>, because most of them include <type_traits> and so get
all the __glibcxx_foo internal macros from there.
Jonathan Wakely [Tue, 19 Sep 2023 16:46:32 +0000 (17:46 +0100)]
libstdc++: Test for feature test macros more accurately
Tests which check for feature test macros should use the no_pch option,
so that we're really testing for the definition being in the intended
header, and not just testing that it's present in <bits/stdc++.h> (which
includes all the standard headers and so defines all the macros).
Jonathan Wakely [Tue, 14 Nov 2023 19:22:47 +0000 (19:22 +0000)]
libstdc++: Use 202100L as feature test check for C++23
I noticed that our C++23 features were not being defined when using
Clang 16 with -std=c++2b, because it only defines __cplusplus=202101L
but <bits/version.h> uses 202302L since my r14-3252-g0c316669b092fb
change.
This changes <bits/version.h> to use 202100 instead of the final 202302
value so that we support Clang 16's -std=c++2b mode.
libstdc++-v3/ChangeLog:
* include/bits/version.def (stds): Use >= 202100 for C++23
condition.
* include/bits/version.h: Regenerate.
* include/std/thread: Use > C++20 instead of >= C++23 for
__cplusplus condition.
Jonathan Wakely [Tue, 14 Nov 2023 15:48:03 +0000 (15:48 +0000)]
libstdc++: Adjust feature test in <istream> and <ostream>
We don't need any library concepts to define the constraints for rvalue
stream overloads, only compiler support. So change the test from using
__cpp_lib_concepts to __cpp_concepts >= 201907L.
libstdc++-v3/ChangeLog:
* include/std/istream (__rvalue_stream_extraction_t): Test
__cpp_concepts instead of __cpp_lib_concepts.
* include/std/ostream (__derived_from_ios_base): Likewise.
(__rvalue_stream_insertion_t): Likewise.
The following testcase is miscompiled on x86_64 since PR110551 r14-4968
commit. That commit added 2 peephole2s, one for
mov imm,%rXX; mov %rYY,%rax; mulq %rXX -> mov imm,%rax; mulq %rYY
which I believe is ok, and another one for
mov imm,%rXX; mov %rYY,%rdx; mulx %rXX, %rZZ, %rWW -> mov imm,%rdx; mulx %rYY, %rZZ, %rWW
which is wrong. Both peephole2s verify that %rXX above is dead at
the end of the pattern, by checking if %rXX is either one of the
registers overwritten in the multiplication (%rdx:%rax in the first
case, the 2 destination registers of mulx in the latter case), because
we no longer set %rXX to that immediate (we set %rax resp. %rdx to it
instead) when the peephole2 replaces it. But, we also need to ensure
that the other register previously set to the value of %rYY and newly
to imm isn't used after the multiplication, and neither of the peephole2s
does that. Now, for the first one (at least assuming in the % pattern
the matching operand (i.e. hardcoded %rax resp. %rdx) after RA will always go
first) I think it is always the case, because operands[2] if it must be %rax
register will be overwritten by mulq writing to %rdx:%rax. But in the
second case, there is no reason why %rdx couldn't be used after the pattern,
and if it is (like in the testcase), we can't make those changes.
So, the patch checks similarly to operands[0] that operands[2] (which ought
to be %rdx if RA puts the % match_dup operand first and nothing swaps it
afterwards) is either the same register as one of the destination registers
of mulx or dies at the end of the multiplication.
2023-11-16 Jakub Jelinek <jakub@redhat.com>
PR target/112526
* config/i386/i386.md
(mov imm,%rax; mov %rdi,%rdx; mulx %rax -> mov imm,%rdx; mulx %rdi):
Verify in define_peephole2 that operands[2] dies or is overwritten
at the end of multiplication.
Jakub Jelinek [Thu, 16 Nov 2023 07:32:24 +0000 (08:32 +0100)]
slp: Fix handling of IFN_CLZ/CTZ [PR112536]
We ICE on the following testcase now that IFN_C[LT]Z calls can have one or
two arguments (where 2 mean it is well defined at zero).
The following patch makes us create child node only for the first argument
and compatible_calls_p ensures the other argument is the same, which
at least according to the testcase seems sufficient because of vect
patterns.
2023-11-16 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/112536
* tree-vect-slp.cc (arg0_map): New variable.
(vect_get_operand_map): For IFN_CLZ or IFN_CTZ, return arg0_map.
Juzhe-Zhong [Thu, 16 Nov 2023 02:58:16 +0000 (10:58 +0800)]
VECT: Clear LOOP_VINFO_USING_SELECT_VL_P when loop is not partial vectorized
This patch fixes ICE:
https://godbolt.org/z/z8T6o6qov
<source>: In function 'b':
<source>:2:6: error: missing definition
2 | void b() {
| ^
for SSA_NAME: loop_len_8 in statement:
_1 = -loop_len_8;
during GIMPLE pass: vect
<source>:2:6: internal compiler error: verify_ssa failed
0x7f1b56331082 __libc_start_main
???:0
Please submit a full bug report, with preprocessed source (by using -freport-bug).
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.
Compiler returned: 1
The root cause is we generate such IR in vectorization:
The IR _18 = vect_vec_iv_.6_14 + vect_cst__11; is generated because of we are adding induction variable with
the result of SELECT_VL instead of VF.
The code is:
else if (LOOP_VINFO_USING_SELECT_VL_P (loop_vinfo))
{
/* When we're using loop_len produced by SELEC_VL, the non-final
iterations are not always processing VF elements. So vectorize
induction variable instead of
LOOP_VINFO_USING_SELECT_VL_P is set before loop vectorization analysis so we don't know whether it is partial
vectorization or not but the induction variable depends on SELECT_VL_P is true.
So update SELECT_VL_P as false when it is not partial vectorization.
PR middle-end/112554
gcc/ChangeLog:
* tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
Clear SELECT_VL_P for non-partial vectorization.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/pr112554.c: New test.
Tom Tromey [Wed, 15 Nov 2023 05:27:52 +0000 (22:27 -0700)]
Fix crash in libcc1
The gdb tests of the libcc1 plugin have been failing lately. I
tracked this down to a crash trying to access an enum's underlying
type. This patch fixes the crash by setting this type.
* libcc1plugin.cc (plugin_build_enum_type): Set
ENUM_UNDERLYING_TYPE.
Marek Polacek [Thu, 9 Nov 2023 17:25:25 +0000 (12:25 -0500)]
c++: fix parsing with auto(x) [PR112410]
Here we are wrongly parsing
int y(auto(42));
which uses the C++23 cast-to-prvalue feature, and initializes y to 42.
However, we were treating the auto as an implicit template parameter.
Fixing the auto{42} case is easy, but when auto is followed by a (,
I found the fix to be much more involved. For instance, we cannot
use cp_parser_expression, because that can give hard errors. It's
also necessary to disambiguate 'auto(i)' as 'auto i', not a cast.
auto(), auto(int), auto(f)(int), auto(*), auto(i[]), auto(...), etc.
are all function declarations.
This patch rectifies that by undoing the implicit function template
modification. In the test above, we should notice that the parameter
list is ill-formed, and since we've synthesized an implicit template
parameter, we undo it by calling abort_fully_implicit_template. Then,
we'll parse the "(auto(42))" as an initializer.
PR c++/112410
gcc/cp/ChangeLog:
* parser.cc (cp_parser_direct_declarator): Maybe call
abort_fully_implicit_template if it turned out the parameter list was
ill-formed.
gcc/testsuite/ChangeLog:
* g++.dg/cpp23/auto-fncast13.C: New test.
* g++.dg/cpp23/auto-fncast14.C: New test.
Hongyu Wang [Thu, 9 Nov 2023 05:11:41 +0000 (13:11 +0800)]
[i386] APX: Fix EGPR usage in several patterns.
For vextract/insert{if}128 they cannot adopt EGPR in their memory operand, all
related pattern should be adjusted to disable EGPR usage on them.
Also fix a wrong gpr16 attr for insertps.
gcc/ChangeLog:
* config/i386/sse.md (vec_extract_hi_<mode>): Add noavx512vl
alternative with attr addr gpr16 and "jm" constraint.
(vec_extract_hi_<mode>): Likewise for SF vector modes.
(@vec_extract_hi_<mode>): Likewise.
(*vec_extractv2ti): Likewise.
(vec_set_hi_<mode><mask_name>): Likewise.
* config/i386/mmx.md (@sse4_1_insertps_<mode>): Correct gpr16 attr for
each alternative.
Patch introduces strict_low_part QImode insn patterns with both of
their input arguments extracted from high register. This invalid
insn is split after reload to a lowpart insert from the high register
and <insn>qi_ext<mode>_1_slp instruction.
PR target/78904
gcc/ChangeLog:
* config/i386/i386.md (*movstrictqi_ext<mode>_1): New insn pattern.
(*addqi_ext<mode>_2_slp): New define_insn_and_split pattern.
(*subqi_ext<mode>_2_slp): Ditto.
(*<any_logic:code>qi_ext<mode>_2_slp): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr78904-8.c: New test.
* gcc.target/i386/pr78904-8a.c: New test.
* gcc.target/i386/pr78904-8b.c: New test.
* gcc.target/i386/pr78904-9.c: New test.
* gcc.target/i386/pr78904-9a.c: New test.
* gcc.target/i386/pr78904-9b.c: New test.
Mark Wielaard [Wed, 15 Nov 2023 19:27:08 +0000 (20:27 +0100)]
Regenerate libiberty/aclocal.m4 with aclocal 1.15.1
There is a new buildbot check that all autotool files are generated
with the correct versions (automake 1.15.1 and autoconf 2.69).
https://builder.sourceware.org/buildbot/#/builders/gcc-autoregen
Correct one file that was generated with the wrong version.
Patrick O'Neill [Tue, 14 Nov 2023 23:08:31 +0000 (15:08 -0800)]
RISC-V: Fix ICE in non-canonical march parsing
Passing in a base extension in non-canonical order (i, e, g) causes GCC
to ICE:
xgcc: error: '-march=rv64ge': ISA string is not in canonical order. 'e'
xgcc: internal compiler error: in add, at common/config/riscv/riscv-common.cc:671
...
This is fixed by skipping to the next extension when a non-canonical
order is detected.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc
(riscv_subset_list::parse_std_ext): Emit an error and skip to
the next extension when a non-canonical ordering is detected.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-27.c: New test.
* gcc.target/riscv/arch-28.c: New test.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
r14-985-gca2007a9bb3074 used the collapsed macro definition
CAN_HAVE_LOCATION_P in gcc-rich-location.cc and r14-977-g8861c80733da5c
in c++'s build_cplus_array_type ().
However, although otherwise correct, the usage of CAN_HAVE_LOCATION_P
in these two spots is misleading, so this patch reverts aforementioned
two hunks.
gcc/cp/ChangeLog:
* tree.cc (build_cplus_array_type): Revert using the macro
CAN_HAVE_LOCATION_P.
gcc/ChangeLog:
* gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text):
Revert using the macro CAN_HAVE_LOCATION_P.
We should first insert earliest fusion since it is the vsetvls information
already there which was seen by later LCM. We just delay the insertion.
So it should be come before the LCM suggested insertion.
PR target/112447
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (pre_vsetvl::emit_vsetvl): Insert
local vsetvl info before LCM suggested one.
Vineet Gupta [Wed, 25 Oct 2023 03:38:49 +0000 (20:38 -0700)]
RISC-V: elide unnecessary sign extend when expanding cmp_and_jump
RV64 compare and branch instructions only support 64-bit operands.
At Expand time, the backend conservatively zero/sign extends
its operands even if not needed, such as incoming function args
which ABI/ISA guarantee to be sign-extended already (this is true for
SI, HI, QI operands)
And subsequently REE fails to eliminate them as
"missing defintion(s)" or "multiple definition(s)
since function args don't have explicit definition.
So during expand riscv_extend_comparands (), if an operand is a
subreg-promoted SI with inner DI, which is representative of a function
arg, just peel away the subreg to expose the DI, eliding the sign
extension. As Jeff noted this routine is also used in if-conversion so
potentially can also help there.
Note there's currently patches floating around to improve REE and also a
new pass to eliminate unneccesary extensions, but it is still beneficial
to not generate those extra extensions in first place. It is obviously
less work for post-reload passes such as REE, but even for earlier
passes, such as combine, having to deal with one less thing and ensuing
fewer combinations is a win too.
Way too many existing tests used to observe this issue.
e.g. gcc.c-torture/compile/20190827-1.c -O2 -march=rv64gc
It elimiates the SEXT.W
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_sign_extend_if_not_subreg_prom): New.
* (riscv_extend_comparands): Call New function on operands.
Patrick Palka [Wed, 15 Nov 2023 17:24:38 +0000 (12:24 -0500)]
c++: direct enum init from type-dep elt [PR112515]
The NON_DEPENDENT_EXPR removal exposed that is_direct_enum_init can be
called in a template context on a CONSTRUCTOR that isn't type-dependent
but whose element is.
PR c++/112515
gcc/cp/ChangeLog:
* decl.cc (is_direct_enum_init): Check type-dependence of the
single element.
Patrick Palka [Wed, 15 Nov 2023 17:17:55 +0000 (12:17 -0500)]
c++: partially inst requires-expr in noexcept-spec [PR101043]
Here we're ICEing from strip_typedefs for the partially instantiated
requires-expression when walking its REQUIRES_EXPR_EXTRA_ARGS which
in this case is a TREE_LIST with non-empty TREE_PURPOSE (to hold the
captured local specialization 't' as per build_extra_args) which
strip_typedefs doesn't expect.
We can probably skip walking REQUIRES_EXPR_EXTRA_ARGS at all since it
shouldn't contain any typedefs in the first place, but it seems safer
and more generally useful to just teach strip_typedefs to handle non-empty
TREE_PURPOSE the obvious way. (The code asserts TREE_PURPOSE was empty
even since since its inception i.e. r189298.)
Patrick Palka [Wed, 15 Nov 2023 17:10:16 +0000 (12:10 -0500)]
c++: non-dependent .* operand folding [PR112427]
Here when building up the non-dependent .* expression, we crash from
fold_convert on 'b.a' due to this (templated) COMPONENT_REF having an
IDENTIFIER_NODE instead of FIELD_DECL operand that middle-end routines
expect. Like in r14-4899-gd80a26cca02587, this patch fixes this by
replacing the problematic piecemeal folding with a single call to
cp_fully_fold. Also, don't bother building the POINTER_PLUS_EXPR in a
template context. This means the returned non-dependent tree might not
have TREE_SIDE_EFFECTS set when it used to, so we need to compensate
by making build_min_non_dep propagate TREE_SIDE_EFFECTS from the original
arguments like buildN and build_min do.
PR c++/112427
gcc/cp/ChangeLog:
* tree.cc (build_min_non_dep): Propagate TREE_SIDE_EFFECTS from
the original arguments.
(build_min_non_dep_call_vec): Likewise.
* typeck2.cc (build_m_component_ref): Use cp_convert, build2 and
cp_fully_fold instead of fold_build_pointer_plus and fold_convert.
Don't build the POINTER_PLUS_EXPR in a template context.
Patrick Palka [Wed, 15 Nov 2023 17:03:16 +0000 (12:03 -0500)]
c++: constantness of local var in constexpr fn [PR111703, PR112269]
potential_constant_expression was incorrectly treating most local
variables from a constexpr function as constant because it wasn't
considering the 'now' parameter. This patch fixes this by relaxing
its var_in_maybe_constexpr_fn checks accordingly, which turns out to
partially fix two recently reported regressions:
PR111703 is a regression caused by r11-550-gf65a3299a521a4 for restricting
constexpr evaluation during warning-dependent folding. The mechanism is
intended to restrict only constant evaluation of the instantiated
non-dependent expression, but it also ends up restricting constant
evaluation occurring during instantiation of the expression, in particular
when instantiating the converted argument 'x' (a VIEW_CONVERT_EXPR) into
a copy constructor call. This seems like a flaw in the mechanism, though
I don't know if we want to fix the mechanism or get rid of it completely
since the original testcases which motivated the mechanism are fixed more
simply by r13-1225-gb00b95198e6720. In any case, this patch partially
fixes this by making us correctly treat 'x' as non-constant which prevents
the problematic warning-dependent folding from occurring at all.
PR112269 is caused by r14-4796-g3e3d73ed5e85e7 for merging tsubst_copy
into tsubst_copy_and_build. tsubst_copy used to exit early when 'args'
was empty, behavior which that commit deliberately didn't preserve.
This early exit masked the fact that COMPLEX_EXPR wasn't handled by
tsubst at all, and is a tree code that apparently we could see during
warning-dependent folding on some targets. A complete fix is to add
handling for this tree code in tsubst_expr, but this patch should fix
the reported testsuite failures since the COMPLEX_EXPRs that crop up
in <complex> are considered non-constant expressions after this patch.
PR c++/111703
PR c++/112269
gcc/cp/ChangeLog:
* constexpr.cc (potential_constant_expression_1) <case VAR_DECL>:
Only consider var_in_maybe_constexpr_fn if 'now' is false.
<case INDIRECT_REF>: Likewise.
Roger Sayle [Wed, 7 Jun 2023 23:09:00 +0000 (00:09 +0100)]
Update nvptx's bitrev<mode>2 pattern to use BITREVERSE rtx.
This minor tweak to the nvptx backend switches the representation of
of the brev instruction from an UNSPEC to instead use the new BITREVERSE
rtx. This allows various RTL optimizations including evaluation (constant
folding) of integer constant arguments at compile-time.
Thomas Schwinge [Mon, 4 Sep 2023 21:06:27 +0000 (23:06 +0200)]
nvptx: Extend 'brev' test cases
In order to observe effects of a later patch, extend the 'brev' test cases
added in commit c09471fbc7588db2480f036aa56a2403d3c03ae5
"nvptx: Add suppport for __builtin_nvptx_brev instrinsic".
gcc/testsuite/
* gcc.target/nvptx/brev-1.c: Extend.
* gcc.target/nvptx/brev-2.c: Rename to...
* gcc.target/nvptx/brev-2-O2.c: ... this, and extend. Copy to...
* gcc.target/nvptx/brev-2-O0.c: ... this, and adapt for '-O0'.
* gcc.target/nvptx/brevll-1.c: Extend.
* gcc.target/nvptx/brevll-2.c: Rename to...
* gcc.target/nvptx/brevll-2-O2.c: ... this, and extend. Copy to...
* gcc.target/nvptx/brevll-2-O0.c: ... this, and adapt for '-O0'.
Andrew Stubbs [Tue, 3 Oct 2023 13:03:49 +0000 (14:03 +0100)]
amdgcn: Add Accelerator VGPR registers
Add the new CDNA register file. We don't support any of the specialized
instructions that use these registers, but they're useful to relieve
register pressure without spilling to stack.
Co-authored-by: Andrew Jenner <andrew@codesourcery.com>
gcc/ChangeLog:
* gcc.target/gcn/avgpr-mem-double.c: New test.
* gcc.target/gcn/avgpr-mem-int.c: New test.
* gcc.target/gcn/avgpr-mem-long.c: New test.
* gcc.target/gcn/avgpr-mem-short.c: New test.
* gcc.target/gcn/avgpr-spill-double.c: New test.
* gcc.target/gcn/avgpr-spill-int.c: New test.
* gcc.target/gcn/avgpr-spill-long.c: New test.
* gcc.target/gcn/avgpr-spill-short.c: New test.
libgomp/ChangeLog:
* plugin/plugin-gcn.c (max_isa_vgprs): New.
(run_kernel): CDNA2 devices have more VGPRs.
Andrew Stubbs [Fri, 6 Oct 2023 10:14:05 +0000 (11:14 +0100)]
amdgcn: simplify secondary reload patterns
Remove some unnecessary complexity; no functional change is intended,
although LRA appears to use the constraints from the reload_in/out
patterns, so it's probably an improvement for it to see the real sgprbase
constraints.
Richard Biener [Wed, 15 Nov 2023 11:24:46 +0000 (12:24 +0100)]
tree-optimization/112282 - wrong-code with ifcvt hoisting
The following avoids hoisting of invariants from conditionally
executed parts of an if-converted loop. That now makes a difference
since we perform bitfield lowering even when we do not actually
if-convert the loop. if-conversion deals with resetting flow-sensitive
info when necessary already.
PR tree-optimization/112282
* tree-if-conv.cc (ifcvt_hoist_invariants): Only hoist from
the loop header.
So that we don't have to bump libubsan.so.1 SONAME, the following patch
reverts part of the changes which removed two handlers. While we don't
actually use them from GCC, we shouldn't remove supported entrypoints
unless SONAME is changed (removal of __interceptor_* or ___interceptor_*
is fine). This is the only removal, other libraries just added some
symbols.
2023-11-15 Jakub Jelinek <jakub@redhat.com>
* ubsan/ubsan_handlers_cxx.h (FunctionTypeMismatchData): Forward
declare.
(__ubsan_handle_function_type_mismatch_v1,
__ubsan_handle_function_type_mismatch_v1_abort): Declare.
* ubsan/ubsan_handlers_cxx.cpp (handleFunctionTypeMismatch,
__ubsan_handle_function_type_mismatch_v1,
__ubsan_handle_function_type_mismatch_v1_abort): New functions readded
for backwards compatibility from older ubsan.
* ubsan/ubsan_interface.inc (__ubsan_handle_function_type_mismatch_v1,
__ubsan_handle_function_type_mismatch_v1_abort): Readd.
Jakub Jelinek [Wed, 15 Nov 2023 11:48:20 +0000 (12:48 +0100)]
libsanitizer: Adjust the asan/sanity-check-pure-c-1.c test
The updated libasan doesn't print __interceptor_free (or __interceptor_malloc)
but free (or malloc), the following patch adjusts the testcase so that it
accepts it.
2023-11-15 Jakub Jelinek <jakub@redhat.com>
* c-c++-common/asan/sanity-check-pure-c-1.c: Adjust for interceptor_
or wrap_ substrings possibly not being emitted in newer libasan.
The following patch is result of libsanitizer/merge.sh
from c425db2eb558c263 (yesterday evening).
Bootstrapped/regtested on x86_64-linux and i686-linux (together with
the follow-up 3 patches I'm about to post).
BTW, seems upstream has added riscv64 support for I think lsan/tsan,
so if anyone is willing to try it there, it would be a matter of
copying e.g. the s390*-*-linux* libsanitizer/configure.tgt entry
to riscv64-*-linux* with the obvious s/s390x/riscv64/ change in it.
But the compare and swap operation is allowed to fail, and if it fails
the SC instruction is not executed, thus the guarantee of acquiring
semantics cannot be ensured. Therefore, an acquire barrier needs to be
generated when failure_memorder includes an acquire operation.
On CPUs implementing LoongArch v1.10 or later, "dbar 0b10100" is an
acquire barrier; on CPUs implementing LoongArch v1.00, it is a full
barrier. So it's always enough for acquire semantics. OTOH if an
acquire semantic is not needed, we still needs the "dbar 0x700" as the
load-load barrier like all LL-SC loops.
* config/loongarch/loongarch.cc
(loongarch_memmodel_needs_release_fence): Remove.
(loongarch_cas_failure_memorder_needs_acquire): New static
function.
(loongarch_print_operand): Redefine 'G' for the barrier on CAS
failure.
* config/loongarch/sync.md (atomic_cas_value_strong<mode>):
Remove the redundant barrier before the LL instruction, and
emit an acquire barrier on failure if needed by
failure_memorder.
(atomic_cas_value_cmp_and_7_<mode>): Likewise.
(atomic_cas_value_add_7_<mode>): Remove the unnecessary barrier
before the LL instruction.
(atomic_cas_value_sub_7_<mode>): Likewise.
(atomic_cas_value_and_7_<mode>): Likewise.
(atomic_cas_value_xor_7_<mode>): Likewise.
(atomic_cas_value_or_7_<mode>): Likewise.
(atomic_cas_value_nand_7_<mode>): Likewise.
(atomic_cas_value_exchange_7_<mode>): Likewise.
The Xmethod for std::deque::operator[] has the same bug that I recently
fixed for the std::deque::size() Xmethod. The first node might have
unused capacity at the start, which needs to be accounted for when
indexing into the deque.
libstdc++-v3/ChangeLog:
PR libstdc++/112491
* python/libstdcxx/v6/xmethods.py (DequeWorkerBase.index):
Correctly handle unused capacity at the start of the first node.
* testsuite/libstdc++-xmethods/deque.cc: Check index operator
when elements have been removed from the front.
Jonathan Wakely [Wed, 15 Nov 2023 09:17:49 +0000 (09:17 +0000)]
libstdc++: std::stacktrace tweaks
Fix a typo in a string literal and make the new hash.cc test gracefully
handle missing stacktrace data (see PR 112541).
libstdc++-v3/ChangeLog:
* include/std/stacktrace (basic_stacktrace::at): Fix class name
in exception message.
* testsuite/19_diagnostics/stacktrace/hash.cc: Do not fail if
current() returns a non-empty stacktrace.
Richard Earnshaw [Wed, 15 Nov 2023 10:30:15 +0000 (10:30 +0000)]
arm: testsuite: fix test for armv6t2 hardware
My previous patch series added a new function to check for armv6t2
compatible hardware. But the test was not correctly implemented and
also did not follow the standard naming convention for Arm hw
compatibility tests. Fix both of these issues.
* config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem): New function.
(expand_vec_init): Add trailing optimization.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vls/def.h: Add trailing tests.
* gcc.target/riscv/rvv/autovec/vls-vlmax/trailing-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/trailing-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/trailing_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/trailing_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/trailing-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/trailing-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/trailing-3.c: New test.
* gcc.target/riscv/rvv/autovec/vls/trailing-4.c: New test.
* gcc.target/riscv/rvv/autovec/vls/trailing-5.c: New test.
* gcc.target/riscv/rvv/autovec/vls/trailing-6.c: New test.
* gcc.target/riscv/rvv/autovec/vls/trailing-7.c: New test.
Pan Li [Wed, 15 Nov 2023 03:30:51 +0000 (11:30 +0800)]
RISC-V: Refine the mask generation for vec_init case 2
Update in v2:
1. Add more test cases for fixed-vlmax.
2, Add test cases for vls mode.
Original log:
We take vec_init element int mode when generate the mask for
case 2. But actually we don't need as many bits as the element.
The extra bigger mode may introduce some unnecessary insns.
For example as below code:
void __attribute__ ((noinline, noclone))
foo (int64_t *out, int64_t x, int64_t y)
{
v16di v = {y, x, y, x, y, x, y, x, y, x, y, x, y, x, y, x};
*(v16di *) out = v;
}
We will have VDImode when generate the 0b0101010101010101 mask but
actually VHImode is good enough here. This patch would like to
refine the mask generation to avoid:
1. Unnecessary scalar to generate big constant mask.
2. Unnecessary vector insn to v0 mask.
Before this patch:
foo:
li a5,-1431654400
li a4,-1431654400 <== unnecessary insn
addi a5,a5,-1365 <== unnecessary insn
addi a4,a4,-1366
slli a5,a5,32 <== unnecessary insn
add a5,a5,a4 <== unnecessary insn
vsetivli zero,16,e64,m8,ta,ma
vmv.v.x v8,a2
vmv.s.x v16,a5
vmv1r.v v0,v16 <== unnecessary insn
vmerge.vxm v8,v8,a1,v0
vse64.v v8,0(a0)
ret
After this patch:
foo:
li a5,-20480
addiw a5,a5,-1366
vsetivli zero,16,e64,m8,ta,ma
vmv.s.x v0,a5
vmv.v.x v8,a2
vmerge.vxm v8,v8,a1,v0
vs8r.v v8,0(a0)
ret
gcc/ChangeLog:
* config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
Add inner_mode mask arg for mask int mode.
(get_repeating_sequence_dup_machine_mode): Add mask_bit_mode arg
to get the good enough vector int mode on precision.
(expand_vector_init_merge_repeating_sequence): Pass required args
to above func.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-10.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-11.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-12.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-13.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-14.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-15.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-6.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-7.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-8.c: New test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/init-repeat-sequence-9.c: New test.
* gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-0.c: New test.
* gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-3.c: New test.
* gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-4.c: New test.
* gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-5.c: New test.
* gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-6.c: New test.
* gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-7.c: New test.
* gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-8.c: New test.
Jakub Jelinek [Wed, 15 Nov 2023 07:27:07 +0000 (08:27 +0100)]
c++: Implement C++26 P2864R2 - Remove Deprecated Arithmetic Conversion on Enumerations From C++26
The following patch implements C++26 P2864R2 by emitting pedwarn enabled by
the same options as the C++20 and later warnings (i.e. -Wenum-compare,
-Wdeprecated-enum-enum-conversion and -Wdeprecated-enum-float-conversion
which are all enabled by default). I think we still want to allow users
some option workaround, so am not using directly error. Additionally, for
cxx_dialect >= cxx26 && (complain & tf_warning_or_error) == 0 it causes for
these newly ill-formed constructs error_mark_node to be silently returned.
2023-11-15 Jakub Jelinek <jakub@redhat.com>
gcc/cp/
* typeck.cc: Implement C++26 P2864R2 - Remove Deprecated Arithmetic
Conversion on Enumerations From C++26.
(do_warn_enum_conversions): Return bool rather than void, add COMPLAIN
argument. Use pedwarn rather than warning_at for C++26 and remove
" is deprecated" part of the diagnostics in that case. For SFINAE
in C++26 return true on newly erroneous cases.
(cp_build_binary_op): For C++26 call do_warn_enum_conversions
unconditionally, pass complain argument to it and if it returns true,
return error_mark_node.
* call.cc (build_conditional_expr): Use pedwarn rather than warning_at
for C++26 and remove " is deprecated" part of the diagnostics in that
case and check for complain & tf_warning_or_error. Use emit_diagnostic
with cxx_dialect >= cxx26 ? DK_PEDWARN : DK_WARNING. For SFINAE in
C++26 return error_mark_node on newly erroneous cases.
(build_new_op): Use emit_diagnostic with cxx_dialect >= cxx26
? DK_PEDWARN : DK_WARNING and complain & tf_warning_or_error check
for C++26. For SFINAE in C++26 return error_mark_node on newly
erroneous cases.
gcc/testsuite/
* g++.dg/cpp26/enum-conv1.C: New test.
* g++.dg/cpp2a/enum-conv1.C: Adjust expected diagnostics in C++26.
* g++.dg/diagnostic/enum3.C: Likewise.
* g++.dg/parse/attr3.C: Likewise.
* g++.dg/cpp0x/linkage2.C: Likewise.
Alexandre Oliva [Wed, 15 Nov 2023 01:16:29 +0000 (22:16 -0300)]
testsuite: tsan: add fallback overload for pthread_cond_clockwait
LTS GNU/Linux distros from 2018, still in use, don't have
pthread_cond_clockwait. There's no trivial way to detect it so as to
make the test conditional, but there's an easy enough way to silence
the fail due to lack of the function in libc, and that has nothing to
do with the false positive that this is testing against.
gcc.target/i386/pr95126-m32-[34].c expect push instructions that are
only present with -mno-accumulate-outgoing-args, so make that option
explicit rather than dependent on tuning.
Alexandre Oliva [Wed, 15 Nov 2023 01:15:29 +0000 (22:15 -0300)]
libstdc++: bvector: undef always_inline macro
It's customary to undefine temporary internal macros at the end of the
header that defines them, even such widely-usable ones as
_GLIBCXX_ALWAYS_INLINE, so do so in the header where the define was
recently introduced.
Lewis Hyatt [Fri, 10 Nov 2023 16:10:18 +0000 (11:10 -0500)]
c-family: Let libcpp know when the compilation is for a PCH [PR9471]
libcpp will generate diagnostics when it encounters things in the main file
that only belong in a header file, such as `#pragma once' or `#pragma GCC
system_header'. But sometimes the main file is a header file that is just
being compiled separately, e.g. to produce a C++ module or a PCH, in which
case such diagnostics should be suppressed. libcpp already has an interface
to request that, so make use of it in the C frontends to prevent libcpp from
issuing unwanted diagnostics when compiling a PCH.
gcc/c-family/ChangeLog:
PR pch/9471
PR pch/47857
* c-opts.cc (c_common_post_options): Set cpp_opts->main_search
so libcpp knows it is compiling a header file separately.
gcc/testsuite/ChangeLog:
PR pch/9471
PR pch/47857
* g++.dg/pch/main-file-warnings.C: New test.
* g++.dg/pch/main-file-warnings.Hs: New test.
* gcc.dg/pch/main-file-warnings.c: New test.
* gcc.dg/pch/main-file-warnings.hs: New test.
The current implementation calls __detail::__modulo which is relatively
expensive.
A better implementation is possible if we assume that x.ok() && y.ok() == true,
so that n = x.c_encoding() - y.c_encoding() is in [-6, 6]. In this case, it
suffices to return n >= 0 ? n : n + 7.
The above is allowed by [time.cal.wd.nonmembers]/5: the returned value is
unspecified when x.ok() || y.ok() == false.
The assembly emitted for x86-64 and ARM can be seen in:
https://godbolt.org/z/nMdc5vv9n.
Cassio Neri [Sat, 11 Nov 2023 22:59:50 +0000 (22:59 +0000)]
libstdc++: Simplify year::is_leap()
The current implementation returns
(_M_y & (__is_multiple_of_100 ? 15 : 3)) == 0;
where __is_multiple_of_100 is calculated using an obfuscated algorithm which
saves one ror instruction when compared to _M_y % 100 == 0 [1].
In leap years calculation, it's correct to replace the divisibility check by
100 with the one by 25. It turns out that _M_y % 25 == 0 also saves the ror
instruction [2]. Therefore, the obfuscation is not required.
Cassio Neri [Sat, 11 Nov 2023 16:44:58 +0000 (16:44 +0000)]
libstdc++: Remove unnecessary "& 1" from year_month_day_last::day()
When year_month_day_last::day() was implemented, Dr. Matthias Kretz realised
that the operation "& 1" wasn't necessary but we did not patch it at that
time. This patch removes the unnecessary operation.
Jonathan Wakely [Tue, 14 Nov 2023 10:56:57 +0000 (10:56 +0000)]
libstdc++: Fix <charconv> uses of signed types with <bit> functions
In <charconv> we pass the int __base parameter to our internal versions
of <bit> functions, __bit_width and __countr_zero. Those functions are
only defined for unsigned types, so we need to convert the base to
unsigned. The base must be in the range [2,36] so we can mask off the
low bits and then convert that to unsigned, so that we don't need to
care about negative values becoming large unsigned values.
libstdc++-v3/ChangeLog:
* include/std/charconv (__from_chars_pow2_base): Convert base to
unsigned for call to __countr_zero.
(__from_chars_alnum): Likewise for call to __bit_width.
git://gcc.gnu.org / gcc.git / log