d: Move call to set_linkage_for_decl to declare_extern_var.
This both prevents against it being called twice for declarations that
are defined, and fixes an issue where variables defined in the
compilation get one kind of linkage (weak), and the same variables
declared via declare_extern_var get another (extern).
gcc/d/ChangeLog:
PR d/99914
* decl.cc (DeclVisitor::visit (StructDeclaration *)): Don't set
DECL_INSTANTIATED on static initializer declarations.
(DeclVisitor::visit (ClassDeclaration *)): Likewise.
(DeclVisitor::visit (EnumDeclaration *)): Likewise.
(d_finish_decl): Move call to set_linkage_for_decl to...
(declare_extern_var): ...here.
This implements `__traits(getTargetInfo, "floatAbi")' for all targets
that have D support files.
gcc/ChangeLog:
* config/aarch64/aarch64-d.c (aarch64_d_handle_target_float_abi): New
function.
(aarch64_d_register_target_info): New function.
* config/aarch64/aarch64-protos.h (aarch64_d_register_target_info):
Declare.
* config/aarch64/aarch64.h (TARGET_D_REGISTER_CPU_TARGET_INFO):
Define.
* config/arm/arm-d.c (arm_d_handle_target_float_abi): New function.
(arm_d_register_target_info): New function.
* config/arm/arm-protos.h (arm_d_register_target_info): Declare.
* config/arm/arm.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
* config/i386/i386-d.c (ix86_d_handle_target_float_abi): New function.
(ix86_d_register_target_info): New function.
* config/i386/i386-protos.h (ix86_d_register_target_info): Declare.
* config/i386/i386.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
* config/mips/mips-d.c (mips_d_handle_target_float_abi): New function.
(mips_d_register_target_info): New function.
* config/mips/mips-protos.h (mips_d_register_target_info): Declare.
* config/mips/mips.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
* config/pa/pa-d.c (pa_d_handle_target_float_abi): New function.
(pa_d_register_target_info): New function.
* config/pa/pa-protos.h (pa_d_register_target_info): Declare.
* config/pa/pa.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
* config/riscv/riscv-d.c (riscv_d_handle_target_float_abi): New
function.
(riscv_d_register_target_info): New function.
* config/riscv/riscv-protos.h (riscv_d_register_target_info): Declare.
* config/riscv/riscv.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
* config/rs6000/rs6000-d.c (rs6000_d_handle_target_float_abi): New
function.
(rs6000_d_register_target_info): New function.
* config/rs6000/rs6000-protos.h (rs6000_d_register_target_info):
Declare.
* config/rs6000/rs6000.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
* config/s390/s390-d.c (s390_d_handle_target_float_abi): New function.
(s390_d_register_target_info): New function.
* config/s390/s390-protos.h (s390_d_register_target_info): Declare.
* config/s390/s390.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
* config/sparc/sparc-d.c (sparc_d_handle_target_float_abi): New
function.
(sparc_d_register_target_info): New function.
* config/sparc/sparc-protos.h (sparc_d_register_target_info): Declare.
* config/sparc/sparc.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (D language and ABI): Add @hook for
TARGET_D_REGISTER_CPU_TARGET_INFO.
gcc/d/ChangeLog:
* d-target.cc (Target::_init): Call new targetdm hook to register CPU
specific target info keys.
* d-target.def (d_register_cpu_target_info): New hook.
This replaces the use of the D front-end `is64bit' parameter in
determining whether to insert the "stdcall" function attribute.
It is also used to determine whether `extern(System)' should be the same
as `extern(Windows)' in the implementation of Target::systemLinkage.
gcc/ChangeLog:
* config/i386/i386-d.c (ix86_d_has_stdcall_convention): New function.
* config/i386/i386-protos.h (ix86_d_has_stdcall_convention): Declare.
* config/i386/i386.h (TARGET_D_HAS_STDCALL_CONVENTION): Define.
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (D language and ABI): Add @hook for
TARGET_D_HAS_STDCALL_CONVENTION.
gcc/d/ChangeLog:
* d-target.cc (Target::systemLinkage): Return LINKwindows if
d_has_stdcall_convention applies to LINKsystem.
* d-target.def (d_has_stdcall_convention): New hook.
* types.cc (TypeVisitor::visit (TypeFunction *)): Insert "stdcall"
function attribute if d_has_stdcall_convention applies to LINKwindows.
Richard Biener [Wed, 14 Apr 2021 08:26:33 +0000 (10:26 +0200)]
VEC_COND_EXPR verification adjustment
This adjusts GIMPLE verification with respect to the VEC_COND_EXPR
changes forcing a split out condition.
2021-04-14 Richard Biener <rguenther@suse.de>
* tree-cfg.c (verify_gimple_assign_ternary): Verify that
VEC_COND_EXPRs have a gimple_val condition.
* tree-ssa-propagate.c (valid_gimple_rhs_p): VEC_COND_EXPR
can no longer have a GENERIC condition.
Richard Earnshaw [Wed, 14 Apr 2021 09:56:36 +0000 (10:56 +0100)]
arm: fix warning when -mcpu=neoverse-n1 is used with -mfpu=neon [PR100067]
If the compiler is configured with --with-fpu=<!auto> (or invoked
with, say, -mfpu=neon), then specifying -mcpu=neoverse-n1 can lead to
an unexpected warning: cc1: warning: switch ‘-mcpu=neoverse-n1’
conflicts with ‘-march=armv8.2-a’ switch
The fix for this is to correctly remove all the feature bits relating
to simd/fp units when -mfpu is used, not just those bits that form
part of the -mfpu specification (which is a subset).
gcc:
PR target/100067
* config/arm/arm.c (arm_configure_build_target): Strip isa_all_fpbits
from the isa_delta when -mfpu has been used.
(arm_options_perform_arch_sanity_checks): It's the architecture that
lacks an FPU not the processor.
Jakub Jelinek [Wed, 14 Apr 2021 08:48:56 +0000 (10:48 +0200)]
testsuite: Fix up libgomp.fortran/alloc-1.F90 testcase [PR100071]
As can be seen under valgrind, the testcase didn't bind in the last part
the fortran pointers properly to the c pointers.
2021-04-14 Jakub Jelinek <jakub@redhat.com>
PR testsuite/100071
* testsuite/libgomp.fortran/alloc-1.F90: Call c_f_pointer after last
cp = omp_alloc with cp, p arguments instead of cq, q and call
c_f_pointer after last cq = omp_alloc with cq, q.
Jason Merrill [Wed, 14 Apr 2021 02:28:32 +0000 (22:28 -0400)]
c++: lambda in non-type template parm type [PR99478]
In this testcase, the non-type template parameter has the type of a
lambda-expression. This makes no sense because a lambda in template context
is specified to be distinct between different specializations of the
template, even if the lambda is non-dependent, but here which specialization
we are dealing with depends on which lambda we have, and vice versa.
Jason Merrill [Wed, 14 Apr 2021 00:32:13 +0000 (20:32 -0400)]
c++: DWARF ICE with defaulted specialization [PR90674]
Here when we merged the specialization with the implicit instantiation
declaration, we wrongly kept the value of DECL_INITIALIZED_IN_CLASS_P from
the latter.
gcc/cp/ChangeLog:
PR c++/90674
* decl.c (duplicate_decls): Don't propagate
DECL_INITIALIZED_IN_CLASS_P to a specialization.
gcc/testsuite/ChangeLog:
PR c++/90674
* g++.dg/debug/defaulted1.C: New test.
Jason Merrill [Tue, 13 Apr 2021 20:18:54 +0000 (16:18 -0400)]
c++: debug location of variable cleanups [PR88742]
PR49951 complained about the debugger jumping back to the declaration of a
local variable when we run its destructor. That was fixed in 4.7, but broke
again in 4.8. PR58123 fixed an inconsistency in the behavior, but not the
jumping around. This patch addresses the issue by setting EXPR_LOCATION on
a cleanup destructor call to the location of the closing brace of the
compound-statement, or whatever token ends the scope of the variable.
The change to cp_parser_compound_statement is so input_location is the }
rather than the ; of the last substatement.
gcc/cp/ChangeLog:
PR c++/88742
PR c++/49951
PR c++/58123
* semantics.c (set_cleanup_locs): New.
(do_poplevel): Call it.
* parser.c (cp_parser_compound_statement): Consume the }
before finish_compound_stmt.
Jason Merrill [Tue, 13 Apr 2021 16:33:39 +0000 (12:33 -0400)]
c++: generic lambda in template fn with DMI [PR100054]
get_nsdmi instantiates default member initializers on demand. It tries to
push into the context of the class before doing so, so access checking works
properly, but since my patch for 90479 not for local classes. We should
only be doing this when any template parameters have arguments. But in this
case, we get here while regenerating a generic lambda, so
processing_template_decl is true, even though the class and its DMI are
non-dependent at this point. And so we crashed. So let's do more of the
pushing into the context of the class even for local classes.
gcc/cp/ChangeLog:
PR c++/100054
PR c++/90479
* init.c (get_nsdmi): Do more context adjustment for local classes.
gcc/testsuite/ChangeLog:
PR c++/100054
* g++.dg/cpp1y/lambda-generic-local-class1.C: New test.
Patrick Palka [Tue, 13 Apr 2021 16:35:33 +0000 (12:35 -0400)]
c++: Reject alias CTAD in C++17 [PR99008]
Here, in C++17 mode, we only pedwarn about the use of alias CTAD and
then later ICE from alias_ctad_tweaks when attempting to constrain
the guides. Since the construction of the guides of an alias template
effectively relies on concepts, we shouldn't be permissive about alias
CTAD in C++17 mode, so this patch turns the pertinent pedwarn in
do_class_deduction into an error.
In order to get a consistent diagnostic for B() vs the other forms in
the added testcase, I had to remove the special handling of CTAD with
empty initializer in build_functional_cast_1 so that we always pass
'complain' to do_auto_deduction.
gcc/cp/ChangeLog:
PR c++/99008
* pt.c (do_class_deduction): Reject alias CTAD in C++17 mode
rather than issuing a pedwarn.
* typeck2.c (build_functional_cast_1): Handle CTAD uniformly
for consistent diagnostics.
Eric Botcazou [Tue, 13 Apr 2021 15:07:36 +0000 (17:07 +0200)]
Further increase the limit on the size of accepted Ada files
It turns out that the limit on the size of accepted Ada files had been
already lowered earlier, namely when location ranges had been introduced.
Now we do not make use of location ranges in Ada so we can recoup the loss.
gcc/ada/
* gcc-interface/misc.c (gnat_init): Set default range bits to 0.
* gcc-interface/trans.c (extract_encoding): Delete.
(decode_name): Likewise.
(File_Name_to_gnu): New function.
(gigi): Call it to translate file names. Replace assertion on
1-1 mapping between files and line maps with conditional error.
Richard Biener [Tue, 13 Apr 2021 10:05:53 +0000 (12:05 +0200)]
tree-optimization/100053 - fix predication in VN
This avoids doing optimistic dominance queries involving
non-executable backedges when validating recorded predicated values
in VN because we have no way to force re-evaluating validity when
optimistically not executable edges become executable later.
2021-04-13 Richard Biener <rguenther@suse.de>
PR tree-optimization/100053
* tree-ssa-sccvn.c (vn_nary_op_get_predicated_value): Do
not use optimistic dominance queries for backedges to validate
predicated values.
(dominated_by_p_w_unex): Add parameter to ignore executable
state on backedges.
(rpo_elim::eliminate_avail): Adjust.
* gcc.dg/torture/pr100053.c: New testcase.
* gcc.dg/tree-ssa/ssa-fre-93.c: Likewise.
Jason Merrill [Mon, 12 Apr 2021 21:43:51 +0000 (17:43 -0400)]
c++: constexpr, inheritance, and local class [PR91933]
Here we complained about referring to nm3 from the local class member
function because referring to the base class subobject involved taking the
variable's address. Let's shortcut this case to avoid that.
This ICE was because when adjusting a column offset we could advance
into a linemap for a different file. We only checked the next line
map was not for a line further advanced in any file, forgetting that
it could be for an earlier line in a different file. The testcase
needed adjusting as column 512 was unrepresentable, once that was
taken into consideration.
PR preprocessor/99446
libcpp/
* line-map.c (line-map.c): Do not advance to linemaps for
different files.
gcc/testsuite/
* g++.dg/diagnostic/pr72803.C: Adjust expected column.
Jakub Jelinek [Tue, 13 Apr 2021 10:43:39 +0000 (12:43 +0200)]
aarch64: Restore bfxil optimization [PR100028]
Similarly to PR87763 for bfi, the GCC 9 combiner changes to not combine
moves from hard registers regressed the following testcase where we no
longer recognize bfxil and emit 3 instructions instead.
The following patch adds define_insn patterns that match what the combiner
is trying to match in these cases. I haven't been able to see patterns
with the other order of the IOR operands, seems the IL is canonicalized this
way no matter what is written in the source.
2021-04-13 Jakub Jelinek <jakub@redhat.com>
PR target/100028
* config/aarch64/aarch64.md (*aarch64_bfxil<mode>_extr,
*aarch64_bfxilsi_extrdi): New define_insn patterns.
is not fully correct since the position of the macro lines is not fixed:
/* Returns the lowest location [of a token resulting from macro
expansion] encoded in this line table. */
inline location_t
LINEMAPS_MACRO_LOWEST_LOCATION (const line_maps *set)
{
return LINEMAPS_MACRO_USED (set)
? MAP_START_LOCATION (LINEMAPS_LAST_MACRO_MAP (set))
: MAX_LOCATION_T + 1;
}
In Ada, LINEMAPS_MACRO_USED is false so LINEMAPS_MACRO_LOWEST_LOCATION is
MAX_LOCATION_T + 1, but IS_MACRO_LOC nevertheless returns true for anything
in the range [LINE_MAP_MAX_LOCATION; MAX_LOCATION_T], thus yielding an ICE
in linemap_macro_map_lookup for very large files.
libcpp/
* include/line-map.h (IS_MACRO_LOC): Delete.
* line-map.c (linemap_location_from_macro_expansion_p): Test
LINEMAPS_MACRO_LOWEST_LOCATION of the linemap.
gcc/cp/
* module.cc (ordinary_loc_of): Test LINEMAPS_MACRO_LOWEST_LOCATION
of the linemap.
(module_state::write_location): Likewise.
Martin Storsjö [Fri, 9 Apr 2021 11:46:36 +0000 (14:46 +0300)]
mh-mingw: Set __USE_MINGW_ACCESS in missed C++ flags variables
This is similar to what was done in eea4e2ff0a3f5e7f37df204c070cc5d9ef339e6e (where it was added to
STAGE*_CXXFLAGS), but this adds the flag to the CXXFLAGS and
BOOT_CXXFLAGS variables too (as it's already added to CFLAGS and
BOOT_CFLAGS).
2021-04-09 Martin Storsjö <martin@martin.st>
config/ChangeLog:
* mh-mingw: Set __USE_MINGW_ACCESS in missed C++ flags
variables
Jakub Jelinek [Tue, 13 Apr 2021 07:41:20 +0000 (09:41 +0200)]
simplify-rtx: Punt on simplify_{,gen_}subreg to IBM double double if bits are lost [PR99648]
Similarly to PR95450 done on GIMPLE, this patch punts if we try to
simplify_{gen_,}subreg from some constant into the IBM double double
IFmode (or sometimes TFmode) if the double double format wouldn't preserve
the bits. Not all values are valid in IBM double double, e.g. the format
requires that the upper double is the whole value rounded to double, and
if in some cases such as in the pr71522.c testcase with -m32 -Os -mcpu=power7
some non-floating data is copied through long double variable, we can
simplify a subreg into something that has different value.
Fixed by punting if the planned simplify_immed_subreg result doesn't
encode to bitwise identical values compared to what we were decoding.
As for the simplify_gen_subreg change, I think it would be desirable
to just avoid creating SUBREGs of constants on all targets and for all
constants, if simplify_immed_subreg simplified, fine, otherwise punt,
but as we are late in GCC11 development, the patch instead guards this
behavior on MODE_COMPOSITE_P (outermode) - i.e. only conversions to
powerpc{,64,64le} double double long double - and only for the cases where
simplify_immed_subreg was called.
2021-04-13 Jakub Jelinek <jakub@redhat.com>
PR target/99648
* simplify-rtx.c (simplify_immed_subreg): For MODE_COMPOSITE_P
outermode, return NULL if the result doesn't encode back to the
original byte sequence.
(simplify_gen_subreg): Don't create SUBREGs from constants to
MODE_COMPOSITE_P outermode.
Patrick Palka [Tue, 13 Apr 2021 03:22:03 +0000 (23:22 -0400)]
c++: variadic class template placeholder deduction [PR97134]
do_class_deduction handles specially the case where we're deducing one
placeholder from another equivalent one, but here the initializer passed
to do_class_deduction is wrapped in an EXPR_PACK_EXPANSION (we're being
called from unify during get_partial_spec_bindings). This patch makes
do_class_deduction look through EXPR_PACK_EXPANSIONs so that we detect
this case as well.
gcc/cp/ChangeLog:
PR c++/97134
* pt.c (do_class_deduction): Look through EXPR_PACK_EXPANSION
when checking if the initializer is an equivalent class
placeholder template parameter.
gcc/testsuite/ChangeLog:
PR c++/97134
* g++.dg/cpp2a/nontype-class43.C: New test.
Patrick Palka [Tue, 13 Apr 2021 02:54:55 +0000 (22:54 -0400)]
c++: constraints are unevaluated operands [PR99961]
According to [temp.concept]/6 and [temp.pre]/9, a concept definition and
a requires clause are both unevaluated contexts, and hence satisfaction
deals only with unevaluated operands, so we should set cp_unevaluated in
these three situations.
gcc.dg/analyzer/data-model-1.c: Inverse xfail for cris-*-*, PR99212
See PR99212. Now, cris-elf isn't the only target for which this line
shows a failure; pru-unknown-elf and m68k-unknown-linux-gnu are two
others. I'll leave adjustments to the respective maintainers, but
trivially appending more triplets should work: no extra bracketing needed.
A specific effective_target specifier would as always be perferable, but I
couldn't without accountable effort find out what was the common factor.
Besides cris-elf, sanity-checked for native x86_64-*-linux*.
gcc/testsuite:
PR analyzer/99212
* gcc.dg/analyzer/data-model-1.c (test_45): Inverse xfail at
line 971 for cris-*-*.
David Malcolm [Tue, 13 Apr 2021 01:13:40 +0000 (21:13 -0400)]
gimple UIDs, LTO and -fanalyzer [PR98599]
gimple.h has this comment for gimple's uid field:
/* UID of this statement. This is used by passes that want to
assign IDs to statements. It must be assigned and used by each
pass. By default it should be assumed to contain garbage. */
unsigned uid;
and gimple_set_uid has:
Please note that this UID property is supposed to be undefined at
pass boundaries. This means that a given pass should not assume it
contains any useful value when the pass starts and thus can set it
to any value it sees fit.
which suggests that any pass can use the uid field as an arbitrary
scratch space.
PR analyzer/98599 reports a case where this error occurs in LTO mode:
fatal error: Cgraph edge statement index out of range
on certain inputs with -fanalyzer.
The error occurs in the LTRANS phase after -fanalyzer runs in the
WPA phase. The analyzer pass writes to the uid fields of all stmts.
The error occurs when LTRANS is streaming callgraph edges back in.
The LTO format uses stmt uids to associate call stmts with callgraph
edges between WPA and LTRANS.
For example, in lto-cgraph.c, lto_output_edge writes out the
gimple_uid, and input_edge reads it back in.
lto_prepare_function_for_streaming has code to renumber the stmt UIDs
when the code is streamed back out, but for some reason this isn't
called for clones:
307 /* Do body modifications needed for streaming before we fork out
308 worker processes. */
309 FOR_EACH_FUNCTION_WITH_GIMPLE_BODY (node)
310 if (!node->clone_of && gimple_has_body_p (node->decl))
311 lto_prepare_function_for_streaming (node);
Hence the combination of -fanalyzer and -flto will fail in LTRANS's
stream-in if any function clones are encountered.
It's not fully clear to me why this isn't done for clones, and what the
correct fix should be to allow arbitrary changes to uids within WPA
passes.
In the meantime, this patch works around the issue by updating the
analyzer to save and restore the UIDs, fixing the error.
gcc/analyzer/ChangeLog:
PR analyzer/98599
* supergraph.cc (saved_uids::make_uid_unique): New.
(saved_uids::restore_uids): New.
(supergraph::supergraph): Replace assignments to stmt->uid with
calls to m_stmt_uids.make_uid_unique.
(supergraph::~supergraph): New.
* supergraph.h (class saved_uids): New.
(supergraph::~supergraph): New decl.
(supergraph::m_stmt_uids): New field.
gcc/testsuite/ChangeLog:
PR analyzer/98599
* gcc.dg/analyzer/pr98599-a.c: New test.
* gcc.dg/analyzer/pr98599-b.c: New test.
Jakub Jelinek [Mon, 12 Apr 2021 23:01:45 +0000 (01:01 +0200)]
combine: Fix up expand_compound_operation [PR99905]
The following testcase is miscompiled on x86_64-linux.
expand_compound_operation is called on
(zero_extract:DI (mem/c:TI (reg/f:DI 16 argp) [3 i+0 S16 A128])
(const_int 16 [0x10])
(const_int 63 [0x3f]))
so mode is DImode, inner_mode is TImode, pos 63, len 16 and modewidth 64.
A couple of lines above the problematic spot we have:
if (modewidth >= pos + len)
{
tem = gen_lowpart (mode, XEXP (x, 0));
where the code uses gen_lowpart and then shift left/right to extract it
in mode. But the guarding condition is false - 64 >= 63 + 16
and so we enter the next condition, where the code shifts XEXP (x, 0)
right by pos and then adds AND. It does so incorrectly though.
Given the modewidth < pos + len, inner_mode must be necessarily larger
than mode and XEXP (x, 0) has the innermode, but it was calling
simplify_shift_const with mode rather than inner_mode, which meant
inconsistent arguments to simplify_shift_const and in this case made
a DImode MEM shift out of it.
The following patch fixes it, by doing the shift in inner_mode properly
and then after the shift doing the lowpart subreg and masking already
in mode.
2021-04-13 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/99905
* combine.c (expand_compound_operation): If pos + len > modewidth,
perform the right shift by pos in inner_mode and then convert to mode,
instead of trying to simplify a shift of rtx with inner_mode by pos
as if it was a shift in mode.
Jakub Jelinek [Mon, 12 Apr 2021 23:00:48 +0000 (01:00 +0200)]
combine: Don't fold away side-effects in simplify_and_const_int_1 [PR99830]
Here is an alternate patch for the PR99830 bug.
As discussed on IRC and in the PR, the reason why a (clobber:TI (const_int 0))
has been propagated into the debug insns is that it got optimized away
during simplification from the i3 instruction pattern.
And that happened because
simplify_and_const_int_1 (SImode, varop, 255)
with varop of
(ashift:SI (subreg:SI (and:TI (clobber:TI (const_int 0 [0]))
(const_int 255 [0xff])) 0)
(const_int 16 [0x10]))
was called and through nonzero_bits determined that (whatever << 16) & 255
is const0_rtx.
It is, but if there are side-effects in varop and such clobbers are
considered as such, we shouldn't optimize those away.
2021-04-13 Jakub Jelinek <jakub@redhat.com>
PR debug/99830
* combine.c (simplify_and_const_int_1): Don't optimize varop
away if it has side-effects.
Jason Merrill [Sat, 10 Apr 2021 06:10:32 +0000 (02:10 -0400)]
c++: premature overload resolution [PR93085]
We can't resolve the call to foo<42> before instantiation of G, because the
template parameter of #1 has dependent type. But we were missing that in
our dependency check, because the tree walk of DECL_TEMPLATE_PARMS doesn't
look into the types of template parameters. So look at them directly.
Martin Liska [Mon, 12 Apr 2021 08:49:41 +0000 (10:49 +0200)]
ASAN: do not unpoison in OpenMP context
gcc/ChangeLog:
PR sanitizer/99877
* gimplify.c (gimplify_expr): Right now, we unpoison all
variables before a goto <dest>. We should not do it if we are
in a omp context.
gcc/testsuite/ChangeLog:
PR sanitizer/99877
* g++.dg/asan/pr99877.C: New test.
Jonathan Wakely [Mon, 12 Apr 2021 10:45:21 +0000 (11:45 +0100)]
libstdc++: Fix some tests that fail in C++20 mode
The linear_congruential_engine negative tests fail with a different
error in C++20 mode, because double is no longer an invalid type for
NTTP. Adjust the expected errors.
Jonathan Wakely [Mon, 12 Apr 2021 10:12:47 +0000 (11:12 +0100)]
libstdc++: Fix test that fails in C++20 mode [PR 99995]
The 17_intro/headers/c++1998/49745.cc test fails for C++20 mode with PCH
enabled, because PCH makes it include <bits/stdc++.h>, which includes
<atomic>, and that includes <unistd.h> in C++20 mode. The <unistd.h>
dependency should go away when C++20 atomic waiting is stable, but will
probably remain while the feature is experimental. Change the test to
always include <bits/stdc++.h>, and XFAIL for C++20 and later.
libstdc++-v3/ChangeLog:
PR libstdc++/99995
* testsuite/17_intro/headers/c++1998/49745.cc: Include all
standard headers and XFAIL for effective-target c++20.
Change march=alderlake ISA list and add m_ALDERLAKE to m_CORE_AVX2
Alder Lake Intel Hybrid Technology will not support Intel® AVX-512. ISA
features such as Intel® AVX, AVX-VNNI, Intel® AVX2, and UMONITOR/UMWAIT/TPAUSE
are supported.
[OpenACC] Fix an ICE where a loop with GT condition is collapsed.
We have seen an ICE both on trunk and devel/omp/gcc-10 branches which can
be reprodued with this simple testcase. It occurs if an OpenACC loop has
a collapse clause and any of the loop being collapsed uses GT or GE
condition. This issue is specific to OpenACC.
int main (void)
{
int ix, iy;
int dim_x = 16, dim_y = 16;
{
for (iy = dim_y - 1; iy > 0; --iy)
for (ix = dim_x - 1; ix > 0; --ix)
;
}
}
The problem is caused by a failing assertion in expand_oacc_collapse_init.
It checks that cond_code for fd->loop should be same as cond_code for all
the loops that are being collapsed. As the cond_code for fd->loop is
LT_EXPR with collapse clause (set at the end of omp_extract_for_data),
this assertion forces that all the loop in collapse clause should use
< operator.
There does not seem to be anything in the code which demands this
condition as loop with > condition works ok otherwise. I digged old
mailing list a bit but could not find any discussion on this change.
Looking at the code, expand_oacc_for checks that fd->loop->cond_code is
either LT_EXPR or GT_EXPR. I guess the original intention was to have
similar checks on the loop which are being collapsed. But the way check
was written does not acheive that.
I have fixed it by modifying the check in the assertion to be same as
check on fd->loop->cond_code.
I tested goacc and libgomp (with nvptx offloading) and did not see any
regression. I have added new tests to check collapse with GT/GE condition.
PR middle-end/98088
gcc/
* omp-expand.c (expand_oacc_collapse_init): Update condition in
a gcc_assert.
Jason Merrill [Sat, 10 Apr 2021 18:00:15 +0000 (14:00 -0400)]
c++: ICE with anonymous union [PR97974]
Here lookup got confused by finding a conversion operator from
lookup_anon_field. Let's avoid this by pruning functions from
CLASSTYPE_MEMBER_VEC as well as TYPE_FIELDS.
gcc/cp/ChangeLog:
PR c++/97974
* decl.c (fixup_anonymous_aggr): Prune all functions from
CLASSTYPE_MEMBER_VEC.
gcc/testsuite/ChangeLog:
PR c++/97974
* g++.dg/lookup/pr84962.C: Adjust diagnostic.
* g++.dg/other/anon-union5.C: New test.
Jason Merrill [Sat, 10 Apr 2021 14:55:58 +0000 (10:55 -0400)]
c++: ICE with invalid use of 'this' with static memfn [PR98800]
Here instantiation of the fake 'this' parameter we used when parsing the
trailing return type of func() was failing because there is no actual 'this'
parameter in the instantiation. For PR97399 I told Patrick to do the 'this'
injection even for statics, but now I think I was wrong; the out-of-class
definition case I was concerned about does not break with this patch. And
we don't set current_class_ptr in the body of a static member function.
And the OMP code should continue to parse 'this' and complain about it
rather than give a syntax error.
gcc/cp/ChangeLog:
PR c++/98800
PR c++/97399
* parser.c (cp_parser_direct_declarator): Don't
inject_this_parameter if static_p.
(cp_parser_omp_var_list_no_open): Parse 'this' even if
current_class_ptr isn't set for a better diagnostic.
gcc/testsuite/ChangeLog:
PR c++/98800
* g++.dg/gomp/this-1.C: Adjust diagnostic.
* g++.dg/cpp0x/constexpr-this1.C: New test.
David Malcolm [Sat, 10 Apr 2021 20:23:23 +0000 (16:23 -0400)]
analyzer: fix ICE on assignment from STRING_CST when building path [PR100011]
gcc/analyzer/ChangeLog:
PR analyzer/100011
* region-model.cc (region_model::on_assignment): Avoid NULL
dereference if ctxt is NULL when assigning from a STRING_CST.
gcc/testsuite/ChangeLog:
PR analyzer/100011
* gcc.dg/analyzer/pr100011.c: New test.
The following testcase ICEs during error recovery, because finish_decl
overwrites TREE_TYPE (error_mark_node), which better should stay always
to be error_mark_node.
2021-04-10 Jakub Jelinek <jakub@redhat.com>
PR c/99990
* c-decl.c (finish_decl): Don't overwrite TREE_TYPE of
error_mark_node.
libphobos: Build runtime library with -ffunction-sections -fdata-sections
Tests for `-ffunction-sections -fdata-sections' and sets SECTION_FLAGS
accordingly. If there is no warning when using it, take advantage of
the smaller executables that can be had with `--gc-sections'.
libphobos: Explicitly use -static-libphobos in druntime and phobos tests
Linking to libphobos statically is the default in the driver, however
this may change in future. Be explicit that the static libphobos is
what's being tested.
libphobos/ChangeLog:
* testsuite/libphobos.druntime/druntime.exp: Compile all tests with
-static-libphobos.
* testsuite/libphobos.phobos/phobos.exp: Likewise.
Jakub Jelinek [Sat, 10 Apr 2021 10:49:01 +0000 (12:49 +0200)]
expand: Fix up LTO ICE with COMPOUND_LITERAL_EXPR [PR99849]
The gimplifier optimizes away COMPOUND_LITERAL_EXPRs, but they can remain
in the form of ADDR_EXPR of COMPOUND_LITERAL_EXPRs in static initializers.
By the TREE_STATIC check I meant to check that the underlying decl of
the compound literal is a global rather than automatic variable which
obviously can't be referenced in static initializers, but unfortunately
with LTO it might end up in another partition and thus be DECL_EXTERNAL
instead.
2021-04-10 Jakub Jelinek <jakub@redhat.com>
PR lto/99849
* expr.c (expand_expr_addr_expr_1): Test is_global_var rather than
just TREE_STATIC on COMPOUND_LITERAL_EXPR_DECLs.
This PR is about a -W*uninitialized warning on riscv64.
alloca_type_and_limit is documented to have limit member only defined
when type is ALLOCA_BOUND_MAYBE_LARGE or ALLOCA_BOUND_DEFINITELY_LARGE
and otherwise just default constructs limit, which for wide_int means
no initialization at all. IMHO it is fine not to use the limit
member otherwise, but trying to not initialize it when it can be e.g.
copied around and then invoke UB doesn't look like a good idea.
2021-04-10 Jakub Jelinek <jakub@redhat.com>
PR middle-end/99989
* gimple-ssa-warn-alloca.c
(alloca_type_and_limit::alloca_type_and_limit): Initialize limit to
0 with integer precision unconditionally.
Jakub Jelinek [Sat, 10 Apr 2021 10:46:09 +0000 (12:46 +0200)]
rtlanal: Another fix for VOIDmode MEMs [PR98601]
This is a sequel to the PR85022 changes, inline-asm can (unfortunately)
introduce VOIDmode MEMs and in PR85022 they have been changed so that
we don't pretend we know their size (as opposed to assuming they have
zero size).
This time we ICE in rtx_addr_can_trap_p_1 because it assumes that
all memory but BLKmode has known size. The patch just treats VOIDmode
MEMs like BLKmode in that regard. And, the STRICT_ALIGNMENT change
is needed because VOIDmode has GET_MODE_SIZE of 0 and we don't want to
check if something is a multiple of 0.
2021-04-10 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/98601
* rtlanal.c (rtx_addr_can_trap_p_1): Allow in assert unknown size
not just for BLKmode, but also for VOIDmode. For STRICT_ALIGNMENT
unaligned_mems handle VOIDmode like BLKmode.
Jason Merrill [Fri, 9 Apr 2021 22:02:38 +0000 (18:02 -0400)]
c++: deduction guide using alias [PR99180]
alias_ctad_tweaks was expecting that all deduction guides for the class
would be suitable for deduction from the alias definition; in this case, the
deduction guide uses 'true' and the alias B uses 'false', so deduction
fails. But that's OK, we just don't use that deduction guide. I also
noticed that we were giving up on deduction entirely if substitution failed
for some guide; we should only give up on that particular deduction guide.
We ought to give a better diagnostic about this case when deduction fails,
but that can wait.
Jason Merrill [Fri, 9 Apr 2021 20:43:50 +0000 (16:43 -0400)]
c++: pack in base-specifier in lambda [PR100006]
Normally cp_parser_base_clause prevents unexpanded packs, but in a lambda
check_for_bare_parameter_packs allows it. Then we weren't finding the
pack when scanning the lambda body.
François Dumont [Sun, 7 Mar 2021 18:11:02 +0000 (19:11 +0100)]
libstdc++: [_GLIBCXX_DEBUG] Fix management of __dp_sign_max_size [PR 99402]
__dp_sign precision indicates that we found out what iterator comes first or
last in the range. __dp_sign_max_size is the same plus it gives the information
of the max size of the range that is to say the max_size value such that
distance(lhs, rhs) < max_size.
Thanks to this additional information we are able to tell when a copy of n elements
to that range will fail even if we do not know exactly how large it is.
This patch makes sure that we are properly using this information.
If a toolchain is configured with --with-cpu=X and gcc is
then run with an explicit -march=Y option, we ignore the
X cpu setting and tune for generic Y code:
In the above scenario, ptr->x_explicit_tune_core is aarch64_none,
so we fall back on the default configure-time CPU. This means
that before the push_options we tuned for generic Y but after
the pop_options we tuned for X.
This was picked up by an assertion failure in cl_optimization_compare.
The ICE itself is a GCC 11 regression, but the problem that it shows
up is much older.
gcc/
* config/aarch64/aarch64.c (aarch64_option_restore): If the
architecture was specified explicitly and the tuning wasn't,
tune for the architecture rather than the configured default CPU.
Marek Polacek [Thu, 8 Apr 2021 18:39:28 +0000 (14:39 -0400)]
c++: Fix two issues with auto function parameter [PR99806]
When we have a member function with auto parameter like this:
struct S {
void f(auto);
};
cp_parser_member_declaration -> grokfield produces a FUNCTION_DECL
"void S::foo(auto:1)", and then finish_fully_implicit_template turns
that FUNCTION_DECL into a TEMPLATE_DECL. The bug here is that we only
call cp_parser_save_default_args for a FUNCTION_DECL. As a consequence,
abbrev10.C is rejected because we complain that the default argument has
not been defined, and abbrev11.C ICEs, because we don't re-parse the
delayed noexcept, so the DEFERRED_PARSE tree leaks into tsubst* where we
crash. This patch fixes both issues.
gcc/cp/ChangeLog:
PR c++/99806
* parser.c (cp_parser_member_declaration): Call
cp_parser_save_default_args even for function templates. Use
STRIP_TEMPLATE on the declaration we're passing.
gcc/testsuite/ChangeLog:
PR c++/99806
* g++.dg/concepts/abbrev10.C: New test.
* g++.dg/concepts/abbrev11.C: New test.
These tests are passing on all my runs, and it looks like
they are for Christophe's runs too. We can reapply with a
tighter target selector if this is still a problem for some
configurations.
This patch adds XFAILs for some tests that fail with variable-length
vectors.
For pr96573.c I'd wondered about instead extending the regexp.
The code we generate isn't very good though, so it doesn't seem
worth matching. (Fixing the bad code is on the todo list.)
Which one is better is an interesting question. However, it was really
only a fluke that we generated the original code. The pseudo that
becomes s1 in the new code above has a REG_EQUIV note:
Before the PR, IRA didn't allocate a register to r111 and so LRA
rematerialised the REG_EQUIV note inside insn 18, leading to the
reload. Now IRA allocates a register instead.
So I think this is working as expected, in the sense that IRA is now
doing what the backend asked it to do. If the backend prefers the first
version (and it might not), it needs to do more than it's currently
doing to promote the use of lane loads. E.g. it should probably have a
combine define_split that splits the combination of insn 17 and insn 18
into an ADD + an LD1.
I think for now the best thing is to use a different approach to
triggering the original bug. The asm in the new test ICEs with the
r11-2903 LRA patch reverted and passes with it applied.
gcc/testsuite/
* gcc.target/aarch64/mem-shift-canonical.c: Use an asm instead
of relying on vectorisation.
testsuite: Skip gfortran.dg/ieee/ieee_[68].f90 for Arm targets [PR78314]
For the reasons discussed in PR78314, ieee_support_halting
doesn't work correctly for arm* and aarch64*. I think the
easiest thing is to skip these tests until the PR is fixed.
This doesn't mean that the PR is unimportant. It just doesn't
seem useful to have the unpredictable failures described in the
PR trail given that the problem is known and has been analysed.
gcc/testsuite/
PR libfortran/78314
* gfortran.dg/ieee/ieee_6.f90: Skip for arm* and aarch64*.
* gfortran.dg/ieee/ieee_8.f90: Likewise.
aarch64: Use x30 as temporary in SVE TLSDESC patterns
gcc.dg/torture/tls/tls-reload-1.c started ICEing for SVE some time
during the GCC 11 cycle (not sure when). The problem is that we
had an output reload on a call_insn, which isn't a supported
combination.
This patch uses LR_REGNUM instead. The resulting "blr x30"
might not perform as well on some CPUs, but in this context
the difference shouldn't be noticeable.
gcc/
* config/aarch64/aarch64.md (tlsdesc_small_sve_<mode>): Use X30
as the temporary register.
Jonathan Wakely [Fri, 9 Apr 2021 11:05:39 +0000 (12:05 +0100)]
libstdc++: Fix invalid constexpr function in C++11 mode [PR 99985]
I keep forgetting that a constexpr function in C++11 has to be a single
return statement.
libstdc++-v3/ChangeLog:
PR libstdc++/99985
* include/bits/hashtable.h (_Hashtable::_S_nothrow_move()): Fix
to be a valid constexpr function in C++11.
* testsuite/23_containers/unordered_set/cons/99985.cc: New test.
pthread_setspecific second argument is const void *, so that one can
call it even with pointers to const, but the function only stores the
pointer and does nothing else, so the new assumption of -Wmaybe-uninitialized
that functions taking such pointers will read from what those pointers
will point to is wrong. Maybe it would be useful to have some whitelist
of functions that surely don't do that.
Anyway, in this case it is easy to workaround the warning by moving the
pthread_setspecific call after the initialization without slowing anything
down.
2021-04-09 Jakub Jelinek <jakub@redhat.com>
PR libgomp/99984
* team.c (gomp_thread_start): Call pthread_setspecific for
!(defined HAVE_TLS || defined USE_EMUTLS) only after local_thr
has been initialized to avoid false positive warning.
git://gcc.gnu.org / gcc.git / log