gcc/
* config/mips/mips.c (mips16_emit_constants): Emit `consttable'
insn at the beginning of the constant pool.
(mips_insert_insn_pseudos): New function.
(mips_machine_reorg2): Call it.
* config/mips/mips.md (unspec): Add UNSPEC_CONSTTABLE and
UNSPEC_INSN_PSEUDO enum values.
(insn_pseudo, consttable): New insns.
gcc/testsuite/
* gcc.target/mips/insn-casesi.c: New test case.
* gcc.target/mips/insn-pseudo-1.c: New test case.
* gcc.target/mips/insn-pseudo-2.c: New test case.
* gcc.target/mips/insn-pseudo-3.c: New test case.
* gcc.target/mips/insn-pseudo-4.c: New test case.
* gcc.target/mips/insn-tablejump.c: New test case.
Jonathan Wakely [Tue, 15 Nov 2016 14:33:20 +0000 (14:33 +0000)]
Add std::string constructor for substring of string_view (LWG 2742)
* doc/xml/manual/intro.xml: Document LWG 2742 status.
* doc/html/*: Regenerate.
* include/bits/basic_string.h
(basic_string(const T&, size_type, size_type, const Allocator&)): Add
constructor for substring of basic_string_view, as per LWG 2742 but
with additional constraint to fix ambiguity.
* testsuite/21_strings/basic_string/cons/char/9.cc: New test.
* testsuite/21_strings/basic_string/cons/wchar_t/9.cc: New test.
Jonathan Wakely [Tue, 15 Nov 2016 14:33:09 +0000 (14:33 +0000)]
Constrain swap overload for std::optional (LWG 2748)
* doc/xml/manual/intro.xml: Document LWG 2748 status.
* include/std/optional (optional<T>::swap): Use is_nothrow_swappable_v
for exception specification.
(swap(optional<T>&, optional<T>&)): Disable when T is not swappable.
* testsuite/20_util/optional/swap/2.cc: New test.
Michael Matz [Tue, 15 Nov 2016 14:02:28 +0000 (14:02 +0000)]
re PR target/77881 (Non-optimal signed comparison on x86_64 since r146817)
PR missed-optimization/77881
* combine.c (simplify_comparison): Remove useless subregs
also inside the loop, not just after it.
(make_compound_operation): Recognize some subregs as being
masking as well.
Jason Merrill [Tue, 15 Nov 2016 05:22:28 +0000 (00:22 -0500)]
Various C++17 decomposition fixes.
* tree.c (bitfield_p): New.
* cp-tree.h: Declare it.
* typeck.c (cxx_sizeof_expr, cxx_alignof_expr)
(cp_build_addr_expr_1): Use it instead of DECL_C_BIT_FIELD.
* decl.c (cp_finish_decomp): Look through reference. Always
SET_DECL_DECOMPOSITION_P.
* semantics.c (finish_decltype_type): Adjust decomposition handling.
Ian Lance Taylor [Mon, 14 Nov 2016 23:16:04 +0000 (23:16 +0000)]
runtime: don't crash if signal handler info argument is nil
Apparently on Solaris 10 a SA_SIGINFO signal handler can be invoked with
a nil info argument. I would not have believed it but I've now seen it
happen, and the sigaction man page actually says "If the second argument
is not equal to NULL, it points to a siginfo_t structure...." So, if
that happens, don't crash.
Also fix another case where we want to make sure that &T{} does not
allocate.
Implement P0504R0 (Revisiting in-place tag types for any/optional/variant).
Implement P0504R0 (Revisiting in-place tag types for
any/optional/variant).
* include/std/any (any(_ValueType&& __value)): Constrain
the __is_in_place_type with the decayed type.
(make_any): Adjust to use the new tag type.
* include/std/utility (in_place_tag): Remove.
(in_place_t): Turn into a non-reference tag type.
(__in_place, __in_place_type, __in_place_index): Remove.
(in_place): Turn into an inline variable of non-reference
tag type.
(in_place<_Tp>): Remove.
(in_place_index<_Idx>): Remove.
(in_place_type_t): New.
(in_place_type): Turn into a variable template of non-reference
type.
(in_place_index_t): New.
(in_place_index): Turn into a variable template of non-reference
type.
* include/std/variant
(_Variant_storage(in_place_index_t<_Np>, _Args&&...)): Adjust to
use the new tag type.
(_Union(in_place_index_t<0>, _Args&&...)): Likewise.
(_Union(in_place_index_t<_Np>, _Args&&...)): Likewise.
(_Variant_base()): Likewise.
(variant(_Tp&&)): Likewise.
(variant(in_place_type_t<_Tp>, _Args&&...)): Likewise.
(variant(in_place_type_t<_Tp>, initializer_list<_Up>,
_Args&&...)): Likewise.
(variant(in_place_index_t<_Np>, _Args&&...)): Likewise.
(variant(in_place_index_t<_Np>, initializer_list<_Up>,
_Args&&...)): Likewise
(variant(allocator_arg_t, const _Alloc&)): Likewise.
(variant(allocator_arg_t, const _Alloc&, _Tp&&)): Likewise.
(variant(allocator_arg_t, const _Alloc&, in_place_type_t<_Tp>,
_Args&&...)): Likewise.
(variant(allocator_arg_t, const _Alloc&, in_place_type_t<_Tp>,
initializer_list<_Up>, _Args&&...)): Likewise.
(variant(allocator_arg_t, const _Alloc&, in_place_index_t<_Np>,
_Args&&...)): Likewise.
(variant(allocator_arg_t, const _Alloc&, in_place_index_t<_Np>,
initializer_list<_Up>, _Args&&...)): Likewise.
(emplace(_Args&&...)): Likewise.
(emplace(initializer_list<_Up>, _Args&&...)): Likewise.
* testsuite/20_util/any/cons/explicit.cc: Likewise.
* testsuite/20_util/any/cons/in_place.cc: Likewise.
* testsuite/20_util/any/requirements.cc: Add tests to
check that any is not constructible from the new in_place_type_t
of any value category.
* testsuite/20_util/in_place/requirements.cc: Adjust to
use the new tag type.
* testsuite/20_util/variant/compile.cc: Likewise.
* testsuite/20_util/variant/run.cc: Likewise.
tree-ssa-math-opts.c (find_bswap_or_nop): Zero out bytes in cmpxchg and cmpnop in two steps...
2016-11-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* tree-ssa-math-opts.c (find_bswap_or_nop): Zero out bytes in cmpxchg
and cmpnop in two steps: first the ones not accessed in original gimple
expression in a endian independent way and then the ones not accessed
in the final result in an endian-specific way.
(bswap_replace): Stop doing big endian adjustment.
* tree-ssanames.c (make_ssa_name_fn): New argument, check for version
and assign proper version for parsed ssa names.
* tree-ssanames.h (make_ssa_name_fn): Add new argument to the function.
* internal-fn.c (expand_PHI): New function.
* internal-fn.h (expand_PHI): Declared here.
* internal-fn.def: New defination for PHI.
* tree-cfg.c (lower_phi_internal_fn): New function.
(build_gimple_cfg): Call it.
(verify_gimple_call): Condition for passing label as arg in internal
function PHI.
* tree-into-ssa.c (rewrite_add_phi_arguments): Handle already
present PHIs with arguments.
* tree-ssanames.c (make_ssa_name_fn): New argument, check for version
and assign proper version for parsed ssa names.
* tree-ssanames.h (make_ssa_name_fn): Add new argument to the function.
* internal-fn.c (expand_PHI): New function.
* internal-fn.h (expand_PHI): Declared here.
* internal-fn.def: New defination for PHI.
* tree-cfg.c (lower_phi_internal_fn): New function.
(build_gimple_cfg): Call it.
(verify_gimple_call): Condition for passing label as arg in internal
function PHI.
* tree-into-ssa.c (rewrite_add_phi_arguments): Handle already
present PHIs with arguments.
Martin Liska [Mon, 14 Nov 2016 12:09:48 +0000 (13:09 +0100)]
Introduce -fprofile-update=prefer-atomic
PR bootstrap/78069
* common.opt: Add prefer-atomic as a new enum value for
-fprofile-update.
* coretypes.h: Likewise.
* doc/invoke.texi: Document the new option value.
* gcc.c: Replace atomic with prefer-atomic. Remove warning.
* tree-profile.c (tree_profiling): Select default value
of -fprofile-update when 'prefer-atomic' is selected.
PR bootstrap/78069
* gcc.dg/no_profile_instrument_function-attr-1.c: Update test
to match scanned pattern.
* gcc.dg/tree-ssa/ssa-lim-11.c: Likewise.
Wilco Dijkstra [Mon, 14 Nov 2016 12:07:03 +0000 (12:07 +0000)]
The second patch updates the Cortex-A57 scheduler now that we can differentiate between shifts and bitfield inserts.
The second patch updates the Cortex-A57 scheduler now that we can differentiate
between shifts and bitfield inserts. The Cortex-A57 Software Optimization Guide
indicates that BFM operations use the integer multi-cycle pipeline, while ARM
UXTB/H instructions use the Integer 1 or Integer 0 pipelines, so swap the bfm
and extend reservations. This results in minor scheduling differences.
Wilco Dijkstra [Mon, 14 Nov 2016 12:04:11 +0000 (12:04 +0000)]
Currently the SBFM, UBFM and BFM instructions all use the attribute "bfm".
SBFM and UBFM include all shifts on AArch64, which are simpler than bitfield
insert. Add a new bfx attribute for these instructions so that they can be
modelled more accurately in the future. There is no difference in code
generation.
Wilco Dijkstra [Mon, 14 Nov 2016 11:51:33 +0000 (11:51 +0000)]
The existing vector costs stop some beneficial vectorization.
The existing vector costs stop some beneficial vectorization. This is mostly
due to vector statement cost being set to 3 as well as vector loads having a
higher cost than scalar loads. This means that even when we vectorize 4x, it
is possible that the cost of a vectorized loop is similar to the scalar
version, and we fail to vectorize.
Using a cost of 3 for a vector operation suggests they are 3 times as
expensive as scalar operations. Since most vector operations have a
similar throughput as scalar operations, this is not correct.
Using slightly lower values for these heuristics now allows this loop
and many others to be vectorized. On a proprietary benchmark the gain
from vectorizing this loop is around 15-30% which shows vectorizing it is
indeed beneficial.
* config/aarch64/aarch64.c (cortexa57_vector_cost):
Change vec_stmt_cost, vec_align_load_cost and vec_unalign_load_cost.
Jakub Jelinek [Mon, 14 Nov 2016 07:54:50 +0000 (08:54 +0100)]
Implement P0217R3 - C++17 structured bindings
Implement P0217R3 - C++17 structured bindings
* g++.dg/cpp1z/decomp1.C: New test.
* g++.dg/cpp1z/decomp2.C: New test.
* g++.dg/cpp1z/decomp3.C: New test.
* g++.dg/cpp1z/decomp4.C: New test.
* g++.dg/cpp1z/decomp5.C: New test.
* g++.dg/cpp1z/decomp6.C: New test.
* g++.dg/cpp1z/decomp7.C: New test.
* g++.dg/cpp1z/decomp8.C: New test.
* g++.dg/cpp1z/decomp9.C: New test.
* g++.dg/cpp1z/decomp10.C: New test.
Co-Authored-By: Jason Merrill <jason@redhat.com>
From-SVN: r242378
Jason Merrill [Mon, 14 Nov 2016 04:58:45 +0000 (23:58 -0500)]
Improve various diagnostic issues.
* call.c (build_new_method_call_1): Include template arguments in
error message.
(print_error_for_call_failure): Likewise.
(build_new_function_call): Pass them in.
* name-lookup.c (supplement_binding_1): Don't complain about a
conflict with an erroneous declaration.
* error.c (dump_decl): Fix printing of alias declaration.
* decl.c (make_typename_type): Call cxx_incomplete_type_error.
* parser.c (cp_parser_diagnose_invalid_type_name): Likewise.
* semantics.c (perform_koenig_lookup): Don't wrap an error in
TEMPLATE_ID_EXPR.
Jonathan Wakely [Sun, 13 Nov 2016 22:57:45 +0000 (22:57 +0000)]
Add array support to std::shared_ptr for C++17
* doc/xml/manual/status_cxx2017.xml: Update status.
* doc/html/manual/status.html: Regenerate.
* include/bits/shared_ptr.h (shared_ptr(unique_ptr<_Yp, _Del>)): Add
extension constructor to maintain C++14 behaviour.
* include/bits/shared_ptr_base.h (__sp_array_delete): Add new struct.
(__shared_count(_Ptr, false_type), __shared_count(_Ptr, true_type)):
New constructors.
(__sp_compatible_with, __sp_is_constructible): Add specializations
for array support.
(__sp_is_constructible_arr, __sp_is_constructible_arrN): New helpers.
(__shared_ptr_access): New base class for observer member functions.
(__shared_ptr::element_type): Use remove_extent.
(__shared_ptr::_UniqCompatible): Add __sp_compatible_with check.
(__shared_ptr(_Yp*)): Use tag dispatching to call new __shared_count
constructor.
(__shared_ptr(unique_ptr<_Yp, _Del>)): Add extension constructor.
(__shared_ptr::operator*, __shared_ptr::operator->): Remove and
inherit from __shared_ptr_access base class.
(__shared_ptr::__has_esft_base): Return false for array types.
(__weak_ptr::element_type): Use remove_extent.
* include/experimental/bits/shared_ptr.h (__libfund_v1): Remove.
(__shared_ptr<__libfund_v1<_Tp>>): Remove specializations.
(__wak_ptr<__libfund_v1<_Tp>>): Likewise.
(experimental::__sp_compatible_v): Redefine using
__sp_compatible_with.
(experimental::__sp_is_constructible_v): Redefine using
__sp_is_constructible.
(get_deleter, operator<<): Change argument from __shared_ptr to
shared_ptr.
* testsuite/20_util/shared_ptr/cons/array.cc: New test.
* testsuite/20_util/shared_ptr/cons/unique_ptr_array.cc: Adjust for
new behaviour.
* testsuite/20_util/shared_ptr/observers/array.cc: Test observers for
arrays.
* testsuite/20_util/shared_ptr/observers/array_neg.cc: New test.
Eric Botcazou [Sun, 13 Nov 2016 18:08:25 +0000 (18:08 +0000)]
utils2.c (gnat_protect_expr): Also protect only the address if the expression is the component of a dereference.
* gcc-interface/utils2.c (gnat_protect_expr): Also protect only the
address if the expression is the component of a dereference.
Do not use a reference type for the final temporary reference.
rs6000: Don't forget to initialize the TOC (PR77957)
The code generating traceback tables mistakenly does an early return
if !optional_tbtab, which causes it to miss the code generating the TOC
section. This only matters if the TOC will be empty since otherwise
the section is created elsewhere.
This patch fixes it.
PR target/77957
* config/rs6000/rs6000.c (rs6000_output_function_epilogue): Don't
return early if !optional_tbtab.
Janus Weil [Sat, 12 Nov 2016 09:25:47 +0000 (10:25 +0100)]
re PR fortran/77501 ([F03] ICE in gfc_match_generic, at fortran/decl.c:9429)
2016-11-12 Janus Weil <janus@gcc.gnu.org>
PR fortran/77501
* class.c (gfc_find_typebound_intrinsic_op): Remove an unnecessary
assert and nullification.
* decl.c (gfc_match_decl_type_spec): Use gfc_get_tbp_symtree,
fix indentation.
(gfc_match_generic): Remove an unnecessary assert.
Use gfc_get_tbp_symtree to avoid ICE.
2016-11-12 Janus Weil <janus@gcc.gnu.org>
PR fortran/77501
* gfortran.dg/typebound_generic_16.f90: New test.
Eric Botcazou [Fri, 11 Nov 2016 22:38:33 +0000 (22:38 +0000)]
re PR rtl-optimization/59461 (missed zero-extension elimination in the combiner)
PR rtl-optimization/59461
* doc/rtl.texi (paradoxical subregs): Add missing word.
* combine.c (reg_nonzero_bits_for_combine): Do not discard results
in modes with precision larger than that of last_set_mode.
* rtlanal.c (nonzero_bits1) <SUBREG>: If WORD_REGISTER_OPERATIONS is
set and LOAD_EXTEND_OP is appropriate, propagate results from inner
REGs to paradoxical SUBREGs.
(num_sign_bit_copies1) <SUBREG>: Likewise. Check that the mode is not
larger than a word before invoking LOAD_EXTEND_OP on it.
Uros Bizjak [Fri, 11 Nov 2016 19:38:20 +0000 (20:38 +0100)]
i386.md (*<shift_insn><mode>3_doubleword): Mark operand 0 as earlyclobber.
* config/i386/i386.md (*<shift_insn><mode>3_doubleword): Mark
operand 0 as earlyclobber.
(*ashl<mode>3_doubleword): Ditto for all operand 0 alternatives.
Szabolcs Nagy [Fri, 11 Nov 2016 17:31:07 +0000 (17:31 +0000)]
[i386][musl] Add cpuinfo to static libgcc only on *-musl*
The __cpu_indicator_init and __cpu_model symbols are not safe to use
from shared libgcc_s.so from ifunc resolvers, so since gcc-6, only
the definitions from static libgcc.a are used, however the symbols
are kept in libgcc_s as well for backward compatibility (with
appropriate symbol version). On targets without such backward
compatibility concern add cpuinfo to the static library only (this
avoids running the ctor, reduces libgcc_s size and elf abi concerns
about the versioned symbols).
libgcc/
2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
* config.host (i[3456]86-*-musl*, x86_64-*-musl*): Use
i386/t-cpuinfo-static instead of i386/t-cpuinfo.
* config/i386/t-cpuinfo-static: New.
Jeff Law [Fri, 11 Nov 2016 16:00:47 +0000 (09:00 -0700)]
gimple-ssa-isolate-paths.c (is_divmod_with_given_divisor): New function.
* gimple-ssa-isolate-paths.c (is_divmod_with_given_divisor): New
function.
(stmt_uses_name_in_undefined_way): New function, extracted from
find_implicit_erroneous_behavior and extended for div/mod case.
(stmt_uses_0_or_null_in_undefined_way): New function, extracted from
find_explicit_erroneous_behavior and extended for div/mod case.
(find_implicit_erroneous_behavior): Use new helper function.
(find_explicit_erroneous_behavior): Use new helper function.
* gcc.dg/tree-ssa/isolate-6.c: New test.
* gcc.dg/tree-ssa/isolate-7.c: New test.
Jakub Jelinek [Fri, 11 Nov 2016 13:39:06 +0000 (14:39 +0100)]
re PR c++/72774 (ICE on invalid C++ code on x86_64-linux-gnu (tree check: expected tree that contains ‘decl minimal’ structure, have ‘tree_list’ in consider_binding_level, at cp/name-lookup.c:4721))
combine: Do not call simplify from inside change_zero_ext (PR78232)
When combine splits a three-insn combination into two instructions it
can reuse i2dest for the temporary result of the first new instruction.
However all information it has in reg_stat about that register will be
stale. This results in the simplify_gen_binary calls in change_zero_ext
using out-of-date information, which makes it think one of the ANDs
generated there always results in 0, and it doesn't get better from there.
This can also happen if a splitter in the MD uses nonzero_bits (for
example). I tried to make the splitting code in combine save and restore
the i2dest reg_stat info, but that causes one of the acats tests to fail.
This whole reg_stat thing needs an overhaul, and/or we shouldn't reuse
i2dest for unrelated purposes when splitting.
This patch changes change_zero_ext to do the expected simplifications
itself and not call simplify_gen_*.
PR rtl-optimization/78232
* combine.c (try_combine): Add a big comment about why reusing i2dest
is undesirable.
(change_zero_ext): Do not call simplify_gen_binary, do the
simplifications manually.
Jason Merrill [Thu, 10 Nov 2016 21:42:36 +0000 (16:42 -0500)]
PR c++/77337 - auto return and lambda
* pt.c (tsubst_friend_function): Don't set DECL_INITIAL.
(instantiate_decl): It's OK to defer a constexpr function.
* cp-tree.h (DECL_FRIEND_PSEUDO_TEMPLATE_INSTANTIATION): Check
DECL_LANG_SPECIFIC.
* decl2.c (decl_defined_p): Use it. No longer static.
* decl.c (redeclaration_error_message): Use decl_defined_p.
* constexpr.c (cxx_eval_call_expression): Set input_location around
call to instantiate_decl.
Michael Meissner [Thu, 10 Nov 2016 19:38:33 +0000 (19:38 +0000)]
rs6000.c (rs6000_hard_regno_mode_ok): If ISA 3.0...
[gcc]
2016-11-10 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If ISA 3.0,
enable HImode and QImode to go in vector registers by default if
the -mvsx-small-integer option is enabled.
(rs6000_secondary_reload_simple_move): Likewise.
(rs6000_preferred_reload_class): Don't force integer constants to
be loaded into vector registers that we can easily make into
memory (or being created in the GPRs and moved over with direct
move).
* config/rs6000/vsx.md (UNSPEC_P9_MEMORY): Delete, no longer
used.
(vsx_extract_<mode>): Rework V4SImode, V8HImode, and V16QImode
vector extraction on ISA 3.0 when the scalar integer can be
allocated in vector registers. Generate the VEC_SELECT directy,
and don't use UNSPEC's to avoid having the scalar type in a vector
register. Make the expander target registers, and let the
combiner fold in results storing to memory, if the machine
supports stores.
(vsx_extract_<mode>_di): Likewise.
(vsx_extract_<mode>_p9): Likewise.
(vsx_extract_<mode>_di_p9): Likewise.
(vsx_extract_<mode>_store_p9): Likewise.
(vsx_extract_si): Likewise.
(vsx_extract_<mode>_p8): Likewise.
(p9_lxsi<wd>zx): Delete, no longer used.
(p9_stxsi<wd>x): Likewise.
* config/rs6000/rs6000.md (INT_ISA3): New mode iterator for
integers in vector registers for ISA 3.0.
(QHI): Update comment.
(zero_extendqi<mode>2): Add support for ISA 3.0 scalar load or
vector extract instructions in sign/zero extend.
(zero_extendhi<mode>): Likewise.
(extendqi<mode>): Likewise.
(extendhi<mode>2): Likewise.
(HImode splitter for load/sign extend in vector register):
Likewise.
(float<QHI:mode><FP_ISA3:mode>2): Eliminate old method of
optimizing floating point conversions to/from small data types and
rewrite it to support QImode/HImode being allowed in vector
registers on ISA 3.0.
(float<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
(floatuns<QHI:mode><FP_ISA3:mode>2): Likewise.
(floatuns<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
(fix_trunc<SFDF:mode><QHI:mode>2): Likewise.
(fix_trunc<SFDF:mode><QHI:mode>2_internal): Likewise.
(fixuns_trunc<SFDF:mode><QHI:mode>2): Likewise.
(fixuns_trunc<SFDF:mode><QHI:mode>2_internal): Likewise.
VSPLITISW on ISA 2.07.
(movhi_internal): Combine movhi_internal and movqi_internal into
one mov<mode>_internal with an iterator. Add support for QImode
and HImode being allowed in vector registers. Make large number
of attributes and constraints easier to read.
(movqi_internal): Likewise.
(mov<mode>_internal): Likewise.
(movdi_internal64): Fix constraint to allow loading -16..15 with
VSPLITISW on ISA 2.07.
(integer XXSPLTIB splitter): Add support for QI, HI, and SImode as
well as DImode.
[gcc/testsuite]
2016-11-10 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/vsx-qimode.c: New test for QImode, HImode
being allowed in vector registers.
* gcc.target/powerpc/vsx-qimode2.c: Likewise.
* gcc.target/powerpc/vsx-qimode3.c: Likewise.
* gcc.target/powerpc/vsx-himode.c: Likewise.
* gcc.target/powerpc/vsx-himode2.c: Likewise.
* gcc.target/powerpc/vsx-himode3.c: Likewise.
* gcc.target/powerpc/p9-extract-1.c: Change MFVSRD to just MFVSR,
to allow matching MFVSRD or MFVSRW.
Pat Haugen [Thu, 10 Nov 2016 18:55:57 +0000 (18:55 +0000)]
re PR rtl-optimization/78241 (wrong code with -funroll-loops)
PR rtl-optimization/78241
* loop-unroll.c (unroll_loop_runtime_iterations): Don't adjust 'niter', but
emit initial peel copy if niter expr is not reliable.
If maybe_record_trace_start fails because the CFI is inconsistent on two
paths into a block it currently just ICEs. This changes it to also dump
the CFI on those two paths in the dump file; debugging it without that
information is hopeless.
* dwarf2cfi.c (dump_cfi_row): Add forward declaration.
(maybe_record_trace_start): If the CFI is different on the new and
old paths, print out both to the dump file before ICEing.