Michael Meissner [Thu, 27 Oct 2016 20:52:07 +0000 (20:52 +0000)]
constraints.md (wH constraint): Add new constraints for allowing 32-bit integers (and eventually 8/16-bit...
[gcc]
2016-10-27 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/constraints.md (wH constraint): Add new
constraints for allowing 32-bit integers (and eventually 8/16-bit
integers) into the vector registers.
(wI constraint): Likewise.
(wJ constraint): Likewise.
(wK constraint): Likewise.
* config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Add
-mvsx-small-integer as a default option for ISA 2.07
(i.e. power8).
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000.opt (-mvsx-small-integer): Add new debug
switch to turn off small integer support in vector registers.
* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Eliminate
test for -mupper-regs-di, since it is already done with the
reg_add[mode].scalar_in_vsx_p. Add support for the switch
-mvsx-small-integer.
(rs6000_debug_reg_global): Add support for wH, wI, wJ, and wK
constraints.
(rs6000_setup_reg_addr_masks): Likewise.
(rs6000_init_hard_regno_mode_ok): Likewise.
(rs6000_option_override_internal): Add consistency checks for
-mvsx-small-integer.
(rs6000_secondary_reload_simple_move): SImode is a simple move if
-mvsx-small-integer.
(rs6000_secondary_reload): Use std::swap.
(rs6000_preferred_reload_class): Don't prefer FLOAT_REGS over
VSX_REGS for small integers in vector registers, since there is no
D-FORM address mode for such types.
(rs6000_register_move_cost): Use FIRST_FPR_REGNO instead of 32.
(rs6000_opt_masks): Add -mvsx-small-integer.
* config/rs6000/vsx.md (VSINT_84): Add SImode for small integer
support.
(VSX_EXTRACT_I2): Clone VSX_EXTRACT_I, but drop V4SI since SImode
extracts can be done on ISA 2.07.
(vsx_extract_<mode>): Add support for small integers in vsx
registers.
(vsx_extract_<mode>_p9): Use 'v' instead of VSX_EX, since we no
longer support V4SImode in this pattern.
(vsx_extract_si): New insn to support extraction of SImode in ISA
2.07 using either xxextractuw or vspltw.
(vsx_extract_<mode>_p8): Use 'v' instead of VSX_EX, since we no
longer support V4SImode in this pattern.
* config/rs6000/rs6000.h (enum rs6000_reg_class_enum): Add wH, wI,
wJ, and wK constraints.
* config/rs6000/rs6000.md (f32_sv): Use correct instruction for
storing SDmode with VSX instructions.
(zero_extendsi<mode>2): Reorder pattern, so RLDICL comes after the
GPR load and before the FPR and VSX loads. Remove ??, ! from the
constraints. Add MFVSRWZ and XXEXTRACTUW instructions to support
small integers in vector registers.
(extendsi<mode>2): Reorder pattern, so EXTSW comes after the GPR
load and before the FPR and VSX loads. Remove ??, ! from the
constraints. Add VEXTSW2D support for small integers in vector
registers.
(lfiwax): Remove ! constraint. Add VEXTSW2D support for small
integers in vector registers.
(floatsi<mode>2_lfiwax): If -mvsx-small-integer issue a normal
move instead of using an UNSPEC.
(lfiwzx): Remove ! constraint. Add XXEXTRACTUW support for small
integers in vector registers.
(floatunssi<mode>2_lfiwzx): If -mvsx-small-integer issue a normal
move instead of using an UNSPEC.
(movsi_internal1): Add support for -mvsx-small-integer. Align
columns so that it is more readable.
(SImode splitter for ISA 3.0 constants): Add splitter for
-128..127 constants that can easily be constructed on ISA 3.0.
* doc/md.texi (PowerPC Constraints): Document wH, wI, wJ, and wK
constraints.
[gcc/testsuite]
2016-10-27 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/vsx-simode.c: New test.
* gcc.target/powerpc/vsx-simode2.c: Likewise.
* gcc.target/powerpc/vsx-simode3.c: Likewise.
Jakub Jelinek [Thu, 27 Oct 2016 19:55:12 +0000 (21:55 +0200)]
re PR fortran/78026 (ICE in gfc_resolve_omp_declare_simd, at fortran/openmp.c:5190)
PR fortran/78026
* parse.c (decode_statement): Don't create namespace for possible
select type here and destroy it afterwards.
(parse_select_type_block): Set gfc_current_ns to new_st.ext.block.ns.
(parse_executable, gfc_parse_file): Formatting fixes.
* match.c (gfc_match_select_type): Create namespace for select type
here, only after matching select type. Formatting fixes. Free that
namespace if not returning MATCH_YES, after gfc_undo_symbols,
otherwise remember it in new_st.ext.block.ns and switch to parent
namespace anyway.
* gfortran.dg/gomp/pr78026.f03: New test.
* gfortran.dg/select_type_38.f03: New test.
Jonathan Wakely [Thu, 27 Oct 2016 11:01:49 +0000 (12:01 +0100)]
Adjust precision of filesystem::last_write_time tests
* testsuite/experimental/filesystem/iterators/directory_iterator.cc:
Use end() function to get end iterator.
* testsuite/experimental/filesystem/iterators/pop.cc: Remove printf
statements that were present for debugging.
* testsuite/experimental/filesystem/iterators/
recursive_directory_iterator.cc: Use end() function to get end
iterator.
* testsuite/experimental/filesystem/operations/last_write_time.cc:
Only require file timestamps to be accurate to one second.
2016-10-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/arm.c (arm_split_atomic_op): Add function comment. Add
logic to to decide whether to copy over old value to register for new
value.
* config/arm/sync.md: Add comments explaning why mode and code
attribute are not defined in iterators.md
(thumb1_atomic_op_str): New code attribute.
(thumb1_atomic_newop_str): Likewise.
(thumb1_atomic_fetch_op_str): Likewise.
(thumb1_atomic_fetch_newop_str): Likewise.
(thumb1_atomic_fetch_oldop_str): Likewise.
(atomic_exchange<mode>): Add new ARMv8-M Baseline only alternatives to
mirror the more restrictive constraints of the Thumb-1 insns after
split compared to Thumb-2 counterpart insns.
(atomic_<sync_optab><mode>): Likewise. Add comment to keep constraints
in sync with non atomic version.
(atomic_nand<mode>): Likewise.
(atomic_fetch_<sync_optab><mode>): Likewise.
(atomic_fetch_nand<mode>): Likewise.
(atomic_<sync_optab>_fetch<mode>): Likewise.
(atomic_nand_fetch<mode>): Likewise.
* config/arm/thumb1.md (thumb1_addsi3): Add comment to keep contraint
in sync with atomic version.
(thumb1_subsi3_insn): Likewise.
(thumb1_andsi3_insn): Likewise.
(thumb1_iorsi3_insn): Likewise.
(thumb1_xorsi3_insn): Likewise.
Kelvin Nilsen [Wed, 26 Oct 2016 20:19:39 +0000 (20:19 +0000)]
re PR target/78056 (build failure on Power7)
gcc/ChangeLog:
2016-10-26 Kelvin Nilsen <kelvin@gcc.gnu.org>
PR target/78056
* config/rs6000/rs6000.c (spe_init_builtins): Modify loops to not
define builtin functions from the bdesc_spe_predicates or
bdesc_spe_evsel arrays if the builtin mask is not compatible with
the current compiler configuration.
(paired_init_builtins): Modify loop to not define define builtin
functions from the bdesc_paried_preds array if the builtin mask is
not compatible with the current compiler configuration.
(altivec_init_builtins): Modify loops to not define the
__builtin_altivec_stxvl function nor the builtin functions from
the bdesc_dst or bdesc_altivec_preds, or bdesc_abs arrays if the
builtin mask is not compatible with the current compiler
configuration.
Jakub Jelinek [Wed, 26 Oct 2016 16:21:56 +0000 (18:21 +0200)]
re PR fortran/77973 (ICE in scan_omp_1_op, at omp-low.c:3841)
PR fortran/77973
* gimplify.c (gimplify_adjust_omp_clauses_1): For all added map
clauses with OMP_CLAUSE_SIZE being a decl, call omp_notice_variable
on outer context if any.
* gfortran.dg/gomp/pr77973.f90: New test.
Co-Authored-By: Martin Liska <mliska@suse.cz>
From-SVN: r241581
Jakub Jelinek [Wed, 26 Oct 2016 16:20:54 +0000 (18:20 +0200)]
gen-pass-instances.awk (adjust_linenos): INcrement pass_lines[p] by increment rather than double it.
* gen-pass-instances.awk (adjust_linenos): INcrement pass_lines[p]
by increment rather than double it.
(insert_remove_pass): Strip leading whitespace from args[3]. Don't
emit a space before args[4].
(END): Don't emit a space before with_arg.
2016-10-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/sync.md (atomic_compare_and_swap<mode>_1): Add new ARMv8-M
Baseline only alternatives to (i) hold store atomic success value in a
return register rather than a scratch register, (ii) use a low register
for it and to (iii) ensure the cbranchsi insn generated by the split
respect the constraints of Thumb-1 cbranchsi4_insn and
cbranchsi4_scratch.
* config/arm/thumb1.md (cbranchsi4_insn): Add comment to indicate
constraints must match those in atomic_compare_and_swap.
(cbranchsi4_scratch): Likewise.
Refactor atomic compare_and_swap to make it fit for ARMv8-M Baseline
2016-10-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/arm.c (arm_expand_compare_and_swap): Add new bdst local
variable. Add the new parameter to the insn generator. Set that
parameter to be CC flag for 32-bit targets, bval otherwise. Set the
return value from the negation of that parameter for Thumb-1, keeping
the logic unchanged otherwise except for using bdst as the destination
register of the compare_and_swap insn.
(arm_split_compare_and_swap): Add explanation about how is the value
returned to the function comment. Rename scratch variable to
neg_bval. Adapt initialization of variables holding operands to the
new operand numbers. Use return register to hold result of store
exclusive for Thumb-1, scratch register otherwise. Construct the
appropriate cbranch for Thumb-1 targets, keeping the logic unchanged
for 32-bit targets. Guard Z flag setting to restrict to 32bit targets.
Use gen_cbranchsi4 rather than hand-written conditional branch to loop
for strongly ordered compare_and_swap.
* config/arm/predicates.md (cc_register_operand): New predicate.
* config/arm/sync.md (atomic_compare_and_swap<mode>_1): Use a
match_operand with the new predicate to accept either the CC flag or a
destination register for the boolean return value, restricting it to
CC flag only via constraint. Adapt operand numbers accordingly.
Paul Thomas [Wed, 26 Oct 2016 14:48:02 +0000 (14:48 +0000)]
re PR fortran/78108 (Generic type-bound operator conflicts)
2016-10-26 Paul Thomas <pault@gcc.gnu.org>
PR fortran/78108
* resolve.c (resolve_typebound_intrinsic_op): For submodules
suppress the error and return if the same procedure symbol
is added more than once to the interface.
2016-10-26 Paul Thomas <pault@gcc.gnu.org>
PR fortran/78108
* gfortran.dg/submodule_18.f08: New test.
* gfortran.dg/submodule_19.f08: New test.
Jonathan Wakely [Wed, 26 Oct 2016 13:34:34 +0000 (14:34 +0100)]
Fix error handling in recursive_directory_iterator::increment
* src/filesystem/dir.cc (recursive_directory_iterator::increment):
Reset state on error.
* testsuite/experimental/filesystem/iterators/
recursive_directory_iterator.cc: Check state after increment error.
Michael Matz [Wed, 26 Oct 2016 12:54:30 +0000 (12:54 +0000)]
fix pr78060 pr78061 pr78088
PR tree-optimization/78060
PR tree-optimization/78061
PR tree-optimization/78088
* tree-ssa-loop-split.c (easy_exit_values): New function.
(tree_ssa_split_loops): Use it.
(compute_new_first_bound): Change order of operations,
fix invalid use of types.
testsuite/
* g++.dg/pr78060.C: New test.
* gfortran.dg/pr78061.f: New test.
* g++.dg/pr78088.C: New test.
libgfortran/io/
* libgfortran.h (IOPARM_OPEN_HAS_READONLY, IOPARM_OPEN_HAS_SHARE,
IOPARM_OPEN_HAS_CC): New for READONLY, SHARE, and CARRIAGECONTROL.
* close.c (st_close): Support READONLY.
* io.h (st_parameter_open, unit_flags): Support SHARE, CARRIAGECONTROL,
and READONLY.
* open.c (st_open): Ditto.
* transfer.c (data_transfer_init): Ditto.
* io.h (st_parameter_dt): New member 'cc' for CARRIAGECONTROL.
* write.c (write_check_cc, write_cc): New functions for CARRIAGECONTROL.
* transfer.c (next_record_cc): Ditto.
* file_pos.c (st_endfile): Support SHARE and CARRIAGECONTROL.
* io.h (st_parameter_inquire): Ditto.
* open.c (edit_modes, new_unit): Ditto.
* inquire.c (inquire_via_unit, inquire_via_filename): Ditto.
* io.h (unit_share, unit_cc, cc_fortran, IOPARM_INQUIRE_HAS_SHARE,
IOPARM_INQUIRE_HAS_CC): New for SHARE and CARRIAGECONTROL.
* open.c (share_opt, cc_opt): Ditto.
* read.c (read_x): Support CARRIAGECONTROL.
* transfer.c (read_sf, next_record_r, next_record_w): Ditto.
* write.c (list_formatted_write_scalar, write_a): Ditto.
* unix.h (close_share): New prototype.
* unix.c (open_share, close_share): New functions to handle SHARE.
* unix.c (open_external): Handle READONLY. Call open_share.
* close.c (st_close): Call close_share.
gcc/testsuite/
* dec_io_1.f90: New test.
* dec_io_2.f90: New test.
* dec_io_3.f90: New test.
* dec_io_4.f90: New test.
* dec_io_5.f90: New test.
* dec_io_6.f90: New test.
Georg-Johann Lay [Wed, 26 Oct 2016 09:46:44 +0000 (09:46 +0000)]
gen-pass-instances.awk is sensitive to the order in which passes are added...
gen-pass-instances.awk is sensitive to the order in which
passes are added; passes that appear later have to be added first.
PR target/71676
PR target/71678
* config/avr/avr-passes.def: Swap order of directives for
gen-pass-instances.awk.
Paul Thomas [Tue, 25 Oct 2016 20:37:05 +0000 (20:37 +0000)]
re PR fortran/45516 ([F08] allocatable compontents of recursive type)
2016-10-25 Paul Thomas <pault@gcc.gnu.org>
PR fortran/45516
* class.c (gfc_find_derived_vtab): Detect recursive allocatable
derived type components. If present, add '_deallocate' field to
the vtable and build the '__deallocate' function.
* decl.c (build_struct): Allow recursive allocatable derived
type components for -std=f2008 or more.
(gfc_match_data_decl): Accept these derived types.
* expr.c (gfc_has_default_initializer): Ditto.
* resolve.c (resolve_component): Make sure that the vtable is
built for these derived types.
* trans-array.c(structure_alloc_comps) : Use the '__deallocate'
function for the automatic deallocation of these types.
* trans-expr.c : Generate the deallocate accessor.
* trans.h : Add its prototype.
* trans-types.c (gfc_get_derived_type): Treat the recursive
allocatable components in the same way as the corresponding
pointer components.
2016-10-25 Paul Thomas <pault@gcc.gnu.org>
PR fortran/45516
* gfortran.dg/class_2.f03: Set -std=f2003.
* gfortran.dg/finalize_21.f90: Modify tree-dump.
* gfortran.dg/recursive_alloc_comp_1.f08: New test.
* gfortran.dg/recursive_alloc_comp_2.f08: New test.
* gfortran.dg/recursive_alloc_comp_3.f08: New test.
* gfortran.dg/recursive_alloc_comp_4.f08: New test.
David Malcolm [Tue, 25 Oct 2016 19:24:01 +0000 (19:24 +0000)]
input.c/libcpp: fix lifetimes of path buffers
Running "make selftest-valgrind" showed various leaks of the form:
408 bytes in 24 blocks are definitely lost in loss record 572 of 679
at 0x4A0645D: malloc (in /usr/lib64/valgrind/vgpreload_memcheck-amd64-linux.so)
by 0x1B0D057: xmalloc (xmalloc.c:148)
by 0x1ACCAA1: append_file_to_dir(char const*, cpp_dir*) [clone .isra.3] (files.c:1567)
by 0x1ACD56F: _cpp_find_file (files.c:390)
by 0x1ACF8FB: cpp_read_main_file(cpp_reader*, char const*) (init.c:632)
by 0x1AB3D97: selftest::lexer_test::lexer_test(selftest::line_table_case const&, char const*, selftest::lexer_test_options*) (input.c:2014)
by 0x1AB792B: selftest::test_lexer_string_locations_u8(selftest::line_table_case const&) (input.c:2713)
by 0x1ABA22A: selftest::for_each_line_table_case(void (*)(selftest::line_table_case const&)) (input.c:3227)
by 0x1ABA381: selftest::input_c_tests() (input.c:3260)
by 0x1A295F1: selftest::run_tests() (selftest-run-tests.c:62)
by 0xF20DC4: toplev::run_self_tests() (toplev.c:2076)
by 0xF20FCD: toplev::main(int, char**) (toplev.c:2153)
Fix the leak by freeing the file->path in destroy_cpp_file.
However, doing so would lead to a use-after-free in input.c's file cache
since the filenames in this cache are the libcpp file->path buffers.
Hence we need to ensure that any references to the file in the input.c
cache are purged before cleaning up file->path. This is normally done
by the temp_source_file dtor. Hence we need to reorder things to that
the temp_source_file dtor runs before cleaning up the cpp_parser. The
patch does this by introducing a wrapper class around cpp_parser *, so
that the dtor can run after the dtor for temp_source_file.
gcc/ChangeLog:
* input.c (fcache::file_patch): Add comment about lifetime.
(selftest::cpp_reader_ptr): New class.
(selftest::lexer_test): Convert m_parser from cpp_reader *
to a cpp_reader_ptr, and move m_tempfile to after it.
(selftest::lexer_test::lexer_test): Update for above reordering.
(lexer_test::~lexer_test): Move cleanup of m_parser to
cpp_reader_ptr's dtor.
David Malcolm [Tue, 25 Oct 2016 18:10:44 +0000 (18:10 +0000)]
Implement ~line_maps ()
line_maps instances such as the global line_table are
GC-managed, but the htab within location_adhoc_data_map.htab
is not GC-managed.
Previously this was deleted manually by a call to
location_adhoc_data_fini within toplev::main.
However, on adding a call to forcibly_ggc_collect after the
selftests, all of the htabs for the various line_tables
created during the selftests start showing up as leaks
in "make selftest-valgrind", e.g.:
13,536 (1,344 direct, 12,192 indirect) bytes in 12 blocks are definitely lost in loss record 1,065 of 1,086
at 0x4A081D4: calloc (in /usr/lib64/valgrind/vgpreload_memcheck-amd64-linux.so)
by 0x16DB3B0: xcalloc (xmalloc.c:163)
by 0x16D8D34: htab_create_typed_alloc (hashtab.c:358)
by 0x16D8DBD: htab_create_alloc (hashtab.c:286)
by 0x16A2CCC: linemap_init(line_maps*, unsigned int) (line-map.c:353)
by 0x1685605: selftest::line_table_test::line_table_test(selftest::line_table_case const&) (input.c:1624)
by 0x167D09C: selftest::test_applying_fixits_modernize_named_init(selftest::line_table_case const&) (edit-context.c:1430)
by 0x1686827: selftest::for_each_line_table_case(void (*)(selftest::line_table_case const&)) (input.c:3227)
by 0x167F067: selftest::edit_context_c_tests() (edit-context.c:1658)
by 0x1616E67: selftest::run_tests() (selftest-run-tests.c:71)
by 0xC0DB25: toplev::run_self_tests() (toplev.c:2076)
by 0x618EB4: toplev::main(int, char**) (toplev.c:2153)
This patch removes the manual one-time cleanup in favor of
adding a destructor to class line_maps, which cleans up
the non-GC-managed htab.
Doing so improves "make selftest-valgrind" from:
==61118== LEAK SUMMARY:
==61118== definitely lost: 121,248 bytes in 1,515 blocks
==61118== indirectly lost: 974,344 bytes in 959 blocks
==61118== possibly lost: 0 bytes in 0 blocks
==61118== still reachable: 1,332,599 bytes in 3,684 blocks
==61118== suppressed: 0 bytes in 0 blocks
to:
==57182== LEAK SUMMARY:
==57182== definitely lost: 13,840 bytes in 556 blocks
==57182== indirectly lost: 0 bytes in 0 blocks
==57182== possibly lost: 0 bytes in 0 blocks
==57182== still reachable: 1,355,703 bytes in 3,684 blocks
==57182== suppressed: 0 bytes in 0 blocks
gcc/ChangeLog:
* toplev.c (toplev::main): Remove call to
location_adhoc_data_fini.
libcpp/ChangeLog:
* include/line-map.h (line_maps::~line_maps): New dtor.
(location_adhoc_data_fini): Delete decl.
* line-map.c (line_maps::~line_maps): New dtor.
(location_adhoc_data_fini): Delete.
Jason Merrill [Tue, 25 Oct 2016 17:23:44 +0000 (13:23 -0400)]
constexpr.c (maybe_constant_init): Pull out TARGET_EXPR_INITIAL.
* constexpr.c (maybe_constant_init): Pull out TARGET_EXPR_INITIAL.
(cxx_eval_outermost_constant_expr): Don't return a CONSTRUCTOR
with CONSTRUCTOR_NO_IMPLICIT_ZERO.
(cxx_eval_call_expression): Clear CONSTRUCTOR_NO_IMPLICIT_ZERO.
re PR fortran/72770 (ICE in make_ssa_name_fn, at tree-ssanames.c:263)
gcc/testsuite/ChangeLog:
2016-10-25 Andre Vehreschild <vehre@gcc.gnu.org>
PR fortran/72770
* gfortran.dg/alloc_comp_class_5.f03: Added test again that caused
this pr.
gcc/fortran/ChangeLog:
2016-10-25 Andre Vehreschild <vehre@gcc.gnu.org>
PR fortran/72770
* class.c (find_intrinsic_vtab): No longer encode the string length
into vtype's name and use the char's kind for the size instead of
the string_length time the size.
* trans-array.c (gfc_conv_ss_descriptor): For deferred length char
arrays the dynamically sized type needs to be declared.
(build_class_array_ref): Address the i-th array element by multiplying
it with the _vptr->_size and the _len to make sure char arrays are
addressed correctly.
* trans-expr.c (gfc_conv_intrinsic_to_class): Made comment more
precise.
Jonathan Wakely [Tue, 25 Oct 2016 15:32:37 +0000 (16:32 +0100)]
Fix error handling in copy_file and equivalent
* src/filesystem/ops.cc (do_copy_file): Report an error if source or
destination is not a regular file (LWG 2712).
(equivalent): Fix error handling and result when only one file exists.
* testsuite/experimental/filesystem/operations/copy.cc: Remove files
created by tests. Test copying directories.
* testsuite/experimental/filesystem/operations/copy_file.cc: Remove
files created by tests.
* testsuite/experimental/filesystem/operations/equivalent.cc: New.
* testsuite/experimental/filesystem/operations/is_empty.cc: New.
* testsuite/experimental/filesystem/operations/read_symlink.cc: Remove
file created by test.
* testsuite/experimental/filesystem/operations/remove_all.cc: New.
* testsuite/util/testsuite_fs.h (~scoped_file): Only try to remove
file if path is non-empty, to support removal by other means.
Martin Liska [Tue, 25 Oct 2016 14:16:10 +0000 (16:16 +0200)]
Fix not caught use-after-scope with -O1 (PR sanitize/78106)
PR sanitizer/78106
* sanopt.c (imm_dom_path_with_freeing_call): Handle gasm
statements as they can also contain possibly a freeing call.
PR sanitizer/78106
* gcc.dg/asan/pr78106.c: New test.
Wilco Dijkstra [Tue, 25 Oct 2016 10:25:28 +0000 (10:25 +0000)]
With -fpu=neon DI mode shifts are expanded after reload.
With -fpu=neon DI mode shifts are expanded after reload. DI mode registers can
either fully or partially overlap on both ARM and Thumb-2. However the shift
expansion code can only deal with the full overlap case, and generates incorrect
code for partial overlaps. The fix is to add new variants that support either
full overlap or no overlap.
gcc/
PR target/78041
* config/arm/neon.md (ashldi3_neon): Add "r 0 i" and "&r r i" variants.
Remove partial overlap check for shift by 1.
(ashldi3_neon): Likewise.
testsuite/
* gcc.target/arm/pr78041.c: New test.
constraints.md (Q constraint): Document its use for Thumb-1.
2016-10-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/constraints.md (Q constraint): Document its use for
Thumb-1.
(Pf constraint): New constraint for relaxed, consume or relaxed memory
models.
* config/arm/sync.md (atomic_load<mode>): Add new ARMv8-M Baseline only
alternatives to allow any register when memory model matches Pf and
thus lda is used, but only low registers otherwise. Use unpredicated
output template for Thumb-1 targets.
(atomic_store<mode>): Likewise for stl.
(arm_load_exclusive<mode>): Add new ARMv8-M Baseline only alternative
whose output template does not have predication.
(arm_load_acquire_exclusive<mode>): Likewise.
(arm_load_exclusivesi): Likewise.
(arm_load_acquire_exclusivesi): Likewise.
(arm_store_release_exclusive<mode>): Likewise.
(arm_store_exclusive<mode>): Use unpredicated output template for
Thumb-1 targets.
Georg-Johann Lay [Tue, 25 Oct 2016 08:35:17 +0000 (08:35 +0000)]
New avt target pass to work around performance loss by PR fix.
gcc/
New avt target pass to work around performance loss by PR fix.
PR target/71676
PR target/71678
* config/avr/avr.md (casesi_<mode>_sequence) [qi,hi]: New insn.
(*cmp<mode>) [qi,qq,uqq,hi,hq,uhq,ha,uha]: Rename to cmp<mode>3.
* config/avr/predicates.md (extend_operator): New.
* config/avr/avr-passes.def (avr_pass_casesi): Register new pass.
* config/avr/avr-protos.h (avr_casei_sequence_check_operands)
(make_avr_pass_casesi): New prototypes.
* config/avr/avr.c (print-rtl.h): Include it.
(pass_data avr_pass_data_casesi): Data for new pass.
(avr_pass_casesi): New class implementing rtl_opt_pass .avr-casesi.
(make_avr_pass_casesi, avr_parallel_insn_from_insns)
(avr_is_casesi_sequence, avr_casei_sequence_check_operands)
(avr_optimize_casesi): New functions.
gcc/testsuite/
PR target/71676
PR target/71678
* gcc.target/avr/pr71676-2.c: New test.
git://gcc.gnu.org / gcc.git / log