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7 weeks agoFortran: check C_SIZEOF on additions from TS29113/F2018 [PR103496]
Harald Anlauf [Tue, 23 Apr 2024 18:21:43 +0000 (20:21 +0200)]
Fortran: check C_SIZEOF on additions from TS29113/F2018 [PR103496]

gcc/testsuite/ChangeLog:

PR fortran/103496
* gfortran.dg/c_sizeof_8.f90: New test.

7 weeks agoc++/modules: deduced return type merging [PR114795]
Patrick Palka [Tue, 23 Apr 2024 18:01:22 +0000 (14:01 -0400)]
c++/modules: deduced return type merging [PR114795]

When merging an imported function template specialization with an
existing one, if the existing one has an undeduced return type and the
imported one's is already deduced, we need to propagate the deduced type
since once we install the imported definition we won't get a chance to
deduce it by normal means.

So this patch makes is_matching_decl propagate the deduced return
type alongside our propagation of the exception specification.
Another option would be to propagate it later when installing the
imported definition from read_function_def, but it seems preferable
to do it sooner rather than later.

PR c++/114795

gcc/cp/ChangeLog:

* module.cc (trees_in::is_matching_decl): Propagate deduced
function return type.

gcc/testsuite/ChangeLog:

* g++.dg/modules/auto-4_a.H: New test.
* g++.dg/modules/auto-4_b.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
7 weeks agolibbacktrace: test --compress-debug-sections=ARG for each ARG
Ian Lance Taylor [Tue, 23 Apr 2024 17:00:03 +0000 (10:00 -0700)]
libbacktrace: test --compress-debug-sections=ARG for each ARG

This should fix a testsuite problem with Solaris ld that supports zlib
but not zlib-gabi.

* configure.ac: Test --compress-debug-sections=zlib-gnu and
--compress-debug-sections=zlib-gabi separately, setting new
automake conditionals.
* Makefile.am (ctestg, ctestg_alloc): Only build if
HAVE_COMPRESSED_DEBUG_ZLIB_GNU.
(ctesta, ctesta_alloc): Only build if
HAVE_COMPRESSED_DEBUG_ZLIB_GABI.
(ctestzstd_alloc): New test if HAVE_COMPRESSED_DEBUG_ZSTD.
* configure, Makefile.in: Regenerate.

7 weeks agotestsuite: Adjust testsuite expectations for diagnostic spelling fixes
Jakub Jelinek [Tue, 23 Apr 2024 15:39:48 +0000 (17:39 +0200)]
testsuite: Adjust testsuite expectations for diagnostic spelling fixes

The nullability-00.m* tests unfortunately check the exact spelling of
the diagnostics I've changed earlier today.

2024-04-23  Jakub Jelinek  <jakub@redhat.com>

* objc.dg/attributes/nullability-00.m: Adjust expected diagnostic
spelling: recognised -> recognized.
* obj-c++.dg/attributes/nullability-00.mm: Likewise.

7 weeks agoRemove repeated information in -ftree-loop-distribute-patterns doc
Jan Hubicka [Tue, 23 Apr 2024 13:51:42 +0000 (15:51 +0200)]
Remove repeated information in -ftree-loop-distribute-patterns doc

We have:

       -ftree-loop-distribute-patterns
           Perform loop distribution of patterns that can be code generated with calls to a library.  This flag is enabled by default at -O2 and higher, and by -fprofile-use and -fauto-profile.

           This pass distributes the initialization loops and generates a call to memset zero.  For example, the loop

...

           and the initialization loop is transformed into a call to memset zero.  This flag is enabled by default at -O3.  It is also enabled by -fprofile-use and -fauto-profile.

Which mentions optimizatoin flags twice and the repeated mention is out of
date, since we enable this option at -O2 as well.

gcc/ChangeLog:

* doc/invoke.texi (-ftree-loop-distribute-patterns): Remove duplicated
sentence about optimization flags implying this.

7 weeks agoFurther spelling fixes in translatable strings
Jakub Jelinek [Tue, 23 Apr 2024 12:51:26 +0000 (14:51 +0200)]
Further spelling fixes in translatable strings

This addresses the non-Oxford British English vs. US English spelling
nits in translatable strings.

I see various similar cases in m2 and rust FEs where they don't make it into
gcc.pot, guess those would be nice to get fixed too.

2024-04-23  Jakub Jelinek  <jakub@redhat.com>

* config/darwin.opt (init): Spelling fix: initialiser -> initializer.
gcc/c-family/
* c-attribs.cc (handle_objc_nullability_attribute): Spelling fix:
recognised -> recognized.
gcc/m2/
* lang.opt (fdef=, fmod=): Spelling fix: recognise -> recognize.

7 weeks agoSpelling fixes for translatable strings
Jakub Jelinek [Tue, 23 Apr 2024 12:50:27 +0000 (14:50 +0200)]
Spelling fixes for translatable strings

I've run aspell on gcc.pot (just quickly skimming, so pressing
I key hundreds of times and just stopping when I catch something that
looks like a misspelling).

I plan to commit this tomorrow as obvious unless somebody finds some
issues in it, you know, I'm not a native English speaker.
Yes, I know favour is valid UK spelling, but we spell the US way I think.
I've left some *ise* -> *ize* cases (recognise, initialise), those
had too many hits, though in translatable strings just 4, so maybe
worth changing too:
msgid "recognise the specified suffix as a definition module filename"
msgid "recognise the specified suffix as implementation and module filenames"
"initialiser for a dylib."
msgid "%qE attribute argument %qE is not recognised"

2024-04-23  Jakub Jelinek  <jakub@redhat.com>

* config/epiphany/epiphany.opt (may-round-for-trunc): Spelling fix:
floatig -> floating.
* config/riscv/riscv.opt (mcsr-check): Spelling fix: CRS -> CSR.
* params.opt (-param=ipa-cp-profile-count-base=): Spelling fix:
frequncy -> frequency.
gcc/c-family/
* c.opt (Wstrict-flex-arrays): Spelling fix: inproper -> improper.
gcc/cp/
* parser.cc (cp_parser_using_declaration): Spelling fix: favour
-> favor.
gcc/m2/
* lang.opt (fuse-list=): Spelling fix: finalializations ->
finalizations.

7 weeks agos390: testsuite: Xfail forwprop-4{0,1}.c
Stefan Schulze Frielinghaus [Tue, 23 Apr 2024 11:29:10 +0000 (13:29 +0200)]
s390: testsuite: Xfail forwprop-4{0,1}.c

The tests fail on s390 since can_vec_perm_const_p fails and therefore
the bit insert/ref survive which r14-3381-g27de9aa152141e aims for.
Strictly speaking, the tests only fail in case the target supports
vectors, i.e., for targets prior z13 or in case of -mesa the emulated
vector operations are optimized out.

Set to xfail and tracked by PR114802.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/forwprop-40.c: Xfail for s390.
* gcc.dg/tree-ssa/forwprop-41.c: Xfail for s390.
* lib/target-supports.exp: Add target check s390_mvx.

7 weeks agoFortran: Check that the ICE does not reappear [PR102597]
Paul Thomas [Tue, 23 Apr 2024 09:22:48 +0000 (10:22 +0100)]
Fortran: Check that the ICE does not reappear [PR102597]

2024-04-23  Paul Thomas  <pault@gcc.gnu.org>

gcc/testsuite/
PR fortran/102597
* gfortran.dg/pr102597.f90: New test.

7 weeks agotree-optimization/114799 - SLP and patterns
Richard Biener [Tue, 23 Apr 2024 06:39:03 +0000 (08:39 +0200)]
tree-optimization/114799 - SLP and patterns

The following plugs a hole with computing whether a SLP node has any
pattern stmts which is important to know when we want to replace it
by a CTOR from external defs.

PR tree-optimization/114799
* tree-vect-slp.cc (vect_get_and_check_slp_defs): Properly
update ->any_pattern when swapping operands.

* gcc.dg/vect/bb-slp-pr114799.c: New testcase.

7 weeks agos390x: Fix vec_xl/vec_xst type aliasing [PR114676]
Andreas Krebbel [Tue, 23 Apr 2024 08:05:46 +0000 (10:05 +0200)]
s390x: Fix vec_xl/vec_xst type aliasing [PR114676]

The requirements of the vec_xl/vec_xst intrinsincs wrt aliasing of the
pointer argument are not really documented.  As it turns out, users
are likely to get it wrong.  With this patch we let the pointer
argument alias everything in order to make it more robust for users.

gcc/ChangeLog:

PR target/114676
* config/s390/s390-c.cc (s390_expand_overloaded_builtin): Use a
MEM_REF with an addend of type ptr_type_node.

gcc/testsuite/ChangeLog:

PR target/114676
* gcc.target/s390/zvector/pr114676.c: New test.

Suggested-by: Jakub Jelinek <jakub@redhat.com>
7 weeks agoc++: Copy over DECL_DISREGARD_INLINE_LIMITS flag to inheriting ctors [PR114784]
Jakub Jelinek [Tue, 23 Apr 2024 06:36:15 +0000 (08:36 +0200)]
c++: Copy over DECL_DISREGARD_INLINE_LIMITS flag to inheriting ctors [PR114784]

The following testcase is rejected with
error: inlining failed in call to 'always_inline' '...': call is unlikely and code size would grow
errors.  The problem is that starting with the r14-2149 change
we try to copy most of the attributes from the inherited to
inheriting ctor, but don't copy associated flags that decl_attributes
sets.

Now, the other clone_attrs user, cp/optimize.cc (maybe_clone_body)
copies over
      DECL_COMDAT (clone) = DECL_COMDAT (fn);
      DECL_WEAK (clone) = DECL_WEAK (fn);
      if (DECL_ONE_ONLY (fn))
        cgraph_node::get_create (clone)->set_comdat_group (cxx_comdat_group (clone));
      DECL_USE_TEMPLATE (clone) = DECL_USE_TEMPLATE (fn);
      DECL_EXTERNAL (clone) = DECL_EXTERNAL (fn);
      DECL_INTERFACE_KNOWN (clone) = DECL_INTERFACE_KNOWN (fn);
      DECL_NOT_REALLY_EXTERN (clone) = DECL_NOT_REALLY_EXTERN (fn);
      DECL_VISIBILITY (clone) = DECL_VISIBILITY (fn);
      DECL_VISIBILITY_SPECIFIED (clone) = DECL_VISIBILITY_SPECIFIED (fn);
      DECL_DLLIMPORT_P (clone) = DECL_DLLIMPORT_P (fn);
      DECL_DISREGARD_INLINE_LIMITS (clone) = DECL_DISREGARD_INLINE_LIMITS (fn);
The following patch just copies DECL_DISREGARD_INLINE_LIMITS to fix
this exact bug, not really sure which other flags should be copied
and which shouldn't.
Plus there are tons of other flags, some of which might need to be copied
too, some of which might not, perhaps in both places, like:
DECL_UNINLINABLE, maybe DECL_PRESERVE_P, TREE_USED, maybe
DECL_USER_ALIGN/DECL_ALIGN, maybe DECL_WEAK, maybe
DECL_NO_INSTRUMENT_FUNCTION_ENTRY_EXIT, DECL_NO_LIMIT_STACK.
TREE_READONLY, DECL_PURE_P, TREE_THIS_VOLATILE (for const, pure and
noreturn attributes) probably makes no sense, DECL_IS_RETURNS_TWICE neither
(returns_twice ctor?).  What about TREE_NOTHROW?
DECL_FUNCTION_SPECIFIC_OPTIMIZATION, DECL_FUNCTION_SPECIFIC_TARGET...

Anyway, another problem is that if inherited_ctor is a TEMPLATE_DECL, as
also can be seen in the using D<T>::D; case in the testcase, then
DECL_ATTRIBUTES (fn) = clone_attrs (DECL_ATTRIBUTES (inherited_ctor));
attempts to copy the attributes from the TEMPLATE_DECL which doesn't have
them.  The following patch copies them from STRIP_TEMPLATE (inherited_ctor)
which does.  E.g. DECL_DECLARED_CONSTEXPR_P works fine as the macro
itself uses STRIP_TEMPLATE too, but not 100% sure about other macros used
on inherited_ctor earlier.

2024-04-23  Jakub Jelinek  <jakub@redhat.com>

PR c++/114784
* method.cc (implicitly_declare_fn): Call clone_attrs
on DECL_ATTRIBUTES on STRIP_TEMPLATE (inherited_ctor) rather than
inherited_ctor.  Also copy DECL_DISREGARD_INLINE_LIMITS flag from it.

* g++.dg/cpp0x/inh-ctor39.C: New test.

7 weeks agoc++: Check if allocation functions are xobj members [PR114078]
Nathaniel Shead [Sat, 20 Apr 2024 05:08:02 +0000 (15:08 +1000)]
c++: Check if allocation functions are xobj members [PR114078]

A class allocation member function is implicitly 'static' by
[class.free] p3, so cannot have an explicit object parameter.

PR c++/114078

gcc/cp/ChangeLog:

* decl.cc (grokdeclarator): Check allocation functions for xobj
parameters.

gcc/testsuite/ChangeLog:

* g++.dg/cpp23/explicit-obj-ops-alloc.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
7 weeks agoLoongArch: Define builtin macros for ISA evolutions
Yang Yujie [Tue, 23 Apr 2024 02:42:48 +0000 (10:42 +0800)]
LoongArch: Define builtin macros for ISA evolutions

Detailed description of these definitions can be found at
https://github.com/loongson/la-toolchain-conventions, which
the LoongArch GCC port aims to conform to.

gcc/ChangeLog:

* config.gcc: Add loongarch-evolution.o.
* config/loongarch/genopts/genstr.sh: Enable generation of
loongarch-evolution.[cc,h].
* config/loongarch/t-loongarch: Likewise.
* config/loongarch/genopts/gen-evolution.awk: New file.
* config/loongarch/genopts/isa-evolution.in: Mark ISA version
of introduction for each ISA evolution feature.
* config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
Define builtin macros for enabled ISA evolutions and the ISA
version.
* config/loongarch/loongarch-cpu.cc: Use loongarch-evolution.h.
* config/loongarch/loongarch.h: Likewise.
* config/loongarch/loongarch-cpucfg-map.h: Delete.
* config/loongarch/loongarch-evolution.cc: New file.
* config/loongarch/loongarch-evolution.h: New file.
* config/loongarch/loongarch-opts.h (ISA_HAS_FRECIPE): Define.
(ISA_HAS_DIV32): Likewise.
(ISA_HAS_LAM_BH): Likewise.
(ISA_HAS_LAMCAS): Likewise.
(ISA_HAS_LD_SEQ_SA): Likewise.

7 weeks agoLoongArch: Define ISA versions
Yang Yujie [Tue, 23 Apr 2024 02:42:47 +0000 (10:42 +0800)]
LoongArch: Define ISA versions

These ISA versions are defined as -march= parameters and
are recommended for building binaries for distribution.

Detailed description of these definitions can be found at
https://github.com/loongson/la-toolchain-conventions, which
the LoongArch GCC port aims to conform to.

gcc/ChangeLog:

* config.gcc: Make la64v1.0 the default ISA preset of the lp64d ABI.
* config/loongarch/genopts/loongarch-strings: Define la64v1.0, la64v1.1.
* config/loongarch/genopts/loongarch.opt.in: Likewise.
* config/loongarch/loongarch-c.cc (LARCH_CPP_SET_PROCESSOR): Likewise.
(loongarch_cpu_cpp_builtins): Likewise.
* config/loongarch/loongarch-cpu.cc (get_native_prid): Likewise.
(fill_native_cpu_config): Likewise.
* config/loongarch/loongarch-def.cc (array_tune): Likewise.
* config/loongarch/loongarch-def.h: Likewise.
* config/loongarch/loongarch-driver.cc (driver_set_m_parm): Likewise.
(driver_get_normalized_m_opts): Likewise.
* config/loongarch/loongarch-opts.cc (default_tune_for_arch): Likewise.
(TUNE_FOR_ARCH): Likewise.
(arch_str): Likewise.
(loongarch_target_option_override): Likewise.
* config/loongarch/loongarch-opts.h (TARGET_uARCH_LA464): Likewise.
(TARGET_uARCH_LA664): Likewise.
* config/loongarch/loongarch-str.h (STR_CPU_ABI_DEFAULT): Likewise.
(STR_ARCH_ABI_DEFAULT): Likewise.
(STR_TUNE_GENERIC): Likewise.
(STR_ARCH_LA64V1_0): Likewise.
(STR_ARCH_LA64V1_1): Likewise.
* config/loongarch/loongarch.cc (loongarch_cpu_sched_reassociation_width): Likewise.
(loongarch_asm_code_end): Likewise.
* config/loongarch/loongarch.opt: Likewise.
* doc/invoke.texi: Likewise.

7 weeks agoDaily bump.
GCC Administrator [Tue, 23 Apr 2024 00:17:49 +0000 (00:17 +0000)]
Daily bump.

7 weeks agoRISC-V: Adjust overlap attr after revert d3544cea63d and e65aaf8efe1
Pan Li [Mon, 22 Apr 2024 13:20:02 +0000 (21:20 +0800)]
RISC-V: Adjust overlap attr after revert d3544cea63d and e65aaf8efe1

After we reverted below 2 commits, the reference to attr need some
adjustment as the group_overlap is no longer available.

* RISC-V: Robostify the W43, W86, W87 constraint enabled attribute
* RISC-V: Rename vconstraint into group_overlap

The below tests are passed for this patch.

* The rv64gcv fully regression tests.

gcc/ChangeLog:

* config/riscv/vector-crypto.md:

Signed-off-by: Pan Li <pan2.li@intel.com>
7 weeks agoPR modula2/114811 string set incl ICE bugfix
Gaius Mulley [Mon, 22 Apr 2024 19:34:11 +0000 (20:34 +0100)]
PR modula2/114811 string set incl ICE bugfix

This patch corrects gm2-torture.exp to recognize an ICE
in the fail case as a negative result.  The patch also fixes
FoldBinarySet so that the types are only checked once the operands
have been resolved.  Without this patch
gcc/testsuite/gm2/iso/fail/badexpression2.mod would cause an ICE.

gcc/m2/ChangeLog:

PR modula2/114811
* gm2-compiler/M2GenGCC.mod (FoldBinarySet): Add condition
checking to ensure op2 and op3 are fully resolved before
type checking is performed.

gcc/testsuite/ChangeLog:

PR modula2/114811
* lib/gm2-torture.exp: Correct regexp checking for internal
compiler error strings in compiler output.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
7 weeks agolibstdc++: Fix conversion of simd to vector builtin
Matthias Kretz [Mon, 22 Apr 2024 14:12:34 +0000 (16:12 +0200)]
libstdc++: Fix conversion of simd to vector builtin

Signed-off-by: Matthias Kretz <m.kretz@gsi.de>
libstdc++-v3/ChangeLog:

PR libstdc++/114803
* include/experimental/bits/simd_builtin.h
(_SimdBase2::operator __vector_type_t): There is no __builtin()
function in _SimdWrapper, instead use its conversion operator.
* testsuite/experimental/simd/pr114803_vecbuiltin_cvt.cc: New
test.

7 weeks agolibstdc++: Silence irrelevant warnings in <experimental/simd>
Matthias Kretz [Wed, 17 Apr 2024 08:35:47 +0000 (10:35 +0200)]
libstdc++: Silence irrelevant warnings in <experimental/simd>

Avoid
-Wnarrowing in C code;
-Wtautological-compare in unconditional static_assert (necessary for
faking a dependency on a template parameter)

Signed-off-by: Matthias Kretz <m.kretz@gsi.de>
libstdc++-v3/ChangeLog:

* include/experimental/bits/simd.h: Ignore -Wnarrowing for
arm_neon.h.
(__int_for_sizeof): Replace tautological compare with checking
for invalid template parameter value.
* include/experimental/bits/simd_builtin.h (__extract_part):
Remove tautological compare by combining two static_assert.

7 weeks agoPR modula2/114807 badpointer3.mod causes an ICE
Gaius Mulley [Mon, 22 Apr 2024 17:19:32 +0000 (18:19 +0100)]
PR modula2/114807 badpointer3.mod causes an ICE

This patch fixes an ICE caused when a constant string
is built and attempted to be passed into a procedure with
an opaque type.

gcc/m2/ChangeLog:

PR modula2/114807
* gm2-compiler/M2Check.mod (checkUnbounded): Remove unused
local variables.
(constCheckMeta): Include check for IsReallyPointer in the
failure case.
* gm2-compiler/M2Quads.mod (MoveWithMode): Remove CopyConstString.
* gm2-compiler/SymbolTable.def (IsHiddenReallyPointer): Export.
* gm2-compiler/SymbolTable.mod (SkipHiddenType): Remove.
(IsReallyPointer): Include IsHiddenReallyPointer test.

gcc/testsuite/ChangeLog:

PR modula2/114807
* gm2/pim/fail/badproctype.mod: Change MYSHORTREAL
to SHORTREAL.
* gm2/pim/fail/badprocbool.mod: New test.
* gm2/pim/fail/badproccard.mod: New test.
* gm2/pim/fail/badprocint.mod: New test.
* gm2/pim/fail/badprocint2.mod: New test.
* gm2/pim/pass/goodproccard2.mod: New test.
* gm2/pim/pass/goodprocint.mod: New test.
* gm2/pim/pass/goodprocint3.mod: New test.
* gm2/pim/run/pass/genconststr.mod: New test.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
7 weeks agolibstdc++: Workaround kernel-headers on s390x-linux
Jakub Jelinek [Mon, 22 Apr 2024 16:00:06 +0000 (18:00 +0200)]
libstdc++: Workaround kernel-headers on s390x-linux

We see
FAIL: 17_intro/headers/c++1998/all_attributes.cc   (test for excess errors)
FAIL: 17_intro/headers/c++2011/all_attributes.cc   (test for excess errors)
FAIL: 17_intro/headers/c++2014/all_attributes.cc   (test for excess errors)
FAIL: 17_intro/headers/c++2017/all_attributes.cc   (test for excess errors)
FAIL: 17_intro/headers/c++2020/all_attributes.cc   (test for excess errors)
FAIL: 17_intro/names.cc  -std=gnu++17 (test for excess errors)
on s390x-linux.
The first 5 are due to kernel-headers not using uglified attribute names,
where <asm/types.h> contains
__attribute__((packed, aligned(4)))
I've filed a downstream bugreport for this in
https://bugzilla.redhat.com/show_bug.cgi?id=2276084
(not really sure where to report kernel-headers issues upstream), while the
last one is due to <sys/ucontext.h> from glibc containing:
  #ifdef __USE_MISC
  # define __ctx(fld) fld
  #else
  # define __ctx(fld) __ ## fld
  #endif
  ...
  typedef union
    {
      double  __ctx(d);
      float   __ctx(f);
    } fpreg_t;
and g++ predefining -D_GNU_SOURCE which implies define __USE_MISC.

The following patch adds a workaround for this on the libstdc++ testsuite
side.

2024-04-22  Jakub Jelinek  <jakub@redhat.com>

* testsuite/17_intro/names.cc (d, f): Undefine on s390*-linux*.
* testsuite/17_intro/headers/c++1998/all_attributes.cc (packed): Don't
define on s390.
* testsuite/17_intro/headers/c++2011/all_attributes.cc (packed):
Likewise.
* testsuite/17_intro/headers/c++2014/all_attributes.cc (packed):
Likewise.
* testsuite/17_intro/headers/c++2017/all_attributes.cc (packed):
Likewise.
* testsuite/17_intro/headers/c++2020/all_attributes.cc (packed):
Likewise.

7 weeks agotestsuite: prune -freport-bug output
Marek Polacek [Fri, 19 Apr 2024 17:51:41 +0000 (13:51 -0400)]
testsuite: prune -freport-bug output

When the compiler defaults to -freport-bug, a few dg-ice tests fail
with:

Excess errors:
Preprocessed source stored into /tmp/cc6hldZ0.out file, please attach this to your bugreport.

We could add -fno-report-bug to those tests.  But it seems to me that a
better fix would be to prune the "Preprocessed source stored..." message
in prune_gcc_output.

gcc/testsuite/ChangeLog:

* lib/prune.exp (prune_gcc_output): Also prune -freport-bug output.

Reviewed-by: Jakub Jelinek <jakub@redhat.com>
7 weeks agoRevert "RISC-V: Rename vconstraint into group_overlap"
Pan Li [Mon, 22 Apr 2024 12:45:40 +0000 (20:45 +0800)]
Revert "RISC-V: Rename vconstraint into group_overlap"

This reverts commit e65aaf8efe1900f7bbf76235a078000bf2ec8b45.

7 weeks agoRevert "RISC-V: Robostify the W43, W86, W87 constraint enabled attribute"
Pan Li [Mon, 22 Apr 2024 12:44:38 +0000 (20:44 +0800)]
Revert "RISC-V: Robostify the W43, W86, W87 constraint enabled attribute"

This reverts commit d3544cea63d0a642b6357a7be55986f5562beaa0.

7 weeks agoi386: Fix Sierra Forest auto dispatch
Haochen Jiang [Mon, 22 Apr 2024 08:57:36 +0000 (16:57 +0800)]
i386: Fix Sierra Forest auto dispatch

gcc/ChangeLog:

* common/config/i386/i386-common.cc (processor_alias_table):
Let Sierra Forest map to CPU_TYPE enum.

7 weeks agos390x: Do not default to -mvx for -mesa
Andreas Krebbel [Mon, 22 Apr 2024 09:07:43 +0000 (11:07 +0200)]
s390x: Do not default to -mvx for -mesa

We currently enable the vector extensions also for -march=z13 -m31
-mesa which is very wrong.

gcc/ChangeLog:

* config/s390/s390.cc (s390_option_override_internal): Check zarch
flag before enabling -mvx.

7 weeks agoRISC-V: Add xfail test case for highpart overlap floating-point widen insn
Pan Li [Mon, 22 Apr 2024 08:07:36 +0000 (16:07 +0800)]
RISC-V: Add xfail test case for highpart overlap floating-point widen insn

We reverted below patch for register group overlap, add the related
insn test and mark it as xfail.  And we will remove the xfail
after we support the register overlap in GCC-15.

8614cbb2534 RISC-V: Support highpart overlap for floating-point widen instructions

The below test suites are passed.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr112431-10.c: New test.
* gcc.target/riscv/rvv/base/pr112431-11.c: New test.
* gcc.target/riscv/rvv/base/pr112431-12.c: New test.
* gcc.target/riscv/rvv/base/pr112431-13.c: New test.
* gcc.target/riscv/rvv/base/pr112431-14.c: New test.
* gcc.target/riscv/rvv/base/pr112431-15.c: New test.
* gcc.target/riscv/rvv/base/pr112431-7.c: New test.
* gcc.target/riscv/rvv/base/pr112431-8.c: New test.
* gcc.target/riscv/rvv/base/pr112431-9.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
7 weeks agoRevert "RISC-V: Support highpart overlap for floating-point widen instructions"
Pan Li [Mon, 22 Apr 2024 08:25:57 +0000 (16:25 +0800)]
Revert "RISC-V: Support highpart overlap for floating-point widen instructions"

This reverts commit 8614cbb253484e28c3eb20cde4d1067aad56de58.

7 weeks agoRISC-V: Add xfail test case for indexed load overlap with SRC EEW < DEST EEW
Pan Li [Mon, 22 Apr 2024 07:36:59 +0000 (15:36 +0800)]
RISC-V: Add xfail test case for indexed load overlap with SRC EEW < DEST EEW

Update in v2:
* Add change log to pr112431-34.c.

Original log:

We reverted below patch for register group overlap, add the related
insn test and mark it as xfail.  And we will remove the xfail
after we support the register overlap in GCC-15.

4418d55bcd1 RISC-V: Support highpart overlap for indexed load with SRC EEW < DEST EEW

The below test suites are passed.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr112431-34.c: Remove xfail for vluxei8 check.
* gcc.target/riscv/rvv/base/pr112431-28.c: New test.
* gcc.target/riscv/rvv/base/pr112431-29.c: New test.
* gcc.target/riscv/rvv/base/pr112431-30.c: New test.
* gcc.target/riscv/rvv/base/pr112431-31.c: New test.
* gcc.target/riscv/rvv/base/pr112431-32.c: New test.
* gcc.target/riscv/rvv/base/pr112431-33.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
7 weeks agoRevert "RISC-V: Support highpart overlap for indexed load with SRC EEW < DEST EEW"
Pan Li [Mon, 22 Apr 2024 07:39:45 +0000 (15:39 +0800)]
Revert "RISC-V: Support highpart overlap for indexed load with SRC EEW < DEST EEW"

This reverts commit 4418d55bcd1b7e0ef823981b6a781d7de5c38cce.

7 weeks agos390: testsuite: Remove xfail for vpopct{b,h}
Stefan Schulze Frielinghaus [Mon, 15 Apr 2024 13:28:43 +0000 (15:28 +0200)]
s390: testsuite: Remove xfail for vpopct{b,h}

Starting with r14-9316-g7890836de20912 patterns for vpopct{b,h} are also
detected.  Thus, remove xfails.

gcc/testsuite/ChangeLog:

* gcc.target/s390/vxe/popcount-1.c: Remove xfail.

7 weeks agoRISC-V: Add xfail test case for highest-number regno ternary overlap
Pan Li [Mon, 22 Apr 2024 06:32:25 +0000 (14:32 +0800)]
RISC-V: Add xfail test case for highest-number regno ternary overlap

We reverted below patch for register group overlap, add the related
insn test and mark it as xfail.  And we will remove the xfail
after we support the register overlap in GCC-15.

27fde325d64 RISC-V: Support highest-number regno overlap for widen ternary

The below test suites are passed.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr112431-37.c: New test.
* gcc.target/riscv/rvv/base/pr112431-38.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
7 weeks agoRevert "RISC-V: Support highest-number regno overlap for widen ternary"
Pan Li [Mon, 22 Apr 2024 06:10:02 +0000 (14:10 +0800)]
Revert "RISC-V: Support highest-number regno overlap for widen ternary"

This reverts commit 27fde325d64447a3a0d5d550c5976e5f3fb6dc16.

7 weeks agoRISC-V: Add xfail test case for widening register overlap of vf4/vf8
Pan Li [Mon, 22 Apr 2024 02:11:25 +0000 (10:11 +0800)]
RISC-V: Add xfail test case for widening register overlap of vf4/vf8

We reverted below patch for register group overlap, add the related
insn test and mark it as xfail.  And we will remove the xfail
after we support the register overlap in GCC-15.

303195e2a6b RISC-V: Support widening register overlap for vf4/vf8

The below test suites are passed.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr112431-16.c: New test.
* gcc.target/riscv/rvv/base/pr112431-17.c: New test.
* gcc.target/riscv/rvv/base/pr112431-18.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
7 weeks agoRevert "RISC-V: Support widening register overlap for vf4/vf8"
Pan Li [Mon, 22 Apr 2024 01:26:04 +0000 (09:26 +0800)]
Revert "RISC-V: Support widening register overlap for vf4/vf8"

This reverts commit 303195e2a6b6f0e8f42e0578b61f9f37c6250beb.

7 weeks agoRISC-V: Add xfail test case for highpart register overlap of vx/vf widen
Pan Li [Sun, 21 Apr 2024 04:34:19 +0000 (12:34 +0800)]
RISC-V: Add xfail test case for highpart register overlap of vx/vf widen

We reverted below patch for register group overlap, add the related
insn test and mark it as xfail.  And we will remove the xfail
after we support the register overlap in GCC-15.

a23415d7572 RISC-V: Support highpart register overlap for widen vx/vf instructions

The below test suites are passed.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr112431-22.c: New test.
* gcc.target/riscv/rvv/base/pr112431-23.c: New test.
* gcc.target/riscv/rvv/base/pr112431-24.c: New test.
* gcc.target/riscv/rvv/base/pr112431-25.c: New test.
* gcc.target/riscv/rvv/base/pr112431-26.c: New test.
* gcc.target/riscv/rvv/base/pr112431-27.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
7 weeks agoDaily bump.
GCC Administrator [Mon, 22 Apr 2024 00:17:21 +0000 (00:17 +0000)]
Daily bump.

8 weeks agoFortran: Detect 'no implicit type' error in right place [PR103471]
Paul Thomas [Sun, 21 Apr 2024 16:24:24 +0000 (17:24 +0100)]
Fortran: Detect 'no implicit type' error in right place [PR103471]

2024-04-21  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/103471
* resolve.cc (resolve_actual_arglist): Catch variables silently
set as untyped, resetting the flag so that gfc_resolve_expr can
generate the no implicit type error.
(gfc_resolve_index_1): Block index expressions of unknown type
from being converted to default integer, avoiding the fatal
error in trans-decl.cc.
* symbol.cc (gfc_set_default_type): Remove '(symbol)' from the
'no IMPLICIT type' error message.
* trans-decl.cc (gfc_get_symbol_decl): Change fatal error locus
to that of the symbol declaration.
(gfc_trans_deferred_vars): Remove two trailing tabs.

gcc/testsuite/
PR fortran/103471
* gfortran.dg/pr103471.f90: New test.

8 weeks agoAVR: target/114794 - Tweak __udivmodqi4
Georg-Johann Lay [Sun, 21 Apr 2024 12:33:50 +0000 (14:33 +0200)]
AVR: target/114794 - Tweak __udivmodqi4

libgcc/
PR target/114794
* config/avr/lib1funcs.S (__udivmodqi4): Tweak.

8 weeks agoRevert "RISC-V: Support highpart register overlap for widen vx/vf instructions"
Pan Li [Sun, 21 Apr 2024 01:37:00 +0000 (09:37 +0800)]
Revert "RISC-V: Support highpart register overlap for widen vx/vf instructions"

This reverts commit a23415d7572774701d7ec04664390260ab9a3f63.

8 weeks agoRISC-V: Add xfail test case for incorrect overlap on v0
Pan Li [Sat, 20 Apr 2024 14:43:13 +0000 (22:43 +0800)]
RISC-V: Add xfail test case for incorrect overlap on v0

We reverted below patch for register group overlap, add the related
insn test and mark it as xfail.  And we will remove the xfail
after we support the register overlap in GCC-15.

018ba3ac952 RISC-V: Fix overlap group incorrect overlap on v0

The below test suites are passed.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr112431-34.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
8 weeks agoDaily bump.
GCC Administrator [Sun, 21 Apr 2024 00:16:48 +0000 (00:16 +0000)]
Daily bump.

8 weeks agoRevert "RISC-V: Fix overlap group incorrect overlap on v0"
Pan Li [Sat, 20 Apr 2024 14:37:56 +0000 (22:37 +0800)]
Revert "RISC-V: Fix overlap group incorrect overlap on v0"

This reverts commit 018ba3ac952bed4ae01344c060360f13f7cc084a.

8 weeks agoPR modula2/112893 full type checking between proctype and procedure not implemented
Gaius Mulley [Sat, 20 Apr 2024 13:35:18 +0000 (14:35 +0100)]
PR modula2/112893 full type checking between proctype and procedure not implemented

This patch implements full type checking between proctype and procedures.
The change implements an associated proc type built for each
procedure.  M2Check.mod will request GetProcedureProcType if it encounters
a procedure.  Before this patch a procedure was associated with the type
ADDRESS in the type checking module M2Check.  The
gm2/pim/pass/proccard.mod have been corrected now this assumption has
been removed.

gcc/m2/ChangeLog:

PR modula2/112893
* gm2-compiler/M2Check.mod (GetProcedureProcType): Import.
(getType): Return value using GetProcedureProcType if sym is a
procedure.
* gm2-compiler/M2Range.mod (FoldTypeExpr): Remove quad if
expression is type compatible.
* gm2-compiler/SymbolTable.def (GetProcedureProcType): New
procedure function.
* gm2-compiler/SymbolTable.mod (Procedure): Add ProcedureType.
(MakeProcedure): Initialize ProcedureType.
(PutParam): Call AddProcedureProcTypeParam.
(PutVarParam): Call AddProcedureProcTypeParam.
(AddProcedureProcTypeParam): New procedure.
(GetProcedureProcType): New procedure function.

gcc/testsuite/ChangeLog:

PR modula2/112893
* gm2/pim/pass/another.mod: Correct bug exposed by type checker.
Swap ProcA and ProcB assignments.
* gm2/pim/pass/proccard.mod: Use VAL to convert procedure into a
cardinal.
* gm2/iso/const/fail/castproctype.mod: New test.
* gm2/pim/fail/badproctype.mod: New test.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
8 weeks agoRISC-V: Add xfail test case for wv insn highest overlap
Pan Li [Sat, 20 Apr 2024 05:05:52 +0000 (13:05 +0800)]
RISC-V: Add xfail test case for wv insn highest overlap

We reverted below patch for wv insn overlap, add the related wv
insn test and mark it as xfail.  And we will remove the xfail
after we support the register overlap in GCC-15.

7e854b58084 RISC-V: Support highest overlap for wv instructions

The below test suites are passed.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-11.c: Xfail csr check.
* gcc.target/riscv/rvv/base/pr112431-39.c: New test.
* gcc.target/riscv/rvv/base/pr112431-40.c: New test.
* gcc.target/riscv/rvv/base/pr112431-41.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
8 weeks agoRevert "RISC-V: Support highest overlap for wv instructions"
Pan Li [Sat, 20 Apr 2024 01:42:57 +0000 (09:42 +0800)]
Revert "RISC-V: Support highest overlap for wv instructions"

This reverts commit 7e854b58084c131fceca9e8fa9dcc7469972e69d.

8 weeks agoRISC-V: Add xfail test case for wv insn register overlap
Pan Li [Sat, 20 Apr 2024 01:02:39 +0000 (09:02 +0800)]
RISC-V: Add xfail test case for wv insn register overlap

We reverted below patch for wv insn overlap, add the related wv
insn test and mark it as xfail.  And we will remove the xfail
after we support the register overlap in GCC-15.

b3b2799b872 RISC-V: Support one more overlap for wv instructions

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr112431-42.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
8 weeks agoRevert "RISC-V: Support one more overlap for wv instructions"
Pan Li [Sat, 20 Apr 2024 00:29:38 +0000 (08:29 +0800)]
Revert "RISC-V: Support one more overlap for wv instructions"

This reverts commit b3b2799b872bc4c1944629af9dfc8472c8ca5fe6.

8 weeks agoDaily bump.
GCC Administrator [Sat, 20 Apr 2024 00:16:57 +0000 (00:16 +0000)]
Daily bump.

8 weeks agoi386: Fix up *avx2_eq<mode>3 constraints [PR114783]
Jakub Jelinek [Fri, 19 Apr 2024 22:13:49 +0000 (00:13 +0200)]
i386: Fix up *avx2_eq<mode>3 constraints [PR114783]

The r14-4456 change (part of APX EGPR support) seems to have mistakenly
changed in the
@@ -16831,7 +16831,7 @@ (define_insn "*avx2_eq<mode>3"
   [(set (match_operand:VI_256 0 "register_operand" "=x")
        (eq:VI_256
          (match_operand:VI_256 1 "nonimmediate_operand" "%x")
-         (match_operand:VI_256 2 "nonimmediate_operand" "xm")))]
+         (match_operand:VI_256 2 "nonimmediate_operand" "jm")))]
   "TARGET_AVX2 && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
   "vpcmpeq<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "ssecmp")
hunk the xm constraint to jm, while in many other spots it changed correctly
xm to xjm.  The instruction doesn't require the last operand to be in
memory, it can handle 3 256-bit registers just fine, just it is a VEX only
encoded instruction and so can't allow APX EGPR regs in the memory operand.

The following patch fixes it, so that we don't force one of the == operands
into memory all the time.

2024-04-20  Jakub Jelinek  <jakub@redhat.com>

PR target/114783
* config/i386/sse.md (*avx2_eq<mode>3): Change last operand's
constraint from "jm" to "xjm".

* gcc.target/i386/avx2-pr114783.c: New test.

8 weeks agoc-family: Allow arguments with NULLPTR_TYPE as sentinels [PR114780]
Jakub Jelinek [Fri, 19 Apr 2024 22:12:36 +0000 (00:12 +0200)]
c-family: Allow arguments with NULLPTR_TYPE as sentinels [PR114780]

While in C++ the ellipsis argument conversions include
"An argument that has type cv std::nullptr_t is converted to type void*"
in C23 a nullptr_t argument is not promoted in any way, but va_arg
description says:
"the type of the next argument is nullptr_t and type is a pointer type that has the same
representation and alignment requirements as a pointer to a character type."
So, while in C++ check_function_sentinel will never see NULLPTR_TYPE, for
C23 it can see that and currently we incorrectly warn about those.

The only question is whether we should warn on any argument with
nullptr_t type or just about nullptr (nullptr_t argument with integer_zerop
value).  Through undefined behavior guess one could pass non-NULL pointer
that way, say by union { void *p; nullptr_t q; } u; u.p = &whatever;
and pass u.q to ..., but valid code should always pass something that will
read as (char *) 0 when read using va_arg (ap, char *), so I think it is
better not to warn rather than warn in those cases.

Note, clang seems to pass (void *)0 rather than expression of nullptr_t
type to ellipsis in C23 mode as if it did the C++ ellipsis argument
conversions, in that case guess not warning about that would be even safer,
but what GCC does I think follows the spec more closely, even when in a
valid program one shouldn't be able to observe the difference.

2024-04-20  Jakub Jelinek  <jakub@redhat.com>

PR c/114780
* c-common.cc (check_function_sentinel): Allow as sentinel any
argument of NULLPTR_TYPE.

* gcc.dg/format/sentinel-2.c: New test.

8 weeks agoc: Fix ICE with -g and -std=c23 related to incomplete types [PR114361]
Jakub Jelinek [Fri, 19 Apr 2024 22:05:21 +0000 (00:05 +0200)]
c: Fix ICE with -g and -std=c23 related to incomplete types [PR114361]

We did not update TYPE_CANONICAL for incomplete variants when
completing a structure.  We now set for flag_isoc23 TYPE_STRUCTURAL_EQUALITY_P
for incomplete structure and union types and then update TYPE_CANONICAL
later, though update it only for the variants and derived pointer types
which can be easily discovered.  Other derived types created while
the type was still incomplete will remain TYPE_STRUCTURAL_EQUALITY_P.
See PR114574 for discussion.

2024-04-20  Martin Uecker  <uecker@tugraz.at>
    Jakub Jelinek  <jakub@redhat.com>

PR lto/114574
PR c/114361
gcc/c/
* c-decl.cc (shadow_tag_warned): For flag_isoc23 and code not
ENUMERAL_TYPE use SET_TYPE_STRUCTURAL_EQUALITY.
(parser_xref_tag): Likewise.
(start_struct): For flag_isoc23 use SET_TYPE_STRUCTURAL_EQUALITY.
(c_update_type_canonical): New function.
(finish_struct): Put NULL as second == operand rather than first.
Assert TYPE_STRUCTURAL_EQUALITY_P.  Call c_update_type_canonical.
* c-typeck.cc (composite_type_internal): Use
SET_TYPE_STRUCTURAL_EQUALITY.  Formatting fix.
gcc/testsuite/
* gcc.dg/pr114574-1.c: New test.
* gcc.dg/pr114574-2.c: New test.
* gcc.dg/pr114361.c: New test.
* gcc.dg/c23-tag-incomplete-1.c: New test.
* gcc.dg/c23-tag-incomplete-2.c: New test.

8 weeks agolibstdc++: Simplify constraints on <=> for std::reference_wrapper
Jonathan Wakely [Fri, 19 Apr 2024 16:42:04 +0000 (17:42 +0100)]
libstdc++: Simplify constraints on <=> for std::reference_wrapper

Instead of constraining these overloads in terms of synth-three-way we
can just check that the value_type is less-than-comparable, which is
what synth-three-way's constraints check.

The reason that I implemented these with constraints has now been filed
as LWG 4071, so add a comment about that too.

libstdc++-v3/ChangeLog:

* include/bits/refwrap.h (operator<=>): Simplify constraints.

8 weeks agolibstdc++: Support link chains in std::chrono::tzdb::locate_zone [PR114770]
Jonathan Wakely [Thu, 18 Apr 2024 11:14:41 +0000 (12:14 +0100)]
libstdc++: Support link chains in std::chrono::tzdb::locate_zone [PR114770]

Since 2022 the TZif format defined in the zic(8) man page has said that
links can refer to other links, rather than only referring to a zone.
This isn't supported by the C++20 spec, which assumes that the target()
for a chrono::time_zone_link always names a chrono::time_zone, not
another chrono::time_zone_link.

This hasn't been a problem until now, because there are no entries in
the tzdata file that chain links together. However, Debian Sid has
changed the target of the Asia/Chungking link from the Asia/Shanghai
zone to the Asia/Chongqing link, creating a link chain. The libstdc++
code is unable to handle this, so chrono::locate_zone("Asia/Chungking")
will fail with the tzdata.zi file from Debian Sid.

It seems likely that the C++ spec will need a change to allow link
chains, so that the original structure of the IANA database can be fully
represented by chrono::tzdb. The alternative would be for chrono::tzdb
to flatten all chains when loading the data, so that a link's target is
always a zone, but this means throwing away information present in the
tzdata.zi input file.

In anticipation of a change to the spec, this commit adds support for
chained links to libstdc++. When a name is found to be a link, we try to
find its target in the list of zones as before, but now if the target
isn't the name of a zone we don't fail. Instead we look for another link
with that name, and keep doing that until we reach the end of the chain
of links, and then look up the last target as a zone.

This new logic would get stuck in a loop if the tzdata.zi file is buggy
and defines a link chain that contains a cycle, e.g. two links that
refer to each other. To deal with that unlikely case, we use the
tortoise and hare algorithm to detect cycles in link chains, and throw
an exception if we detect a cycle. Cycles in links should never happen,
and it is expected that link chains will be short (if they occur at all)
and so the code is optimized for short chains without cycles. Longer
chains (four or more links) and cycles will do more work, but won't fail
to resolve a chain or get stuck in a loop.

The new test file checks various forms of broken links and cycles.

Also add a new check in the testsuite that every element in the
get_tzdb().zones and get_tzdb().links sequences can be successfully
found using locate_zone.

libstdc++-v3/ChangeLog:

PR libstdc++/114770
* src/c++20/tzdb.cc (do_locate_zone): Support links that have
another link as their target.
* testsuite/std/time/tzdb/1.cc: Check that all zones and links
can be found by locate_zone.
* testsuite/std/time/tzdb/links.cc: New test.

8 weeks agoUpdate gcc sv.po
Joseph Myers [Fri, 19 Apr 2024 20:02:56 +0000 (20:02 +0000)]
Update gcc sv.po

* sv.po: Update.

8 weeks agointernal-fn: Fix up expand_arith_overflow [PR114753]
Jakub Jelinek [Fri, 19 Apr 2024 16:15:39 +0000 (18:15 +0200)]
internal-fn: Fix up expand_arith_overflow [PR114753]

During backporting I've noticed I've missed one return spot for the
restoration of the original flag_trapv flag value.

2024-04-19  Jakub Jelinek  <jakub@redhat.com>

PR middle-end/114753
* internal-fn.cc (expand_arith_overflow): Add one missing restore
of flag_trapv before return.

8 weeks agomiddle-end: refactory vect_recog_absolute_difference to simplify flow [PR114769]
Tamar Christina [Fri, 19 Apr 2024 14:22:13 +0000 (15:22 +0100)]
middle-end: refactory vect_recog_absolute_difference to simplify flow [PR114769]

Hi All,

As the reporter in PR114769 points out the control flow for the abd detection
is hard to follow.  This is because vect_recog_absolute_difference has two
different ways it can return true.

1. It can return true when the widening operation is matched, in which case
   unprom is set, half_type is not NULL and diff_stmt is not set.

2. It can return true when the widening operation is not matched, but the stmt
   being checked is a minus.  In this case unprom is not set, half_type is set
   to NULL and diff_stmt is set.  This because to get to diff_stmt you have to
   dig through the abs statement and any possible promotions.

This however leads to complicated uses of the function at the call sites as the
exact semantic needs to be known to use it safely.

vect_recog_absolute_difference has two callers:

1. vect_recog_sad_pattern where if you return true with unprom not set, then
   *half_type will be NULL.  The call to vect_supportable_direct_optab_p will
   always reject it since there's no vector mode for NULL.  Note that if looking
   at the dump files, the convention in the dump files have always been that we
   first indicate that a pattern could possibly be recognize and then check that
   it's supported.

   This change somewhat incorrectly makes the diagnostic message get printed for
   "invalid" patterns.

2. vect_recog_abd_pattern, where if half_type is NULL, it then uses diff_stmt to
   set them.

This refactors the code, it now only has 1 success condition, and diff_stmt is
always set to the minus statement in the abs if there is one.

The function now only returns success if the widening minus is found, in which
case unprom and half_type set.

This then leaves it up to the caller to decide if they want to do anything with
diff_stmt.

Thanks,
Tamar

gcc/ChangeLog:

PR tree-optimization/114769
* tree-vect-patterns.cc:
(vect_recog_absolute_difference): Have only one success condition.
(vect_recog_abd_pattern): Handle further checks if
vect_recog_absolute_difference fails.

8 weeks agoEnable 'gcc.dg/pr114768.c' for nvptx target [PR114768]
Thomas Schwinge [Fri, 19 Apr 2024 10:32:03 +0000 (12:32 +0200)]
Enable 'gcc.dg/pr114768.c' for nvptx target [PR114768]

Follow-up to commit 9f295847a9c32081bdd0fe908ffba58e830a24fb
"rtlanal: Fix set_noop_p for volatile loads or stores [PR114768]": nvptx does
behave in the exactly same way as expected; see 'diff' of before vs. after the
'gcc/rtlanal.cc' code changes:

    PASS: gcc.dg/pr114768.c (test for excess errors)
    [-FAIL:-]{+PASS:+} gcc.dg/pr114768.c scan-rtl-dump final "\\(mem/v:"

    --- 0/pr114768.c.347r.final 2024-04-19 11:34:34.577037596 +0200
    +++ ./pr114768.c.347r.final 2024-04-19 12:08:00.118312524 +0200
    @@ -13,15 +13,27 @@
     ;;  entry block defs   1 [%stack] 2 [%frame] 3 [%args]
     ;;  exit block uses   1 [%stack] 2 [%frame]
     ;;  regs ever live
    -;;  ref usage  r1={1d,2u} r2={1d,2u} r3={1d,1u}
    -;;    total ref usage 8{3d,5u,0e} in 1{1 regular + 0 call} insns.
    +;;  ref usage  r1={1d,3u} r2={1d,3u} r3={1d,2u} r22={1d,1u} r23={1d,2u}
    +;;    total ref usage 16{5d,11u,0e} in 4{4 regular + 0 call} insns.
     (note 1 0 4 NOTE_INSN_DELETED)
     (note 4 1 2 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
    -(note 2 4 3 2 NOTE_INSN_DELETED)
    +(insn 2 4 3 2 (set (reg/v/f:DI 23 [ p ])
    +        (unspec:DI [
    +                (const_int 0 [0])
    +            ] UNSPEC_ARG_REG)) "source-gcc/gcc/testsuite/gcc.dg/pr114768.c":8:1 14 {load_arg_regdi}
    +     (nil))
     (note 3 2 6 2 NOTE_INSN_FUNCTION_BEG)
    -(note 6 3 10 2 NOTE_INSN_DELETED)
    -(note 10 6 11 2 NOTE_INSN_EPILOGUE_BEG)
    -(jump_insn 11 10 12 2 (return) "source-gcc/gcc/testsuite/gcc.dg/pr114768.c":10:1 289 {return}
    +(insn 6 3 7 2 (set (reg:SI 22 [ _1 ])
    +        (mem/v:SI (reg/v/f:DI 23 [ p ]) [1 MEM[(volatile int *)p_3(D)]+0 S4 A32])) "source-gcc/gcc/testsuite/gcc.dg/pr114768.c":9:8 6 {*movsi_insn}
    +     (nil))
    +(insn 7 6 10 2 (set (mem:SI (reg/v/f:DI 23 [ p ]) [1 *p_3(D)+0 S4 A32])
    +        (reg:SI 22 [ _1 ])) "source-gcc/gcc/testsuite/gcc.dg/pr114768.c":9:6 6 {*movsi_insn}
    +     (expr_list:REG_DEAD (reg/v/f:DI 23 [ p ])
    +        (expr_list:REG_DEAD (reg:SI 22 [ _1 ])
    +            (nil))))
    +(note 10 7 13 2 NOTE_INSN_EPILOGUE_BEG)
    +(note 13 10 11 3 [bb 3] NOTE_INSN_BASIC_BLOCK)
    +(jump_insn 11 13 12 3 (return) "source-gcc/gcc/testsuite/gcc.dg/pr114768.c":10:1 289 {return}
  (nil)
      -> return)
     (barrier 12 11 0)

    --- 0/pr114768.s 2024-04-19 11:34:34.577037596 +0200
    +++ ./pr114768.s 2024-04-19 12:08:00.118312524 +0200
    @@ -13,5 +13,10 @@
     {
.reg.u64 %ar0;
ld.param.u64 %ar0, [%in_ar0];
    + .reg.u32 %r22;
    + .reg.u64 %r23;
    + mov.u64 %r23, %ar0;
    + ld.u32 %r22, [%r23];
    + st.u32 [%r23], %r22;
ret;
     }

PR testsuite/114768
gcc/testsuite/
* gcc.dg/pr114768.c: Enable for nvptx target.

8 weeks agobpf: remove huge memory waste with string allocation.
Cupertino Miranda [Tue, 2 Apr 2024 11:04:28 +0000 (12:04 +0100)]
bpf: remove huge memory waste with string allocation.

The BPF backend was allocating an unnecessarily large string when
constructing CO-RE relocations for enum types.
This patch also verifies that those enumerators are valid for CO-RE,
returning an error otherwise.

gcc/ChangeLog:
* config/bpf/core-builtins.cc (get_index_for_enum_value): Create
function.
(pack_enum_value): Check for enumerator and error out.
(process_enum_value): Correct string allocation.

8 weeks agobpf: support more instructions to match CO-RE relocations
Cupertino Miranda [Wed, 20 Mar 2024 19:06:47 +0000 (19:06 +0000)]
bpf: support more instructions to match CO-RE relocations

BPF supports multiple instructions to be CO-RE relocatable regardless of
the position of the immediate field in the encoding.
In particular, not only the MOV instruction allows a CO-RE
relocation of its immediate operand, but the LD and ST instructions can
have a CO-RE relocation happening to their offset immediate operand,
even though those operands are encoded in different encoding bits.
This patch moves matching from a more traditional matching of the
UNSPEC_CORE_RELOC pattern within a define_insn to a match within the
constraints of both immediates and address operands from more generic
mov define_insn rule.

gcc/Changelog:
* config/bpf/bpf-protos.h (bpf_add_core_reloc): Renamed function
to bpf_output_move.
* config/bpf/bpf.cc (bpf_legitimate_address_p): Allow
UNSPEC_CORE_RELOC to match an address.
(bpf_insn_cost): Make UNSPEC_CORE_RELOC immediate moves
expensive to prioritize loads and stores.
(TARGET_INSN_COST): Add hook.
(bpf_output_move): Wrapper to call bpf_output_core_reloc.
(bpf_print_operand): Add support to print immediate operands
specified with the UNSPEC_CORE_RELOC.
(bpf_print_operand_address): Likewise, but to support
UNSPEC_CORE_RELOC in addresses.
(bpf_init_builtins): Flag BPF_BUILTIN_CORE_RELOC as NOTHROW.
* config/bpf/bpf.md: Wrap patterns for MOV, LD and ST
instruction with bpf_output_move call.
(mov_reloc_core<MM:mode>): Remove now spurious define_insn.
* config/bpf/constraints.md: Added "c" and "C" constraints to
match immediates represented with UNSPEC_CORE_RELOC.
* config/bpf/core-builtins.cc (bpf_add_core_reloc): Remove
(bpf_output_core_reloc): Add function to create the CO-RE
relocations based on new matching rules.
* config/bpf/core-builtins.h (bpf_output_core_reloc): Add
prototype.
* config/bpf/predicates.md (core_imm_operand) Add predicate.
(mov_src_operand): Add match for core_imm_operand.

gcc/testsuite/ChangeLog:
* gcc.target/bpf/btfext-funcinfo.c: Updated to changes.
* gcc.target/bpf/core-builtin-fieldinfo-const-elimination.c:
Likewise.
* gcc.target/bpf/core-builtin-fieldinfo-existence-1.c: Likewise.
* gcc.target/bpf/core-builtin-fieldinfo-lshift-1-be.c: Likewise.
* gcc.target/bpf/core-builtin-fieldinfo-lshift-1-le.c: Likewise.
* gcc.target/bpf/core-builtin-fieldinfo-lshift-2.c: Likewise.
* gcc.target/bpf/core-builtin-fieldinfo-offset-1.c: Likewise.
* gcc.target/bpf/core-builtin-fieldinfo-rshift-1.c: Likewise.
* gcc.target/bpf/core-builtin-fieldinfo-rshift-2.c: Likewise.
* gcc.target/bpf/core-builtin-fieldinfo-sign-1.c: Likewise.
* gcc.target/bpf/core-builtin-fieldinfo-sign-2.c: Likewise.
* gcc.target/bpf/core-builtin-fieldinfo-size-1.c: Likewise.

8 weeks agod: Fix ICE in build_deref, at d/d-codegen.cc:1650 [PR111650]
Iain Buclaw [Fri, 19 Apr 2024 08:51:12 +0000 (10:51 +0200)]
d: Fix ICE in build_deref, at d/d-codegen.cc:1650 [PR111650]

PR d/111650

gcc/d/ChangeLog:

* decl.cc (get_fndecl_arguments): Move generation of frame type to ...
(DeclVisitor::visit (FuncDeclaration *)): ... here, after the call to
build_closure.

gcc/testsuite/ChangeLog:

* gdc.dg/pr111650.d: New test.

8 weeks agortlanal: Fix set_noop_p for volatile loads or stores [PR114768]
Jakub Jelinek [Fri, 19 Apr 2024 06:47:53 +0000 (08:47 +0200)]
rtlanal: Fix set_noop_p for volatile loads or stores [PR114768]

On the following testcase, combine propagates the mem/v load into mem store
with the same address and then removes it, because noop_move_p says it is a
no-op move.  If it was the other way around, i.e. mem/v store and mem load,
or both would be mem/v, it would be kept.
The problem is that rtx_equal_p never checks any kind of flags on the rtxes
(and I think it would be quite dangerous to change it at this point), and
set_noop_p checks side_effects_p on just one of the operands, not both.
In the MEM <- MEM set, it only checks it on the destination, in
store to ZERO_EXTRACT only checks it on the source.

The following patch adds the missing side_effects_p checks.

2024-04-19  Jakub Jelinek  <jakub@redhat.com>

PR rtl-optimization/114768
* rtlanal.cc (set_noop_p): Don't return true for MEM <- MEM
sets if src has side-effects or for stores into ZERO_EXTRACT
if ZERO_EXTRACT operand has side-effects.

* gcc.dg/pr114768.c: New test.

8 weeks agolibgcc: Another __divmodbitint4 bug fix [PR114762]
Jakub Jelinek [Fri, 19 Apr 2024 06:44:54 +0000 (08:44 +0200)]
libgcc: Another __divmodbitint4 bug fix [PR114762]

The following testcase is miscompiled because the code to decrement
vn on negative value with all ones in most significant limb (even partial)
and 0 in most significant bit of the second most significant limb doesn't
take into account the case where all bits below the most significant limb
are zero.  This has been a problem both in the version before yesterday's
commit where it has been done only if un was one shorter than vn before this
decrement, and is now problem even more often when it is done earlier.
When we decrement vn in such case and negate it, we end up with all 0s in
the v2 value, so have both the problems with UB on __builtin_clz* and the
expectations of the algorithm that the divisor has most significant bit set
after shifting, plus when the decremented vn is 1 it can SIGFPE on division
by zero even when it is not division by zero etc.  Other values shouldn't
get 0 in the new most significant limb after negation, because the
bitint_reduce_prec canonicalization should reduce prec if the second most
significant limb is all ones and if that limb is all zeros, if at least
one limb below it is non-zero, carry in will make it non-zero.

The following patch fixes it by checking if at least one bit below the
most significant limb is non-zero, in that case it decrements, otherwise
it will do nothing (but e.g. for the un < vn case that also means the
divisor is large enough that the result should be q 0 r u).

2024-04-18  Jakub Jelinek  <jakub@redhat.com>

PR libgcc/114762
* libgcc2.c (__divmodbitint4): Perform the decrement on negative
v with most significant limb all ones and the second least
significant limb with most significant bit clear always, regardless of
un < vn.

* gcc.dg/torture/bitint-70.c: New test.

8 weeks ago[vxworks] avoid mangling __STDC_VERSION_LIMITS_H__
Alexandre Oliva [Fri, 19 Apr 2024 05:52:21 +0000 (02:52 -0300)]
[vxworks] avoid mangling __STDC_VERSION_LIMITS_H__

The mangling of the macro name that guards limits.h from reinclusion
was mangling a c23-required macro as well.  Make the edit pattern
stricter.

for  gcc/ChangeLog

* config/t-vxworks (vxw-glimits.h): Don't mangle c23-required
__STDC_VERSION_LIMITS_H__ define.

8 weeks agoDaily bump.
GCC Administrator [Fri, 19 Apr 2024 00:17:11 +0000 (00:17 +0000)]
Daily bump.

8 weeks agoAdd nios2*-*-* to the list of obsolete targets
Sandra Loosemore [Mon, 8 Apr 2024 14:36:08 +0000 (14:36 +0000)]
Add nios2*-*-* to the list of obsolete targets

This patch marks the nios2*-*-* targets obsolete in GCC 14.  Intel has
EOL'ed this architecture and the maintainers no longer have access to
hardware for testing.  While the port is still in reasonably good
shape at this time, no further testing or updates are planned.

gcc/
* config.gcc: Add nios2*-*-* to the list of obsoleted targets.

contrib/
* config-list.mk (LIST): --enable-obsolete for nios2*-*-*.

8 weeks agoFortran: Fix ICE and clear incorrect error messages [PR114739]
Paul Thomas [Thu, 18 Apr 2024 17:07:25 +0000 (18:07 +0100)]
Fortran: Fix ICE and clear incorrect error messages [PR114739]

2024-04-18  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/114739
* primary.cc (gfc_match_varspec): Check for default type before
checking for derived types with the right component name.

gcc/testsuite/
PR fortran/114739
* gfortran.dg/pr114739.f90: New test.
* gfortran.dg/derived_comp_array_ref_8.f90: Add 'implicit none'
for consistency with expected error message.
* gfortran.dg/nullify_4.f90: ditto
* gfortran.dg/pointer_init_6.f90: ditto
* gfortran.dg/pr107397.f90: ditto
* gfortran.dg/pr88138.f90: ditto

8 weeks ago[testsuite] [i386] add -msse2 to tests that require it
Alexandre Oliva [Thu, 18 Apr 2024 11:01:43 +0000 (08:01 -0300)]
[testsuite] [i386] add -msse2 to tests that require it

Without -msse2, an i586-targeting toolchain fails bf16_short_warn.c
because neither type __m128bh nor intrinsic _mm_cvtneps_pbh get
declared.

for  gcc/testsuite/ChangeLog

* gcc.target/i386/bf16_short_warn.c: Add -msse2.

8 weeks ago[testsuite] [i386] work around fails with --enable-frame-pointer
Alexandre Oliva [Thu, 18 Apr 2024 11:01:40 +0000 (08:01 -0300)]
[testsuite] [i386] work around fails with --enable-frame-pointer

A few x86 tests get unexpected insn counts if the toolchain is
configured with --enable-frame-pointer.  Add explicit
-fomit-frame-pointer so that the expected insn sequences are output.

for  gcc/testsuite/ChangeLog

* gcc.target/i386/pr107261.c: Add -fomit-frame-pointer.
* gcc.target/i386/pr69482-1.c: Likewise.
* gcc.target/i386/pr69482-2.c: Likewise.

8 weeks ago[testsuite] [arm] accept empty init for bfloat16
Alexandre Oliva [Thu, 18 Apr 2024 11:01:37 +0000 (08:01 -0300)]
[testsuite] [arm] accept empty init for bfloat16

Complete r13-2205, adjusting an arm-specific test that expects a
no-longer-issued error at an empty initializer.

for  gcc/testsuite/ChangeLog

* gcc.target/arm/bfloat16_scalar_typecheck.c: Accept C23
empty initializers.

8 weeks ago[c++] [testsuite] adjust contracts9.C for negative addresses
Alexandre Oliva [Thu, 18 Apr 2024 11:01:35 +0000 (08:01 -0300)]
[c++] [testsuite] adjust contracts9.C for negative addresses

The test expected the address of a literal string, converted to long
long, to yield a positive value.  That expectation doesn't necessarily
hold, and the test fails where it doesn't.

Adjust the test to use a pointer that will compare as expected.

for  gcc/testsuite/ChangeLog

* g++.dg/contracts/contracts9.C: Don't assume string literals
have non-negative addresses.

8 weeks ago[testsuite] [aarch64] Require fpic effective target.
Alexandre Oliva [Thu, 18 Apr 2024 11:01:32 +0000 (08:01 -0300)]
[testsuite] [aarch64] Require fpic effective target.

Co-authored-by: Olivier Hainque <hainque@adacore.com>
for  gcc/testsuite/ChangeLog

* gcc.target/aarch64/pr94201.c: Add missing
dg-require-effective-target fpic.
* gcc.target/aarch64/pr103085.c: Likewise.

8 weeks ago[testsuite] [i386] require fpic for pr111497.C
Alexandre Oliva [Thu, 18 Apr 2024 11:01:29 +0000 (08:01 -0300)]
[testsuite] [i386] require fpic for pr111497.C

Fix another test that uses -fPIC without requiring fpic support.

for  gcc/testsuite/ChangeLog

* g++.target/i386/pr111497.C: Require fpic support.

8 weeks ago[testsuite] xfail pr103798-2 in C++ on vxworks too [PR113706]
Alexandre Oliva [Thu, 18 Apr 2024 11:01:26 +0000 (08:01 -0300)]
[testsuite] xfail pr103798-2 in C++ on vxworks too [PR113706]

pr103798-2.c fails in C++ on targets that provide a ISO C++-compliant
declaration of memchr, because it mismatches the C-compatible builtin,
as per PR113706.  Expect the C++ test to fail on vxworks as well.

for  gcc/testsuite/ChangeLog

PR testsuite/113706
* c-c++-common/pr103798-2.c: XFAIL in C++ on vxworks too.

8 weeks ago[testsuite] [analyzer] include sys/select.h if available
Alexandre Oliva [Thu, 18 Apr 2024 11:01:21 +0000 (08:01 -0300)]
[testsuite] [analyzer] include sys/select.h if available

Test that calls select fails on vxworks because select is only
declared in sys/select.h.  Include that header if it's present.

for  gcc/testsuite/ChangeLog

* gcc.dg/analyzer/fd-glibc-byte-stream-connection-server.c:
Include sys/select.h if present.

8 weeks ago[testsuite] [analyzer] require fork where used
Alexandre Oliva [Thu, 18 Apr 2024 11:01:15 +0000 (08:01 -0300)]
[testsuite] [analyzer] require fork where used

Mark tests that fail due to the lack of fork, as in vxworks kernel
mode, as requiring fork.

for  gcc/testsuite/ChangeLog

* gcc.dg/analyzer/pipe-glibc.c: Require fork.
* gcc.dg/analyzer/pipe-manpages.c: Likewise.

8 weeks ago[testsuite] [analyzer] skip access-mode: O_ACCMODE on vxworks
Alexandre Oliva [Thu, 18 Apr 2024 11:01:11 +0000 (08:01 -0300)]
[testsuite] [analyzer] skip access-mode: O_ACCMODE on vxworks

O_ACCMODE is not defined on vxworks, and the test is meaningless and
failing without it, so skip it.

for  gcc/testsuite/ChangeLog

* gcc.dg/analyzer/fd-access-mode-target-headers.c: Skip on
vxworks as well.

8 weeks ago[testsuite] [analyzer] avoid vxworks libc mode_t
Alexandre Oliva [Thu, 18 Apr 2024 11:01:07 +0000 (08:01 -0300)]
[testsuite] [analyzer] avoid vxworks libc mode_t

Define macro that prevents mode_t from being defined by vxworks'
headers as well.

for  gcc/testsuite/ChangeLog

* gcc.dg/analyzer/fd-4.c: Define macro to avoid mode_t on
vxworks.

8 weeks ago[testsuite] introduce strndup effective target
Alexandre Oliva [Thu, 18 Apr 2024 11:01:04 +0000 (08:01 -0300)]
[testsuite] introduce strndup effective target

A number of tests that call strndup fail on vxworks, where there's no
strndup.  Some of them already had workarounds to skip the strndup
parts of the tests on platforms that don't offer it.  I've changed
them to rely on a strndup effective target instead, and extended the
logic to other tests that were otherwise skipped entirely.

for  gcc/ChangeLog

* doc/sourcebuild.texi (strndup): Add effective target.

for  gcc/testsuite/ChangeLog

* lib/target-supports.exp (check_effective_target_strndup): New.
* gcc.dg/builtin-dynamic-object-size-0.c: Skip strndup tests
when the function is not available.
* gcc.dg/builtin-dynamic-object-size-1.c: Likewise.
* gcc.dg/builtin-dynamic-object-size-2.c: Likewise.
* gcc.dg/builtin-dynamic-object-size-3.c: Likewise.
* gcc.dg/builtin-dynamic-object-size-4.c: Likewise.
* gcc.dg/builtin-object-size-1.c: Likewise.
* gcc.dg/builtin-object-size-2.c: Likewise.
* gcc.dg/builtin-object-size-3.c: Likewise.
* gcc.dg/builtin-object-size-4.c: Likewise.

8 weeks ago[libstdc++] [testsuite] disable SRA for compare_exchange_padding
Alexandre Oliva [Thu, 18 Apr 2024 11:00:59 +0000 (08:00 -0300)]
[libstdc++] [testsuite] disable SRA for compare_exchange_padding

On arm-vx7r2, the uses of as.load() as initializer get SRAed, so the
padding bits in the tests are not what we might expect from full-word
struct copies.

I tried adding a function to perform bitwise copying, but even taking
the as.load() argument by const&, we'd still construct a temporary
with SRAed field-wise copying.  Unable to find another way to ensure
we wouldn't get a temporary, I went for disabling SRA.

for  libstdc++-v3/ChangeLog

* testsuite/29_atomics/atomic/compare_exchange_padding.cc:
Disable SRA.

8 weeks ago[libstdc++] [testsuite] xfail double-prec from_chars for float128_t
Alexandre Oliva [Thu, 18 Apr 2024 11:00:56 +0000 (08:00 -0300)]
[libstdc++] [testsuite] xfail double-prec from_chars for float128_t

Tests 20_util/from_chars/4.cc and 20_util/to_chars/long_double.cc were
adjusted about a year ago to skip long double on some targets, because
the fastfloat library was limited to 64-bit doubles.

The same problem comes up in similar float128_t tests on
aarch64-vxworks.  This patch adjusts them similarly.

Unlike the earlier tests, that got similar treatment for
x86_64-vxworks, these haven't failed there.

for  libstdc++-v3/ChangeLog

* testsuite/20_util/from_chars/8.cc: Skip float128_t testing
on aarch64-vxworks.
* testsuite/20_util/to_chars/float128_c++23.cc: Xfail run on
aarch64-vxworks.

8 weeks ago[libstdc++] define zoneinfo_dir_override on vxworks
Alexandre Oliva [Thu, 18 Apr 2024 11:00:52 +0000 (08:00 -0300)]
[libstdc++] define zoneinfo_dir_override on vxworks

VxWorks fails to load kernel-mode modules with weak undefined symbols.
In RTP mode modules, that undergo final linking, weak undefined
symbols are not a problem.

This patch adds kernel-mode VxWorks multilibs to the set of targets
that don't support weak undefined symbols without special flags, in
which tzdb's zoneinfo_dir_override is given a weak definition.

for  libstdc++-v3/ChangeLog

* src/c++20/tzdb.cc (__gnu_cxx::zoneinfo_dir_override): Define
on VxWorks non-RTP.

8 weeks agoAArch64: remove reliance on register allocator for simd/gpreg costing. [PR114741]
Tamar Christina [Thu, 18 Apr 2024 10:47:42 +0000 (11:47 +0100)]
AArch64: remove reliance on register allocator for simd/gpreg costing. [PR114741]

In PR114741 we see that we have a regression in codegen when SVE is enable where
the simple testcase:

void foo(unsigned v, unsigned *p)
{
    *p = v & 1;
}

generates

foo:
        fmov    s31, w0
        and     z31.s, z31.s, #1
        str     s31, [x1]
        ret

instead of:

foo:
        and     w0, w0, 1
        str     w0, [x1]
        ret

This causes an impact it not just codesize but also performance.  This is caused
by the use of the ^ constraint modifier in the pattern <optab><mode>3.

The documentation states that this modifier should only have an effect on the
alternative costing in that a particular alternative is to be preferred unless
a non-psuedo reload is needed.

The pattern was trying to convey that whenever both r and w are required, that
it should prefer r unless a reload is needed.  This is because if a reload is
needed then we can construct the constants more flexibly on the SIMD side.

We were using this so simplify the implementation and to get generic cases such
as:

double negabs (double x)
{
   unsigned long long y;
   memcpy (&y, &x, sizeof(double));
   y = y | (1UL << 63);
   memcpy (&x, &y, sizeof(double));
   return x;
}

which don't go through an expander.
However the implementation of ^ in the register allocator is not according to
the documentation in that it also has an effect during coloring.  During initial
register class selection it applies a penalty to a class, similar to how ? does.

In this example the penalty makes the use of GP regs expensive enough that it no
longer considers them:

    r106: preferred FP_REGS, alternative NO_REGS, allocno FP_REGS
;;        3--> b  0: i   9 r106=r105&0x1
    :cortex_a53_slot_any:GENERAL_REGS+0(-1)FP_REGS+1(1)PR_LO_REGS+0(0)
                         PR_HI_REGS+0(0):model 4

which is not the expected behavior.  For GCC 14 this is a conservative fix.

1. we remove the ^ modifier from the logical optabs.

2. In order not to regress copysign we then move the copysign expansion to
   directly use the SIMD variant.  Since copysign only supports floating point
   modes this is fine and no longer relies on the register allocator to select
   the right alternative.

It once again regresses the general case, but this case wasn't optimized in
earlier GCCs either so it's not a regression in GCC 14.  This change gives
strict better codegen than earlier GCCs and still optimizes the important cases.

gcc/ChangeLog:

PR target/114741
* config/aarch64/aarch64.md (<optab><mode>3): Remove ^ from alt 2.
(copysign<GPF:mode>3): Use SIMD version of IOR directly.

gcc/testsuite/ChangeLog:

PR target/114741
* gcc.target/aarch64/fneg-abs_2.c: Update codegen.
* gcc.target/aarch64/fneg-abs_4.c: xfail for now.
* gcc.target/aarch64/pr114741.c: New test.

8 weeks agolibgcc: Fix up __divmodbitint4 [PR114755]
Jakub Jelinek [Thu, 18 Apr 2024 07:49:02 +0000 (09:49 +0200)]
libgcc: Fix up __divmodbitint4 [PR114755]

The following testcase aborts on aarch64-linux but does not on x86_64-linux.
In both cases there is UB in the __divmodbitint4 implemenetation.
When the divisor is negative with most significant limb (even when partial)
all ones, has at least 2 limbs and the second most significant limb has the
most significant bit clear, when this number is negated, it will have 0
in the most significant limb.
Already in the PR114397 r14-9592 fix I was dealing with such divisors, but
thought the problem is only if because of that un < vn doesn't imply the
quotient is 0 and remainder u.
But as this testcase shows, the problem is with such divisors always.
What happens is that we use __builtin_clz* on the most significant limb,
and assume it will not be 0 because that is UB for the builtins.
Normally the most significant limb of the divisor shouldn't be 0, as
guaranteed by the bitint_reduce_prec e.g. for the positive numbers, unless
the divisor is just 0 (but for vn == 1 we have special cases).

The following patch moves the handling of this corner case a few lines
earlier before the un < vn check, because adjusting the vn later is harder.

2024-04-18  Jakub Jelinek  <jakub@redhat.com>

PR libgcc/114755
* libgcc2.c (__divmodbitint4): Perform the decrement on negative
v with most significant limb all ones and the second least
significant limb with most significant bit clear always, regardless of
un < vn.

* gcc.dg/torture/bitint-69.c: New test.

8 weeks agointernal-fn: Temporarily disable flag_trapv during .{ADD,SUB,MUL}_OVERFLOW etc. expan...
Jakub Jelinek [Thu, 18 Apr 2024 07:45:14 +0000 (09:45 +0200)]
internal-fn: Temporarily disable flag_trapv during .{ADD,SUB,MUL}_OVERFLOW etc. expansion [PR114753]

__builtin_{add,sub,mul}_overflow{,_p} builtins are well defined
for all inputs even for -ftrapv, and the -fsanitize=signed-integer-overflow
ifns shouldn't abort in libgcc but emit the desired ubsan diagnostics
or abort depending on -fsanitize* setting regardless of -ftrapv.
The expansion of these internal functions uses expand_expr* in various
places (e.g. MULT_EXPR at least in 2 spots), so temporarily disabling
flag_trapv in all those spots would be hard.
The following patch disables it around the bodies of 3 functions
which can do the expand_expr calls.
If it was in the C++ FE, I'd use some RAII sentinel, but I don't think
we have one in the middle-end.

2024-04-18  Jakub Jelinek  <jakub@redhat.com>

PR middle-end/114753
* internal-fn.cc (expand_mul_overflow): Save flag_trapv and
temporarily clear it for the duration of the function, then
restore previous value.
(expand_vector_ubsan_overflow): Likewise.
(expand_arith_overflow): Likewise.

* gcc.dg/pr114753.c: New test.

8 weeks agotestsuite, rs6000: Fix builtins-6-p9-runnable.c for BE [PR114744]
Kewen Lin [Thu, 18 Apr 2024 03:20:07 +0000 (22:20 -0500)]
testsuite, rs6000: Fix builtins-6-p9-runnable.c for BE [PR114744]

Test case builtins-6-p9-runnable.c doesn't work well on BE
due to two problems:
  - When applying vec_xl_len onto data_128 and data_u128
    with length 8, it expects to load 1280000[01] from
    the memory, but unfortunately assigning 1280000[01] to
    a {vector} {u,}int128 type variable, the value isn't
    guaranteed to be at the beginning of storage (in the
    low part of memory), which means the loaded value can
    be unexpected (as shown on BE).  So this patch is to
    introduce getU128 which can ensure the given value
    shows up as expected and also update some dumping code
    for debugging.
  - When applying vec_xl_len_r with length 16, on BE it's
    just like the normal vector load, so the expected data
    should not be reversed from the original.

PR testsuite/114744

gcc/testsuite/ChangeLog:

* gcc.target/powerpc/builtins-6-p9-runnable.c: Adjust for BE by fixing
data_{u,}128, their uses and vec_uc_expected1, also adjust some formats.

8 weeks agors6000: Fix bcd test case
Haochen Gui [Wed, 17 Apr 2024 08:39:25 +0000 (16:39 +0800)]
rs6000: Fix bcd test case

gcc/testsuite/
* gcc.target/powerpc/bcd-4.c: Enable the case to be tested on P9.
Enable the case to be run on big endian.  Fix function maxbcd and
other misc. problems.

8 weeks agoDaily bump.
GCC Administrator [Thu, 18 Apr 2024 00:17:43 +0000 (00:17 +0000)]
Daily bump.

8 weeks agolibstdc++: Implement "Printing blank lines with println" for C++23
Jonathan Wakely [Thu, 21 Mar 2024 23:09:14 +0000 (23:09 +0000)]
libstdc++: Implement "Printing blank lines with println" for C++23

This was recently approved for C++26 at the Tokyo meeting. As suggested
by Stephan T. Lavavej, I'm defining it as an extension for C++23 mode
(when std::print and std::prinln were first added) rather than as a new
C++26 feature. Both MSVC and libc++ have agreed to do this too.

libstdc++-v3/ChangeLog:

* include/std/ostream (println(ostream&)): Define new overload.
* include/std/print (println(FILE*), println()): Likewise.
* testsuite/27_io/basic_ostream/print/2.cc: New test.
* testsuite/27_io/print/1.cc: Remove unused header.
* testsuite/27_io/print/3.cc: New test.

8 weeks agoDOCUMENTATION_ROOT_URL vs. release branches [PR114738]
Jakub Jelinek [Wed, 17 Apr 2024 14:17:22 +0000 (16:17 +0200)]
DOCUMENTATION_ROOT_URL vs. release branches [PR114738]

Starting with GCC 14 we have the nice URLification of the options printed
in diagnostics, say for in
test.c:4:23: warning: format ‘%d’ expects argument of type ‘int’, but argument 2 has type ‘long int’ [-Wformat=]
the -Wformat= is underlined in some terminals and hovering on it shows
https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html#index-Wformat
link.

This works nicely on the GCC trunk, where the online documentation is
regenerated every day from a cron job and more importantly, people rarely
use the trunk snapshots for too long, so it is unlikely that further changes
in the documentation will make too many links stale, because users will
simply regularly update to newer snapshots.

I think it doesn't work properly on release branches though.
Some users only use the relased versions (i.e. MAJOR.MINOR.0) from tarballs
but can use them for a couple of years, others use snapshots from the
release branches, but again they could be in use for months or years and
the above mentioned online docs which represent just the GCC trunk might
diverge significantly.

Now, for the relases we always publish also online docs for the release,
which unlike the trunk online docs will not change further, under
e.g.
https://gcc.gnu.org/onlinedocs/gcc-14.1.0/gcc/Warning-Options.html#index-Wformat
or
https://gcc.gnu.org/onlinedocs/gcc-14.2.0/gcc/Warning-Options.html#index-Wformat
etc.

So, I think at least for the MAJOR.MINOR.0 releases we want to use
URLs like above rather than the trunk ones and we can use the same process
of updating *.opt.urls as well for that.

For the snapshots from release branches, we don't have such docs.
One option (implemented in the patch below for the URL printing side) is
point to the MAJOR.MINOR.0 docs even for MAJOR.MINOR.1 snapshots.
Most of the links will work fine, for options newly added on the release
branches (rare thing but still happens) can have until the next release
no URLs for them and get them with the next point release.
The question is what to do about make regenerate-opt-urls for the release
branch snapshots.  Either just document that users shouldn't
make regenerate-opt-urls on release branches (and filter out *.opt.urls
changes from their commits), add make regenerate-opt-urls task be RM
responsibility before making first release candidate from a branch and
adjust the autoregen CI to know about that.  Or add a separate goal
which instead of relying on make html created files would download
copy of the html files from the last release from web (kind of web
mirroring the https://gcc.gnu.org/onlinedocs/gcc-14.1.0/ subtree locally)
and doing regenerate-opt-urls on top of that?  But how to catch the
point when first release candidate is made and we want to update to
what will be the URLs once the release is made (but will be stale URLs
for a week or so)?

Another option would be to add to cron daily regeneration of the online
docs for the release branches.  I don't think that is a good idea though,
because as I wrote earlier, not all users update to the latest snapshot
frequently, so there can be users that use gcc 13.1.1 20230525 for months
or years, and other users which use gcc 13.1.1 20230615 for years etc.

Another question is what is most sensible for users who want to override
the default root and use the --with-documentation-root-url= configure
option.  Do we expect them to grab the whole onlinedocs tree or for release
branches at least include gcc-14.1.0/ subdirectory under the root?
If so, the patch below deals with that.  Or should we just change the
default documentation root url, so if user doesn't specify
--with-documentation-root-url= and we are on a release branch, default that
to https://gcc.gnu.org/onlinedocs/gcc-14.1.0/ or
https://gcc.gnu.org/onlinedocs/gcc-14.2.0/ etc. and don't add any infix in
get_option_url/make_doc_url, but when people supply their own, let them
point to the root of the tree which contains the right docs?
Then such changes would go into gcc/configure.ac, some case based on
"$gcc_version", from that decide if it is a release branch or trunk.

2024-04-17  Jakub Jelinek  <jakub@redhat.com>

PR other/114738
* opts.cc (get_option_url): On release branches append
gcc-MAJOR.MINOR.0/ after DOCUMENTATION_ROOT_URL.
* gcc-urlifier.cc (gcc_urlifier::make_doc_url): Likewise.

8 weeks agolibcpp: Regenerate aclocal.m4 and configure [PR 114748]
Christophe Lyon [Wed, 17 Apr 2024 13:56:19 +0000 (13:56 +0000)]
libcpp: Regenerate aclocal.m4 and configure [PR 114748]

As discussed in the PR, aclocal.m4 and configure were incorrectly
regenerated at some point.

2024-04-17  Christophe Lyon  <christophe.lyon@linaro.org>

PR preprocessor/114748
libcpp/
* aclocal.m4: Regenerate.
* configure: Regenerate.

8 weeks agotree-optimization/114749 - reset partial vector decision for no-SLP retry
Richard Biener [Wed, 17 Apr 2024 08:40:04 +0000 (10:40 +0200)]
tree-optimization/114749 - reset partial vector decision for no-SLP retry

The following makes sure to reset LOOP_VINFO_USING_PARTIAL_VECTORS_P
to its default of false when re-trying without SLP as otherwise
analysis may run into bogus asserts.

PR tree-optimization/114749
* tree-vect-loop.cc (vect_analyze_loop_2): Reset
LOOP_VINFO_USING_PARTIAL_VECTORS_P when re-trying without SLP.

8 weeks agoGCN: Enable effective-target 'vect_long_long'
Thomas Schwinge [Tue, 16 Apr 2024 12:10:15 +0000 (14:10 +0200)]
GCN: Enable effective-target 'vect_long_long'

... as made apparent by a number of unexpectedly UNSUPPORTED test cases, which
now all turn into PASS, with just one exception:

    PASS: gcc.dg/vect/vect-early-break_124-pr114403.c (test for excess errors)
    PASS: gcc.dg/vect/vect-early-break_124-pr114403.c execution test
    FAIL: gcc.dg/vect/vect-early-break_124-pr114403.c scan-tree-dump vect "LOOP VECTORIZED"

..., which needs to be looked into, separately.

gcc/testsuite/
* lib/target-supports.exp (check_effective_target_vect_long_long):
Enable for GCN.

8 weeks agoAVR: target/114752 - Fix ICE on inline asm const 64-bit float operand
Georg-Johann Lay [Wed, 17 Apr 2024 08:26:05 +0000 (10:26 +0200)]
AVR: target/114752 - Fix ICE on inline asm const 64-bit float operand

gcc/
PR target/114752
* config/avr/avr.cc (avr_print_operand) [CONST_DOUBLE_P]: Handle DFmode.

8 weeks agolibstdc++: Add include guard to simd-internal header
Matthias Kretz [Wed, 17 Apr 2024 08:12:42 +0000 (10:12 +0200)]
libstdc++: Add include guard to simd-internal header

Signed-off-by: Matthias Kretz <m.kretz@gsi.de>
libstdc++-v3/ChangeLog:

* include/experimental/bits/numeric_traits.h: Add include guard.

8 weeks agolibstdc++: Avoid ill-formed types on ARM
Matthias Kretz [Wed, 17 Apr 2024 07:11:25 +0000 (09:11 +0200)]
libstdc++: Avoid ill-formed types on ARM

This resolves failing tests in check-simd.

Signed-off-by: Matthias Kretz <m.kretz@gsi.de>
libstdc++-v3/ChangeLog:

PR libstdc++/114750
* include/experimental/bits/simd_builtin.h
(_SimdImplBuiltin::_S_load, _S_store): Fall back to copying
scalars if the memory type cannot be vectorized for the target.

8 weeks agoasan: Don't instrument .ABNORMAL_DISPATCHER [PR114743]
Jakub Jelinek [Wed, 17 Apr 2024 08:24:18 +0000 (10:24 +0200)]
asan: Don't instrument .ABNORMAL_DISPATCHER [PR114743]

.ABNORMAL_DISPATCHER is currently the only internal function with
ECF_NORETURN, and asan likes to instrument ECF_NORETURN calls by adding
some builtin call before them, which breaks the .ABNORMAL_DISPATCHER
discovery added in gsi_safe_*.

The following patch fixes asan not to instrument .ABNORMAL_DISPATCHER
calls, like it doesn't instrument a couple of specific builtin calls
as well.

2024-04-17  Jakub Jelinek  <jakub@redhat.com>

PR sanitizer/114743
* asan.cc (maybe_instrument_call): Don't instrument calls to
.ABNORMAL_DISPATCHER.

* gcc.dg/asan/pr112709-2.c (freddy): New function from
gcc.dg/ubsan/pr112709-2.c version of the test.

8 weeks agoDaily bump.
GCC Administrator [Wed, 17 Apr 2024 00:18:45 +0000 (00:18 +0000)]
Daily bump.

8 weeks agoPR modula2/114745: const cast causes ICE
Gaius Mulley [Tue, 16 Apr 2024 22:08:43 +0000 (23:08 +0100)]
PR modula2/114745: const cast causes ICE

This patch allows SYSTEM.CAST to be used during a const expression and
prevents an ICE.

gcc/m2/ChangeLog:

PR modula2/114745
* gm2-compiler/M2Code.mod (DumpLangDecl): Replace with ...
(GetDumpDecl): ... this.
(DumpLangGimple): Replace with ...
(GetDumpGimple): ... this.
* gm2-compiler/M2GenGCC.mod:
* gm2-compiler/M2LangDump.mod (GetDumpLangQuadFilename): Replace with ...
(GetDumpQuadFilename): ... this.
(GetDumpLangDeclFilename): Replace with ...
(GetDumpDeclFilename): ... this.
(GetDumpLangGimpleFilename): Replace with ...
(GetDumpGimpleFilename): ... this.
* gm2-compiler/M2Options.def (GetDumpLangDeclFilename): New
procedure function.
(GetDumpDeclFilename): Ditto.
(SetDumpLangDeclFilename): New procedure.
(SetDumpDeclFilename): Ditto.
(GetDumpLangQuadFilename): New procedure function.
(GetDumpQuadFilename): Ditto
(SetDumpLangQuadFilename): New procedure.
(SetDumpQuadFilename): Ditto.
(GetDumpLangGimpleFilename): New procedure function.
(GetDumpGimpleFilename): Ditto.
(SetDumpLangGimpleFilename): New procedure.
(SetDumpGimpleFilename): Ditto.
(GetDumpLangGimple): New procedure function.
(SetM2Dump): New procedure.
(GetDumpGimple): New procedure function.
(GetDumpQuad): Ditto.
(GetDumpDecl): Ditto.
* gm2-compiler/M2Options.mod (DumpLangDeclFilename): Remove.
(DumpLangQuadFilename): Ditto.
(DumpLangGimpleFilename): Ditto.
(DumpDeclFilename): New variable.
(DumpQuadFilename): Ditto.
(DumpGimpleFilename): Ditto.
(DebugTraceTree): New variable.
(SetQuadDebugging): Rewrite.
(GetDumpLangDeclFilename): Replace with ...
(GetDumpDeclFilename): ... this.
(SetDumpLangQuadFilename): Replace with ...
(SetDumpQuadFilename): ... this.
(GetDumpLangGimpleFilename): Replace with ...
(GetDumpGimpleFilename): ... this.
(SetDumpLangGimpleFilename): Replace with ...
(SetDumpGimpleFilename): ... this.
(GetDumpLangGimple): Remove.
(MatchDump): New procedure function.
(SetM2Dump): New procedure.
(GetDumpGimple): New procedure function.
(GetDumpQuad): Ditto.
(GetDumpDecl): Ditto.
(GetDumpLangGimple): Ditto.
* gm2-compiler/M2Quads.mod (BreakAtQuad): Assigned to 140.
(BuildTypeCoercion): Add ConstExpr parameter.
Check for const parameter in a const expression.
Create a constant temporary if in a const expression.
(BuildCastFunction): Pass ConstExpr to BuildTypeCoercion.
(BuildFunctionCall): Pass ConstExpr to BuildTypeCoercion.
* gm2-compiler/PCSymBuild.mod (buildConstFunction): Test for Cast
and call InitConvert.
(ErrorConstFunction): Add CAST to the error message.
* gm2-compiler/SymbolTable.mod (GetConstStringContent): Remove
unused procedure.
* gm2-gcc/m2decl.cc (m2decl_DeclareKnownConstant): Copy value
and change type of value.
* gm2-gcc/m2options.h (M2Options_GetDumpLangDeclFilename): Remove.
(M2Options_SetDumpLangDeclFilename): Ditto.
(M2Options_GetDumpLangQuadFilename): Ditto.
(M2Options_SetDumpLangQuadFilename): Ditto.
(M2Options_GetDumpLangGimpleFilename): Ditto.
(M2Options_SetDumpLangGimpleFilename): Ditto.
(M2Options_GetDumpLangGimple): Ditto.
(M2Options_GetDumpDeclFilename): New function.
(M2Options_SetDumpDeclFilename): Ditto.
(M2Options_GetDumpQuadFilename): Ditto.
(M2Options_SetDumpQuadFilename): Ditto.
(M2Options_GetDumpGimpleFilename): Ditto.
(M2Options_SetDumpGimpleFilename): Ditto.
(M2Options_SetM2Dump): Ditto.
(M2Options_GetDumpGimple): Ditto.
* gm2-gcc/m2pp.cc (GM2): New define.
(m2pp_type_lowlevel): Remove linefeed.
(m2pp_identifier): Add type description for const.
(m2pp_assignment): Display lhs/rhs types.
(m2pp_dump_gimple): Replace GetDumpLangGimple with GetDumpGimple.
* gm2-lang.cc (ENABLE_QUAD_DUMP_ALL): Remove.
(ENABLE_M2DUMP_ALL): New define.
(gm2_langhook_handle_option): Remove commented options
OPT_fdump_lang_all, OPT_fdump_lang_decl_, OPT_fdump_lang_gimple,
OPT_fdump_lang_gimple_, OPT_fdump_lang_quad and
OPT_fdump_lang_quad_.
Add commented options OPT_fm2_dump_, OPT_fm2_dump_decl_,
OPT_fm2_dump_gimple_ and OPT_fm2_dump_quad_.

gcc/testsuite/ChangeLog:

PR modula2/114745
* gm2/iso/const/pass/constcast.mod: New test.
* gm2/iso/const/pass/constodd.mod: New test.
* gm2/pim/pass/tinyindr.mod: New test.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
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