Patrick Palka [Thu, 14 May 2020 16:56:18 +0000 (12:56 -0400)]
c++: Missing SFINAE with lookup_fnfields [PR78446]
Here we're failing to do SFINAE in build_op_call when looking up the
class's operator() via lookup_fnfields, which calls lookup_member always
with complain=tf_warning_or_error; from there we would complain
about an ambiguous lookup for operator().
This patch fixes this by adding a tsubst_flags_t parameter to
lookup_fnfields and adjusting all its callers appropriately.
gcc/cp/ChangeLog:
PR c++/78446
* call.c (build_op_call): Pass complain to lookup_fnfields.
(build_special_member_call): Likewise.
* class.c (type_requires_array_cookie): Pass tf_warning_or_error
to lookup_fnfields.
* cp-tree.h (lookup_fnfields): Add tsubst_flags_t parameter.
* except.c (build_throw): Pass tf_warning_or_error to
lookup_fnfields.
* init.c (build_new_1): Pass complain to lookup_fnfields.
* method.c (locate_fn_flags): Likewise.
* name-lookup.c (lookup_name_real_1): Pass tf_warning_or_error
to lookup_fnfields.
* pt.c (tsubst_baselink): Pass complain to lookup_fnfields.
* search.c (lookup_fnfields): New 'complain' parameter. Pass it
to lookup_member.
gcc/testsuite/ChangeLog:
PR c++/78446
* g++.dg/template/sfinae31.C: New test.
H.J. Lu [Thu, 14 May 2020 15:25:39 +0000 (08:25 -0700)]
x86: Default CET run-time support to auto
CET has been added since GCC 8. This patch defaults CET run-time support
to auto. It enables CET run-time support if asssembler supports CET
instructions and multi-byte NOPs are enabled via SSE2.
Nathan Sidwell [Thu, 14 May 2020 13:39:29 +0000 (06:39 -0700)]
c++: Improve build_template_decl
I discovered all the users of build_template_decl were explicitly
setting the RESULT and TYPE fields of the built decl. Let's just have
build_template_decl do that in the first place.
* pt.c (build_template_decl): Init DECL_TEMPLATE_RESULT &
TREE_TYPE here ...
(process_partial_specialization): ... not here ...
(push_template_decl_real, add_inherited_template_parms)
(build_deduction_guide): ... or here.
aarch64: Fix arm_sve_vector_bits on typedefs [PR95105]
Compiling this testcase with -march=armv8.2-a+sve
-msve-vector-bits=512:
----------------------------------------------------------
typedef __SVFloat32_t foo;
typedef foo bar __attribute__((arm_sve_vector_bits(512)));
template<typename T> struct s { T x; };
extern s<bar> a;
bar &b = a.x;
----------------------------------------------------------
gave the bogus error:
cannot bind non-const lvalue reference of type ‘bar&’ to an rvalue
of type ‘bar’
The testcase works if the attribute is applied directly
to __SVFloat32_t instead of via foo.
This shows a more general problem with the way that we were handling
the arm_sve_vector_bits attribute: we started by building a distinct
copy of the type to which the attribute was applied, instead of starting
with its main variant. This new type then became its own main variant,
meaning that the relationship between types that have the attribute
could be different from the relationship between types that don't have
the attribute.
This patch instead copies the main variant of the original type and then
reapplies all the differences.
2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
PR target/95105
* config/aarch64/aarch64-sve-builtins.cc
(handle_arm_sve_vector_bits_attribute): Create a copy of the
original type's TYPE_MAIN_VARIANT, then reapply all the differences
between the original type and its main variant.
gcc/testsuite/
PR target/95105
* gcc.target/aarch64/sve/acle/general/attributes_8.c: New test.
* g++.target/aarch64/sve/acle/general-c++/attributes_1.C: Likewise.
Richard Biener [Thu, 14 May 2020 06:53:03 +0000 (08:53 +0200)]
middle-end/95118 - fix printing of denormal zero
This fixes printing a REAL_CST generated from value-numbering
punning some bits to a real which turns out as zero with big
negative exponent. This causes the loop in real_to_decimal_for_mode to
never terminate.
2020-05-14 Richard Biener <rguenther@suse.de>
PR middle-end/95118
* real.c (real_to_decimal_for_mode): Make sure we handle
a zero with nonzero exponent.
Jakub Jelinek [Thu, 14 May 2020 07:58:53 +0000 (09:58 +0200)]
openmp: cgraph support for late declare variant resolution
This is a new version of the
https://gcc.gnu.org/legacy-ml/gcc-patches/2019-11/msg01493.html
patch. Unlike the previous version, this one actually works properly
except for LTO, bootstrapped/regtested on x86_64-linux and i686-linux
too.
In short, #pragma omp declare variant is a directive which allows
redirection of direct calls to certain function to other calls with a
scoring system and some of those decisions need to be deferred until after
IPA. The patch represents them with calls to an artificial FUNCTION_DECL
with declare_variant_alt in the cgraph_node set.
For LTO, the patch only saves/restores the two cgraph_node bits added in the
patch, but doesn't yet stream out and back in the on the side info for the
declare_variant_alt. For the LTO partitioning, I believe those artificial
FUNCTION_DECLs with declare_variant_alt need to go into partition together
with anything that calls them (possibly duplicated), any way how to achieve
that? Say if declare variant artificial fn foobar is directly
called from all of foo, bar and baz and not from qux and we want 4
partitions, one for each of foo, bar, baz, qux, then foobar is needed in the
first 3 partitions, and the IPA_REF_ADDRs recorded for foobar that right
after IPA the foobar call will be replaced with calls to foobar1, foobar2,
foobar3 or foobar (non-artificial) can of course stay in different
partitions if needed.
2020-05-14 Jakub Jelinek <jakub@redhat.com>
* Makefile.in (GTFILES): Add omp-general.c.
* cgraph.h (struct cgraph_node): Add declare_variant_alt and
calls_declare_variant_alt members and initialize them in the
ctor.
* ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
calls to declare_variant_alt nodes.
* lto-cgraph.c (lto_output_node): Write declare_variant_alt
and calls_declare_variant_alt.
(input_overwrite_node): Read them back.
* omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
bit.
* tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
bit.
(tree_function_versioning): Copy calls_declare_variant_alt bit.
* omp-offload.c (execute_omp_device_lower): Call
omp_resolve_declare_variant on direct function calls.
(pass_omp_device_lower::gate): Also enable for
calls_declare_variant_alt functions.
* omp-general.c (omp_maybe_offloaded): Return false after inlining.
(omp_context_selector_matches): Handle the case when
cfun->curr_properties has PROP_gimple_any bit set.
(struct omp_declare_variant_entry): New type.
(struct omp_declare_variant_base_entry): New type.
(struct omp_declare_variant_hasher): New type.
(omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
New methods.
(omp_declare_variants): New variable.
(struct omp_declare_variant_alt_hasher): New type.
(omp_declare_variant_alt_hasher::hash,
omp_declare_variant_alt_hasher::equal): New methods.
(omp_declare_variant_alt): New variables.
(omp_resolve_late_declare_variant): New function.
(omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
when called late. Create a magic declare_variant_alt fndecl and
cgraph node and return that if decision needs to be deferred until
after gimplification.
* cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
bit.
* c-c++-common/gomp/declare-variant-14.c: New test.
Jakub Jelinek [Thu, 14 May 2020 07:51:05 +0000 (09:51 +0200)]
openmp: Fix placement of 2nd+ preparation statement for PHIs in simd clone lowering [PR95108]
For normal stmts, preparation statements are inserted before the stmt, so if we need multiple,
they are in the correct order, but for PHIs we emit them after labels in the entry successor
bb, and we used to emit them in the reverse order that way.
2020-05-14 Jakub Jelinek <jakub@redhat.com>
PR middle-end/95108
* omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
(ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
entry block if info->after_stmt is NULL, otherwise add after that stmt
and update it after adding each stmt.
(ipa_simd_modify_function_body): Initialize info.after_stmt.
Jakub Jelinek [Thu, 14 May 2020 07:48:32 +0000 (09:48 +0200)]
openmp: Also implicitly mark as declare target to functions mentioned in target regions
OpenMP 5.0 also specifies that functions referenced from target regions
(except for target regions with device(ancestor:)) are also implicitly declare target to.
This patch implements that.
2020-05-14 Jakub Jelinek <jakub@redhat.com>
* function.h (struct function): Add has_omp_target bit.
* omp-offload.c (omp_discover_declare_target_fn_r): New function,
old renamed to ...
(omp_discover_declare_target_tgt_fn_r): ... this.
(omp_discover_declare_target_var_r): Call
omp_discover_declare_target_tgt_fn_r instead of
omp_discover_declare_target_fn_r.
(omp_discover_implicit_declare_target): Also queue functions with
has_omp_target bit set, for those walk with
omp_discover_declare_target_fn_r, for declare target to functions
walk with omp_discover_declare_target_tgt_fn_r.
gcc/c/
* c-parser.c (c_parser_omp_target): Set cfun->has_omp_target.
gcc/cp/
* cp-gimplify.c (cp_genericize_r): Set cfun->has_omp_target.
gcc/fortran/
* trans-openmp.c: Include function.h.
(gfc_trans_omp_target): Set cfun->has_omp_target.
libgomp/
* testsuite/libgomp.c-c++-common/target-40.c: New test.
Uros Bizjak [Thu, 14 May 2020 07:15:23 +0000 (09:15 +0200)]
i386: Add V2SFmode conversion functions [PR95046]
gcc/ChangeLog:
PR target/95046
* config/i386/mmx.md (mmx_fix_truncv2sfv2si2): rename from mmx_pf2id.
Add SSE/AVX alternative. Change operand predicates from
nonimmediate_operand to register_mmxmem_operand.
Enable instruction pattern for TARGET_MMX_WITH_SSE.
(fix_truncv2sfv2si2): New expander.
(fixuns_truncv2sfv2si2): Ditto.
(mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
Add SSE/AVX alternative. Change operand predicates from
nonimmediate_operand to register_mmxmem_operand.
Enable instruction pattern for TARGET_MMX_WITH_SSE.
(floatv2siv2sf2): New expander.
(floatunsv2siv2sf2): Ditto.
* config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
Update for rename.
(IX86_BUILTIN_PI2FD): Ditto.
testsuite/ChangeLog:
PR target/95046
* gcc.target/i386/pr95046-5.c: New test.
Andreas Krebbel [Thu, 14 May 2020 06:16:27 +0000 (08:16 +0200)]
IBM Z: stack clash prot: add missing updates of last_probe_offset
After emitting probes in a loop last_probe_offset needs to be updated.
Not doing this usually assumes a too low distance to the last access
when emitting the remainder leading to stack probes being omitted.
gcc/ChangeLog:
2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390.c (allocate_stack_space): Add missing updates
of last_probe_offset.
gcc/testsuite/ChangeLog:
2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
Andreas Krebbel [Thu, 14 May 2020 06:16:27 +0000 (08:16 +0200)]
Make anti_adjust_stack_and_probe_stack_clash extern and use it for Z
When compiling with -mbackchain -fstack-clash-protection currently no
probes are emitted. This patch adjusts the "allocate_stack" expander
to call anti_adjust_stack_and_probe_stack_clash when needed. In order
to do this I had to export that function from explow.c.
Ok for mainline?
gcc/ChangeLog:
2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
Kelvin Nilsen [Wed, 13 May 2020 21:09:17 +0000 (16:09 -0500)]
rs6000: Add vec_extracth and vec_extractl
Add new insns vextdu[bhw]vlx, vextddvlx, vextdu[bhw]vhx, and
vextddvhx, along with built-in access and overloaded built-in
access to these insns.
[gcc]
2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
* config/rs6000/altivec.h (vec_extractl): New #define.
(vec_extracth): Likewise.
* config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
(UNSPEC_EXTRACTR): Likewise.
(vextractl<mode>): New expansion.
(vextractl<mode>_internal): New insn.
(vextractr<mode>): New expansion.
(vextractr<mode>_internal): New insn.
* config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
New built-in function.
(__builtin_altivec_vextduhvlx): Likewise.
(__builtin_altivec_vextduwvlx): Likewise.
(__builtin_altivec_vextddvlx): Likewise.
(__builtin_altivec_vextdubvhx): Likewise.
(__builtin_altivec_vextduhvhx): Likewise.
(__builtin_altivec_vextduwvhx): Likewise.
(__builtin_altivec_vextddvhx): Likewise.
(__builtin_vec_extractl): New overloaded built-in function.
(__builtin_vec_extracth): Likewise.
* config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
Define overloaded forms of __builtin_vec_extractl and
__builtin_vec_extracth.
(builtin_function_type): Add cases to mark arguments of new
built-in functions as unsigned.
(rs6000_common_init_builtins): Add
opaque_ftype_opaque_opaque_opaque_opaque.
* config/rs6000/rs6000.md (du_or_d): New mode attribute.
* doc/extend.texi (PowerPC AltiVec Built-in Functions Available
for a Future Architecture): Add description of vec_extractl and
vec_extractr built-in functions.
Patrick Palka [Wed, 13 May 2020 20:27:45 +0000 (16:27 -0400)]
c++: SFINAE for invalid delete-expression [PR79706]
This fixes SFINAE when substitution yields an invalid delete-expression
due to the pertinent deallocation function being marked deleted or
otherwise inaccessible.
We need to check for an erroneous result from build_op_delete_call and
exit early in that case, so that we don't build a COND_EXPR around the
erroneous result which finish_decltype_type would then quietly accept.
gcc/cp/ChangeLog:
PR c++/79706
* init.c (build_vec_delete_1): Just return error_mark_node if
deallocate_expr is error_mark_node.
(build_delete): Just return error_mark_node if do_delete is
error_mark_node.
gcc/testsuite/ChangeLog:
PR c++/79706
* g++.dg/template/sfinae30.C: New test.
In the testcase below we're prematurely folding away the
requires-expression to 'true' after substituting in the function's
template arguments, but before substituting in the lambda's deduced
template arguments.
This patch removes the uses_template_parms check when deciding in
tsubst_requires_expr whether to keep around a new requires-expression.
Regardless of whether the template arguments are dependent, there still
might be more template parameters to later substitute in (as in the
below testcase) and even if not, tsubst_expr doesn't perform full
semantic processing unless !processing_template_decl, so we should still
wait until then to fold away the requires-expression.
gcc/cp/ChangeLog:
PR c++/95020
* constraint.c (tsubst_requires_expr): Produce a new
requires-expression when processing_template_decl, even if
template arguments are not dependent.
gcc/testsuite/ChangeLog:
PR c++/95020
* g++/cpp2a/concepts-lambda7.C: New test.
Marek Polacek [Mon, 11 May 2020 22:28:19 +0000 (18:28 -0400)]
c++: explicit(bool) malfunction with dependent expression [PR95066]
I forgot to set DECL_HAS_DEPENDENT_EXPLICIT_SPEC_P when merging two
function declarations and as a sad consequence, we never tsubsted
the dependent explicit-specifier in tsubst_function_decl, leading to
disregarding the explicit-specifier altogether, and wrongly accepting
this test.
PR c++/95066
* decl.c (duplicate_decls): Set DECL_HAS_DEPENDENT_EXPLICIT_SPEC_P.
Nathan Sidwell [Wed, 13 May 2020 20:22:02 +0000 (13:22 -0700)]
c++: Template arg comparison
When fixing up the template specialization hasher I was confused by
the control flow through template_args_equal. This reorders the
category checking, so it is clearer as to what kind of node can reach
which point.
* pt.c (template_args_equal): Reorder category checking for
clarity.
Nathan Sidwell [Wed, 13 May 2020 20:17:25 +0000 (13:17 -0700)]
c++: Simplify typedef access checking
I discovered that the template typedef access check was rather more
expensive than needed. The call of get_types_needed_access_check in
the FOR_EACH_VEC_SAFE_ELT is the moral equivalent of 'for (size_t pos
= 0; pos != strlen (string); pos++)'. Let's not do that.
* pt.c (perform_typedefs_access_check): Cache expensively
calculated object references.
(check_auto_in_tmpl_args): Just assert we do not get unexpected
nodes, rather than silently do nothing.
(append_type_to_template_for_access): Likewise, cache expensie
object reference.
Jason Merrill [Wed, 13 May 2020 19:15:13 +0000 (15:15 -0400)]
c++: Replace "C++2a" with "C++20".
C++20 isn't final quite yet, but all that remains is formalities, so let's
go ahead and change all the references.
I think for the next C++ standard we can just call it C++23 rather than
C++2b, since the committee has been consistent about time-based releases
rather than feature-based.
gcc/c-family/ChangeLog
2020-05-13 Jason Merrill <jason@redhat.com>
* c.opt (std=c++20): Make c++2a the alias.
(std=gnu++20): Likewise.
* c-common.h (cxx_dialect): Change cxx2a to cxx20.
* c-opts.c: Adjust.
* c-cppbuiltin.c: Adjust.
* c-ubsan.c: Adjust.
* c-warn.c: Adjust.
gcc/cp/ChangeLog
2020-05-13 Jason Merrill <jason@redhat.com>
Jason Merrill [Wed, 13 May 2020 19:15:13 +0000 (15:15 -0400)]
testsuite: Support { target c++20 } in tests.
I'm not sure why I didn't check this in along with adding -std=c++20, since
I wrote this patch at the same time. The testsuite should support both
{ target c++2a } and { target c++20 }.
gcc/testsuite/ChangeLog
2020-05-13 Jason Merrill <jason@redhat.com>
Richard Biener [Wed, 13 May 2020 12:09:40 +0000 (14:09 +0200)]
add vectype parameter to add_stmt_cost hook
This adds a vectype parameter to add_stmt_cost which avoids the need
to pass down a (wrong) stmt_info just to carry this information.
Useful for invariants which do not have a stmt_info associated.
Mark Eggleston [Thu, 7 May 2020 07:29:14 +0000 (08:29 +0100)]
Fortran : ICE in gfc_conv_array_constructor_expr PR93497
Invalid expressions, such as those involving array constructors,
used for the length of character types will cause an ICE.
2020-05-13 Steven G. Kargl <kargl@gcc.gnu.org>
gcc/fortran/
PR fortran/93497
* decl.c (char_len_param_value): Check whether character
length expression is of type EXPR_OP and if so simplify it.
* resolve.c (resolve_charlen): Reject length if it has a
rank.
2020-05-13 Mark Eggleston <markeggleston@gcc.gnu.org>
gcc/testsuite/
PR fortran/93497
* gfortran.dg/pr88025.f90: Change in wording of error.
* gfortran.dg/pr93497.f90: New test.
* gfortran.dg/pr93714_1.f90: Change in wording of errors.
* gfortran.dg/pr93714_2.f90: Change in wording of errors.
Richard Biener [Fri, 21 Feb 2020 09:40:25 +0000 (10:40 +0100)]
Remove SLP_INSTANCE_GROUP_SIZE
This removes the SLP_INSTANCE_GROUP_SIZE member since the number of
lanes throughout a SLP subgraph is not necessarily constant.
2020-05-13 Richard Biener <rguenther@suse.de>
* tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
(_slp_instance::group_size): Likewise.
* tree-vect-loop.c (vectorizable_reduction): The group size
is the number of lanes in the node.
* tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
(vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
verify it matches the instance trees number of lanes.
(vect_slp_analyze_node_operations_1): Use the numer of lanes
in the node as group size.
(vect_bb_vectorization_profitable_p): Use the instance root
number of lanes for the size of life.
(vect_schedule_slp_instance): Use the number of lanes as
group_size.
* tree-vect-stmts.c (vectorizable_load): Remove SLP instance
parameter. Use the number of lanes of the load for the group
size in the gap adjustment code.
(vect_analyze_stmt): Adjust.
(vect_transform_stmt): Likewise.
Martin Liska [Wed, 13 May 2020 12:27:30 +0000 (14:27 +0200)]
Add gcc-changelog related scripts.
* gcc-changelog/git_check_commit.py: New file.
* gcc-changelog/git_commit.py: New file.
* gcc-changelog/git_email.py: New file.
* gcc-changelog/git_repository.py: New file.
* gcc-changelog/git_update_version.py: New file.
Jakub Jelinek [Wed, 13 May 2020 09:22:37 +0000 (11:22 +0200)]
Fix -fcompare-debug issue in purge_dead_edges [PR95080]
The following testcase fails with -fcompare-debug, the bug used to be latent
since introduction of -fcompare-debug.
The loop at the start of purge_dead_edges behaves differently between -g0
and -g - if the last insn is a DEBUG_INSN, then it skips not just
DEBUG_INSNs but also NOTEs until it finds some other real insn (or bb head),
while with -g0 it will not skip any NOTEs, so if we have
real_insn
note
debug_insn // not present with -g0
then with -g it might remove useless REG_EH_REGION from real_insn, while
with -g0 it will not.
Yet another option would be not skipping NOTE_P in the loop; I couldn't find
in history rationale for why it is done.
2020-05-13 Jakub Jelinek <jakub@redhat.com>
PR debug/95080
* cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
if the last insn is a note.
Jakub Jelinek [Wed, 13 May 2020 09:21:02 +0000 (11:21 +0200)]
Fold single imm use of a FMA if it is a negation [PR95060]
match.pd already has simplifications for negation of a FMA (FMS, FNMA, FNMS)
call if it is single use, but when the widening_mul pass discovers FMAs,
nothing folds the statements anymore.
So, the following patch adjusts the widening_mul pass to handle that.
I had to adjust quite a lot of tests, because they have in them nested FMAs
(one FMA feeding another one) and the patch results in some (equivalent) changes
in the chosen instructions, previously the negation of one FMA's result
would result in the dependent FMA being adjusted for the negation, but now
instead the first FMA is adjusted.
2020-05-13 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/95060
* tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
if it is the single use of the FMA internal builtin.
PR fortran/94690
* openmp.c (OMP_DISTRIBUTE_CLAUSES): Add OMP_CLAUSE_LASTPRIVATE.
(gfc_resolve_do_iterator): Skip the private handling for SIMD as
that is handled by ME code.
* trans-openmp.c (gfc_trans_omp_do): Don't add private/lastprivate
for dovar_found == 0, unless !simple.
Alexandre Oliva [Wed, 13 May 2020 07:49:00 +0000 (04:49 -0300)]
x86-vxworks malloc aligns to 8 bytes like solaris
Vxworks 7's malloc, like Solaris', only ensures 8-byte alignment of
returned pointers on 32-bit x86, though GCC's stddef.h defines
max_align_t with 16-byte alignment for __float128. This patch enables
on x86-vxworks the same memory_resource workaround used for x86-solaris.
The testsuite also had a workaround, defining BAD_MAX_ALIGN_T and
xfailing the test; extend those to x86-vxworks as well, and remove the
check for char-aligned requested allocation to be aligned like
max_align_t. With that change, the test passes on x86-vxworks; I'm
guessing that's the same reason for the test not to pass on
x86-solaris (and on x86_64-solaris -m32), so with the fix, I'm
tentatively removing the xfail.
for libstdc++-v3/ChangeLog
PR libstdc++/77691
* include/experimental/memory_resource
(__resource_adaptor_imp::do_allocate): Handle max_align_t on
x86-vxworks as on x86-solaris.
(__resource_adaptor_imp::do_deallocate): Likewise.
* testsuite/experimental/memory_resource/new_delete_resource.cc:
Drop xfail.
(BAD_MAX_ALIGN_T): Define on x86-vxworks as on x86-solaris.
(test03): Drop max-align test for char-aligned alloc.
Bin Cheng [Wed, 13 May 2020 03:37:47 +0000 (11:37 +0800)]
Add missing unit dependence vector in data dependence analysis
Current data dependence analysis misses unit distant vector if DRs in
DDR have the same invariant access functions. This adds the vector as
the constant access function case.
2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
PR tree-optimization/94969
gcc/
* tree-data-dependence.c (constant_access_functions): Rename to...
(invariant_access_functions): ...this. Add parameter. Check for
invariant access function, rather than constant.
(build_classic_dist_vector): Call above function.
* tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
gcc/testsuite/
* gcc.dg/tree-ssa/pr94969.c: New test.
liuhongt [Fri, 8 May 2020 09:47:33 +0000 (17:47 +0800)]
Document more x86 operand modifier.
Documents operand modifiers which are available in asm stmt but missing in document.
| Modifier | Description | Available in asm stmt | Existed in documentation |
| --- | --- | ------- | ----- |
| L,W,B,Q,S,T | print the opcode suffix for specified size of operand. | Available | Not |
| C | print opcode suffix for set/cmov insn. | Not | - |
| c | like C, but print reversed condition | Not | - |
| F,f | likewise, but for floating-point. | Not | - |
| O | if HAVE_AS_IX86_CMOV_SUN_SYNTAX, expand to "w.", "l." or "q.", otherwise nothing | Not | - |
| R | print embedded rounding and sae. | Available | Not |
| r | print only sae. | Available | Not |
| z | print the opcode suffix for the size of the current operand. | Available | Existed |
| Z | likewise, with special suffixes for x87 instructions. | Availble | Not |
| * | print a star (in certain assembler syntax) | Not | - |
| A | print an absolute memory reference. | Available | Existed |
| E | print address with DImode register names if TARGET_64BIT. | Available | Existed |
| w | print the operand as if it's a "word" (HImode) even if it isn't. | Available | Existed |
| s | print a shift double count, followed by the assemblers argument delimiter. | Available | Not |
| b | print the QImode name of the register for the indicated operand %b0 would print %al if operands[0] is reg 0. | Available | Existed |
| w | likewise, print the HImode name of the register. | Available | Existed |
| k | likewise, print the SImode name of the register. | Available | Existed |
| q | likewise, print the DImode name of the register. | Available | Existed |
| x | likewise, print the V4SFmode name of the register. | Available | Not |
| t | likewise, print the V8SFmode name of the register. | Available | Not |
| g | likewise, print the V16SFmode name of the register. | Avaliable | Not |
| h | print the QImode name for a "high" register, either ah, bh, ch or dh. | Available | Existed |
| y | print "st(0)" instead of "st" as a register. | Available | Not |
| d | print duplicated register operand for AVX instruction. | Available | Not |
| D | print condition for SSE cmp instruction. | Not | - |
| P | if PIC, print an @PLT suffix. | Available | Existed |
| p | print raw symbol name. | Available | Existed |
| X | don't print any sort of PIC '@' suffix for a symbol. | Not | - |
| & | print some in-use local-dynamic symbol name. | Not | - |
| H | print a memory address offset by 8; used for sse high-parts | Available | Existed |
| Y | print condition for XOP pcom* instruction. | Not | - |
| V | print naked full integer register name without %. | Available | Existed |
| + | print a branch hint as 'cs' or 'ds' prefix | Not | - |
| ; | print a semicolon (after prefixes due to bug in older gas). | Not | - |
| ~ | print "i" if TARGET_AVX2, "f" otherwise. | Not | - |
| ^ | print addr32 prefix if TARGET_64BIT and Pmode != word_mode | Not | - |
| M | print addr32 prefix for TARGET_X32 with VSIB address. | Not | - |
| ! | print NOTRACK prefix for jxx/call/ret instructions if required. | Not | - |
| N | print maskz if it's constant 0 operand. | Available | Not |
| I | print comparision predicate operand for sse cmp condition. | Not | - |
gcc/ChangeLog
PR target/94118
* doc/extend.texi (x86Operandmodifiers): Document more x86
operand modifier.
* gcc/config/i386/i386.c: Add comment for operand modifier N
and I.
Refactor tree-vrp.c to eliminate all global variables except
'x_vrp_values', which will require that 'thread_outgoing_edges'
to accept an extra argument and pass it to the 'simplify' callback.
It also removes every access to 'cfun', retrieving the function being
compiled from the pass engine.
* tree-vrp.c (class vrp_insert): New.
(insert_range_assertions): Move to class vrp_insert.
(dump_all_asserts): Same as above.
(dump_asserts_for): Same as above.
(live): Same as above.
(need_assert_for): Same as above.
(live_on_edge): Same as above.
(finish_register_edge_assert_for): Same as above.
(find_switch_asserts): Same as above.
(find_assert_locations): Same as above.
(find_assert_locations_1): Same as above.
(find_conditional_asserts): Same as above.
(process_assert_insertions): Same as above.
(register_new_assert_for): Same as above.
(vrp_prop): New variable fun.
(vrp_initialize): New parameter.
(identify_jump_threads): Same as above.
(execute_vrp): Same as above.
Keith Packard [Wed, 29 Apr 2020 16:49:56 +0000 (09:49 -0700)]
RISC-V: Make unique SECCAT_SRODATA names start with .srodata (not .sdata2)
default_unique_section uses ".sdata2" as a prefix for SECCAT_SRODATA
unique sections, but RISC-V uses ".srodata" instead. Override the
TARGET_ASM_UNIQUE_SECTION function to catch this case, allowing the
default to be used for all other sections.
Craig Blackmore [Tue, 12 May 2020 21:41:08 +0000 (14:41 -0700)]
RISC-V: Add shorten_memrefs pass.
gcc/
* config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
* config/riscv/riscv-passes.def: New file.
* config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
* config/riscv/riscv-shorten-memrefs.c: New file.
* config/riscv/riscv.c (tree-pass.h): New include.
(riscv_compressed_reg_p): New Function
(riscv_compressed_lw_offset_p): Likewise.
(riscv_compressed_lw_address_p): Likewise.
(riscv_shorten_lw_offset): Likewise.
(riscv_legitimize_address): Attempt to convert base + large_offset
to compressible new_base + small_offset.
(riscv_address_cost): Make anticipated compressed load/stores
cheaper for code size than uncompressed load/stores.
(riscv_register_priority): Move compressed register check to
riscv_compressed_reg_p.
* config/riscv/riscv.h (C_S_BITS): Define.
(CSW_MAX_OFFSET): Define.
* config/riscv/riscv.opt (mshorten-memefs): New option.
* config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
(PASSES_EXTRA): Add riscv-passes.def.
* doc/invoke.texi: Document -mshorten-memrefs.
* config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
(TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
* sched-deps.c (attempt_change): Use old address if it is cheaper than
new address.
* target.def (new_address_profitable_p): New hook.
* targhooks.c (default_new_address_profitable_p): New function.
* targhooks.h (default_new_address_profitable_p): Declare.
gcc/testsuite/
* gcc.target/riscv/shorten-memrefs-1.c: New test.
* gcc.target/riscv/shorten-memrefs-2.c: New test.
* gcc.target/riscv/shorten-memrefs-3.c: New test.
* gcc.target/riscv/shorten-memrefs-4.c: New test.
* gcc.target/riscv/shorten-memrefs-5.c: New test.
* gcc.target/riscv/shorten-memrefs-6.c: New test.
* gcc.target/riscv/shorten-memrefs-7.c: New test.
Eric Botcazou [Tue, 12 May 2020 20:41:09 +0000 (22:41 +0200)]
Suppress warning for Interfaces.C with -fdump-ada-spec
The C/C++ bindings generated by means of -fdump-ada-spec always contain
with and use clauses for Interfaces.C, but they can be unused in some
cases so make sure to avoid warning about that.
* c-ada-spec.c (dump_ads): Output pragma Warnings ("U"); on entry.
Nathan Sidwell [Tue, 12 May 2020 20:33:11 +0000 (13:33 -0700)]
preprocessor: EOF location is at end of file [PR95013]
My recent C++ parser change to pay attention to EOF location uncovered
a separate bug. The preprocesor's EOF logic would set the EOF
location to be the beginning of the last line of text in the file --
not the 'line' after that, which contains no characters. Mostly.
This fixes things so that when we attempt to read the last line of the
main file, we don't pop the buffer until the tokenizer has a chance to
create an EOF token with the correct location information. It is then
responsible for popping the buffer. As it happens, raw string literal
tokenizing contained a bug -- it would increment the line number
prematurely, because it cached buffer->cur in a local variable, but
checked buffer->cur before updating it to figure out if it was at end
of file. We fix up that too.
The EOF token intentionally doesn't have a column number -- it's not a
position on a line, it's a non-existant line.
The testsuite churn is just correcting the EOF location diagnostics.
libcpp/
PR preprocessor/95013
* lex.c (lex_raw_string): Process line notes before incrementing.
Correct incrementing condition. Adjust for new
_cpp_get_fresh_line EOF behaviour.
(_cpp_get_fresh_line): Do not pop buffer at EOF, increment line
instead.
(_cpp_lex_direct): Adjust for new _cpp_get_fresh_line behaviour.
(cpp_directive_only_process): Assert we got a fresh line.
* traditional.c (_cpp_read_logical_line_trad): Adjust for new
_cpp_get_fresh_line behaviour.
Eric Botcazou [Tue, 12 May 2020 20:34:50 +0000 (22:34 +0200)]
Be prepared for more aggregates in gigi
This makes sure that gigi is prepared to handle more aggregates in the
special memset code path.
* sem_aggr.ads (Is_Single_Aggregate): New function.
* sem_aggr.adb (Is_Others_Aggregate): Use local variable.
(Is_Single_Aggregate): New function to recognize an aggregate with
a single association containing a single choice.
* fe.h (Is_Others_Aggregate): Delete.
(Is_Single_Aggregate): New declaration.
* gcc-interface/trans.c (gnat_to_gnu) <N_Assignment_Statement>: Call
Is_Single_Aggregate instead of Is_Others_Aggregate.
Marek Polacek [Tue, 12 May 2020 18:56:13 +0000 (14:56 -0400)]
c++: Function found via ADL when it should not [PR95074]
I noticed that we don't implement [basic.lookup.argdep]/3: quite correctly;
it says "If X (the lookup set produced by unqualified lookup) contains
-- a block-scope function declaration that is not a using-declaration
[...]
then Y (the lookup set produced by ADL) is empty."
but we were still performing ADL in fn1 in the attached test. The
problem was that we were only looking at the first function in the
overload set which in this case happened to be a using-declaration, and
those don't suppress ADL. We have to look through the whole set to find
out if unqualified lookup found a block-scope function declaration, or
a member function declaration.
PR c++/95074
* parser.c (cp_parser_postfix_expression) <case CPP_OPEN_PAREN>: When
looking for a block-scope function declaration, look through the whole
set, not just the first function in the overload set.
Nathan Sidwell [Tue, 12 May 2020 17:54:53 +0000 (10:54 -0700)]
Fix throw specifiers on interface.
I discovered that libitm:
(a) declares __cxa_allocate_exception and friends directly,
(b) doesn't mark them as 'throw()'
(c) doesn't mark the replacment fns _ITM_$foo as nothrow either
We happen to get away with it because of code in the compiler that,
although it checks the parameter types, doesn't check the exception
specification. (One reason being they used to not be part of the
language's type system, but now they are.) I suspect this can lead us
to generate pessimal code later, if we've seen one of these decls
earlier. Anyway, with modules it becomes trickier[*], so I'm trying
to clean it up and not be a problem. I see Jakub fixed part of the
problem
(https://gcc.gnu.org/pipermail/gcc-patches/2018-December/513302.html)
AFAICT, he did fix libitm's decls, but left the lax parm-type checking
in the compiler.
libitm.h is not very informative about specification:
in version 1 of http://www.intel.com/some/path/here.pdf. */
Anyway, it was too fiddly to have libitm pick up the declarations from
libsupc++. Besides it makes them weak declarations, and then provides
definitions for non-elf systems. So this patch adds the expected
'throw()'
* libitm/libitm.h (_ITM_NOTHROW): Define.
(_ITM_cxa_allocate_exception, _ITM_cxa_free_exception)
(_ITM_cxa_begin_catch): Use it.
* eh_cpp.cc: Add throw() to __cxa_allocate_exception,
__cxa_free_exception, __cxa_begin_catch, __cxa_tm_cleanup,
__cxa_get_globals.
(_ITM_cxa_allocate_exception, _ITM_cxa_free_exception)
(_ITM_cxa_begin_catch): Likewise.
H.J. Lu [Tue, 12 May 2020 17:39:42 +0000 (10:39 -0700)]
Enable CET in cross compiler if possible
Don't perform CET run-time check for host when cross compiling. Instead,
enable CET in cross compiler if possible so that it will run on both CET
and non-CET hosts.
config/
PR bootstrap/94998
* cet.m4 (GCC_CET_HOST_FLAGS): Enable CET in cross compiler if
possible.
H.J. Lu [Tue, 12 May 2020 16:23:56 +0000 (09:23 -0700)]
libbacktrace: Enable Intel CET on Intel CET enabled host for jit
Since on Intel CET enabled host, dlopen in Intel CET enabled applications
fails on shared libraries which aren't Intel CET enabled, compile with
-fcf-protection on Intel CET enabled host when jit is enabled to enable
Intel CET on libgccjit.
H.J. Lu [Tue, 12 May 2020 16:19:14 +0000 (09:19 -0700)]
libdecnumber: Enable Intel CET on Intel CET enabled host for jit
Since on Intel CET enabled host, dlopen in Intel CET enabled applications
fails on shared libraries which aren't Intel CET enabled, compile with
-fcf-protection on Intel CET enabled host when jit is enabled to enable
Intel CET on libgccjit.
H.J. Lu [Tue, 12 May 2020 16:17:34 +0000 (09:17 -0700)]
libcpp: Enable Intel CET on Intel CET enabled host for jit
Since on Intel CET enabled host, dlopen in Intel CET enabled applications
fails on shared libraries which aren't Intel CET enabled, compile with
-fcf-protection on Intel CET enabled host when jit is enabled to enable
Intel CET on libgccjit.
H.J. Lu [Tue, 12 May 2020 16:14:52 +0000 (09:14 -0700)]
gcc: Enable Intel CET on Intel CET enabled host for jit
Since on Intel CET enabled host, dlopen in Intel CET enabled applications
fails on shared libraries which aren't Intel CET enabled, compile with
-fcf-protection on Intel CET enabled host when jit is enabled to enable
Intel CET on libgccjit.
H.J. Lu [Tue, 12 May 2020 16:12:26 +0000 (09:12 -0700)]
libcc1: Enable Intel CET on Intel CET enabled host
Since on Intel CET enabled host, dlopen in Intel CET enabled applications
fails on shared libraries which aren't Intel CET enabled, enable Intel
CET in libcc1 on Intel CET enabled host.
where "live debug bind reset of dead var" means the variable is unused
but there were debug binds with a value for them and
"dead debug bind reset" means the variable is unused and there were
only debug bind resets (each reset of the same variable is counted
for both counters). This shows A considerable amount of dead stmts
removed esp. after IPA inlining.
2020-05-12 Richard Biener <rguenther@suse.de>
* tree-ssa-live.c (remove_unused_locals): Remove dead debug
bind resets.
Eric Botcazou [Tue, 12 May 2020 11:14:20 +0000 (13:14 +0200)]
Fix incorrect scalar storage order handling
This fixes an oversight in the new canonicalization code for packable
types: it does not take into account the scalar storage order.
PR ada/95035
* gcc-interface/utils.c (packable_type_hasher::equal): Also compare
the scalar storage order.
(hash_packable_type): Also hash the scalar storage order.
(hash_pad_type): Likewise.
Jakub Jelinek [Tue, 12 May 2020 08:00:32 +0000 (10:00 +0200)]
openmp: Fix up handling of DECL_OMP_PRIVATIZED_MEMBER for bit-fields [PR95063]
The r11-15 change broke this testcase, as it now asserts type is equal to
the type of the DECL_VALUE_EXPR, but for DECL_OMP_PRIVATIZED_MEMBER artificial
vars mapping to bitfields it wasn't. Fixed by changing the
DECL_OMP_PRIVATIZED_MEMBER var type in that case.
2020-05-12 Jakub Jelinek <jakub@redhat.com>
PR c++/95063
* pt.c (tsubst_decl): Deal with DECL_OMP_PRIVATIZED_MEMBER for
a bit-field.
This third patch of three actually fixes the PR. We were using
8-bit BIT_FIELD_REFs to access single-bit elements, and multiplying
the vector index by 8 bits rather than 1 bit.
2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
gcc/
PR tree-optimization/94980
* tree-vect-generic.c (expand_vector_comparison): Use
vector_element_bits_tree to get the element size in bits,
rather than using TYPE_SIZE.
(expand_vector_condition, vector_element): Likewise.
gcc/testsuite/
PR tree-optimization/94980
* gcc.target/i386/pr94980.c: New test.
This patch makes build_replicated_const take the number of bits
in VALUE rather than calculating the width from the element type.
The callers can then use vector_element_bits to calculate the
correct element size from the vector type.
2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
gcc/
PR tree-optimization/94980
* tree-vect-generic.c (build_replicated_const): Take the number
of bits as a parameter, instead of the type of the elements.
(do_plus_minus): Update accordingly, using vector_element_bits
to calculate the correct number of bits.
(do_negate): Likewise.
A lot of code that wants to know the number of bits in a vector
element gets that information from the element's TYPE_SIZE,
which is always equal to TYPE_SIZE_UNIT * BITS_PER_UNIT.
This doesn't work for SVE and AVX512-style packed boolean vectors,
where several elements can occupy a single byte.
This patch introduces a new pair of helpers for getting the true
(possibly sub-byte) size. I made a token attempt to convert obvious
element size calculations, but I'm sure I missed some.
2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
gcc/
PR tree-optimization/94980
* tree.h (vector_element_bits, vector_element_bits_tree): Declare.
* tree.c (vector_element_bits, vector_element_bits_tree): New.
* match.pd: Use the new functions instead of determining the
vector element size directly from TYPE_SIZE(_UNIT).
* tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
* tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
* tree-vect-stmts.c (vect_is_simple_cond): Likewise.
* tree-vect-generic.c (expand_vector_piecewise): Likewise.
(expand_vector_conversion): Likewise.
(expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
a divisor. Convert the dividend to bits to compensate.
* tree-vect-loop.c (vectorizable_live_operation): Call
vector_element_bits instead of open-coding it.
Jakub Jelinek [Tue, 12 May 2020 07:17:09 +0000 (09:17 +0200)]
openmp: Implement discovery of implicit declare target to clauses
This attempts to implement what the OpenMP 5.0 spec in declare target section
says as ammended by the 5.1 changes so far (related to device_type(host)), except
that it doesn't have the device(ancestor: ...) handling yet because we do not
support it yet, and I've left so far out the except lambda note, because I need
that clarified.
2020-05-12 Jakub Jelinek <jakub@redhat.com>
* omp-offload.h (omp_discover_implicit_declare_target): Declare.
* omp-offload.c: Include context.h.
(omp_declare_target_fn_p, omp_declare_target_var_p,
omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
omp_discover_implicit_declare_target): New functions.
* cgraphunit.c (analyze_functions): Call
omp_discover_implicit_declare_target.
Richard Biener [Mon, 11 May 2020 13:26:09 +0000 (15:26 +0200)]
tree-optimization/95045 - fix SM with exit exiting multiple loops
Since we apply SM to an edge which exits multiple loops we have
to make sure to commit insertions on it immediately since otherwise
store order is not preserved.
2020-05-12 Richard Biener <rguenther@suse.de>
PR tree-optimization/95045
* dbgcnt.def (lim): Add debug-counter.
* tree-ssa-loop-im.c: Include dbgcnt.h.
(find_refs_for_sm): Use lim debug counter for store motion
candidates.
(do_store_motion): Rename form store_motion. Commit edge
insertions...
(store_motion_loop): ... here.
(tree_ssa_lim): Adjust.
Ulrich Drepper [Tue, 12 May 2020 05:37:09 +0000 (07:37 +0200)]
Implent C++20 std::atomic_flag::test
* include/bits/atomic_base.h (atomic_flag): Implement test member
function.
* include/std/version: Define __cpp_lib_atomic_flag_test.
* testsuite/29_atomics/atomic_flag/test/explicit.cc: New file.
* testsuite/29_atomics/atomic_flag/test/implicit.cc: New file.
Kelvin Nilsen [Tue, 12 May 2020 02:37:41 +0000 (21:37 -0500)]
rs6000: Built-in cleanups for vec_clzm, vec_ctzm, and vec_gnb
Changes to the built-in specification occurred after early patches
added support for these. The name of vec_clzm became vec_cntlzm,
and vec_ctzm became vec_cnttzm. Four of the overloaded forms of
vec_gnb were removed, and the fourth argument redefined as an
unsigned int, not an unsigned char. This patch reflects those
changes in the code and test cases. Eight of the vec_gnb test
cases are removed as a result.
[gcc]
2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
* config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
(vec_ctzm): Rename to vec_cnttzm.
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Change fourth operand for vec_ternarylogic to require
compatibility with unsigned SImode rather than unsigned QImode.
* config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
Remove overloaded forms of vec_gnb that are no longer needed.
* doc/extend.texi (PowerPC AltiVec Built-in Functions Available
for a Future Architecture): Replace vec_clzm with vec_cntlzm;
replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
vec_gnb; move vec_ternarylogic documentation into this section
and replace const unsigned char with const unsigned int as its
fourth argument.
eric fang [Mon, 20 Apr 2020 08:42:01 +0000 (08:42 +0000)]
runtime: fix TestCallersNilPointerPanic
The expected result of TestCallersNilPointerPanic has changed in
GoLLVM. This CL makes some elements of the expected result optional
so that this test passes in both gccgo and GoLLVM.
Ian Lance Taylor [Mon, 11 May 2020 23:23:44 +0000 (16:23 -0700)]
syscall: append to environment in tests, don't clobber it
This is a partial backport of https://golang.org/cl/233318.
It's only a partial backport because part of the change was
already applied to libgo in CL 193497 as part of the update
to the Go 1.13beta1 release.
git://gcc.gnu.org / gcc.git / log