Alan Modra [Wed, 25 Aug 2004 03:40:27 +0000 (03:40 +0000)]
re PR target/17052 (altivec varargs failure if no optimization)
PR target/17052
* config/rs6000/rs6000.h (machine_function): Remove sysv_varargs_p.
* config/rs6000/sysv4.h (RS6000_VARARGS_AREA): Use
current_function_stdarg in place of sysv_varargs_p.
* config/rs6000/rs6000.c (setup_incoming_varargs): Don't set
sysv_varargs_p.
re PR middle-end/17044 (libgcc2.c:169: internal compiler error: Segmentation fault)
PR middle-end/17044
* tree-ssa-threadupdate.c (redirection_data): Make static.
(thread_block): Use ggc_alloc_cleared to allocate struct
redirection_data. Don't free elements in redirection_data.
Zdenek Dvorak [Tue, 24 Aug 2004 20:50:42 +0000 (22:50 +0200)]
re PR tree-optimization/17016 (ICE with struct passed as reference)
PR tree-optimization/17016
* tree-ssa-loop-niter.c (number_of_iterations_cond,
number_of_iterations_exit): Use POINTER_TYPE_P instead
of testing for POINTER_TYPE.
* config/mips/mips.h (ISA_HAS_INT_CONDMOVE): Delete.
* config/mips/mips.c (print_operand): Fold %B/%b handling into %T/%t,
using the mode of the operand to decide between them.
* config/mips/mips.md (MOVECC): New mode macro.
(ccreg): New mode attribute.
(*mov{si,di,sf,df}_on_{cc,si,di}): Name formerly unnamed patterns.
Redefine using :GPR and :MOVECC. Use %T and %t for the condition.
(mov[sd]icc): Redefine using :GPR.
* config/mips/mips.c (mips_gen_conditional_trap): Fix mode.
* config/mips/mips.md (*conditional_trap[sd]i): Name previously unnamed
patterns. Redefine using :GPR. Give the match_operator a mode.
Use '%2' rather than '%z2' for operand 2.
* config/mips/mips.md (indirect_jump): Use force_reg. Adjust names
of internal patterns.
(indirect_jump[sd]i): Renamed from indirect_jump_internal[12].
Redefine using :P.
(tablejump): Use expand_binop to calculate address. Adjust names
of internal patterns.
(tablejump[sd]i): Renamed from tablejump_internal[12].
Redefine using :P.
(tablejump_mips16[12]): Delete.
Zack Weinberg [Tue, 24 Aug 2004 17:00:54 +0000 (17:00 +0000)]
rtl.def: Wrap MD-only codes in #ifdef GENERATOR_FILE.
* rtl.def: Wrap MD-only codes in #ifdef GENERATOR_FILE.
* gengtype.c: Don't include rtl.h. Define enum rtx_code and
rtx_name, rtx_format arrays by direct reference to rtl.def,
first undefining GENERATOR_FILE. Define enum insn_note and
note_insn_name array by direct reference to insn-notes.def.
(adjust_field_rtx_def): Remove local definition of rtx_name.
Use symbolic names for insn notes.
* Makefile.in (gengtype.o): Update dependencies.
Zack Weinberg [Tue, 24 Aug 2004 16:46:32 +0000 (16:46 +0000)]
basic-block.h (struct basic_block_def): Reorder fields to eliminate interior padding.
* basic-block.h (struct basic_block_def): Reorder fields to
eliminate interior padding. Remove 'partition' field.
(BB_DISABLE_SCHEDULE, BB_HOT_PARTITION, BB_COLD_PARTITION)
(BB_UNPARTITIONED, BB_PARTITION, BB_SET_PARTITION)
(BB_COPY_PARTITION): New macros.
* bb-reorder.c, cfgcleanup.c, cfglayout.c, cfgrtl.c, ifcvt.c
Replace all references to the 'partition' field of a basic
block with new macros.
* insn-notes.def: Delete NOTE_INSN_DISABLE_SCHED_OF_BLOCK.
* final.c (final_scan_insn): Don't handle it.
* modulo-sched.c: Set BB_DISABLE_SCHEDULE flag on g->bb
instead of emitting a NOTE_INSN_DISABLE_SCHED_OF_BLOCK note.
* sched-rgn.c (sched_is_disabled_for_current_region_p):
Look for a BB_DISABLE_SCHEDULE flag on the block instead of a note.
Nathan Sidwell [Tue, 24 Aug 2004 09:04:06 +0000 (09:04 +0000)]
re PR c++/17149 (ICE: tree check: expected record_type or union_type or qual_union_type, have template_type_parm in check_accessibility_of_qualified_id, at cp/semantics.c:1388)
cp:
PR c++/17149
* semantics.c (check_accessibility_of_qualified_id): Defer check
if qualifying_type is a template parameter.
testsuite:
PR c++/17149
* g++.dg/template/access15.C: New.
Mark Mitchell [Tue, 24 Aug 2004 01:45:23 +0000 (01:45 +0000)]
re PR rtl-optimization/16180 (gcc crashes when optimization is turned on)
PR c/16180
* jump.c (duplicate_loop_exit_test): If the location reached by
the unconditional jump at the top of the loop is outside the loop,
then do not treat it as the exit test.
Bryce McKinlay [Mon, 23 Aug 2004 21:31:53 +0000 (21:31 +0000)]
prims.cc (JVMPI_NOTIFY_ALLOC): New macro.
2004-08-23 Bryce McKinlay <mckinlay@redhat.com>
* prims.cc (JVMPI_NOTIFY_ALLOC): New macro. Call jvmpi_notify_alloc
only if jvmpi is enabled.
(jvmpi_notify_alloc): Don't check if jvmpi is enabled here.
(_Jv_AllocObjectNoFinalizer): Use JVMPI_NOTIFY_ALLOC.
(_Jv_AllocString): Likewise.
(_Jv_AllocPtrFreeObject): Likewise.
Andrew Pinski [Mon, 23 Aug 2004 18:28:11 +0000 (18:28 +0000)]
Revert earlier fix for PR 14029
2004-08-22 Andrew Pinski <apinski@apple.com>
Revert:
2004-08-22 Andrew Pinski <apinski@apple.com>
PR c++/14029
* typeck.c (build_unary_op): Use &a.b if the foldded lowered
expression is not constant.
David Daney [Mon, 23 Aug 2004 16:49:17 +0000 (16:49 +0000)]
re PR libffi/13141 (FAIL: InvokeReturn output - source compiled test <libffi problem>)
2004-08-23 David Daney <daney@avtrex.com>
PR libgcj/13141
* src/mips/ffitarget.h (FFI_O32_SOFT_FLOAT): New ABI.
* src/mips/ffi.c (ffi_prep_args): Fix alignment calculation.
(ffi_prep_cif_machdep): Handle FFI_O32_SOFT_FLOAT floating point
parameters and return types.
(ffi_call): Handle FFI_O32_SOFT_FLOAT ABI.
(ffi_prep_closure): Ditto.
(ffi_closure_mips_inner_O32): Handle FFI_O32_SOFT_FLOAT ABI, fix
alignment calculations.
* src/mips/o32.S (ffi_closure_O32): Don't use floating point
instructions if FFI_O32_SOFT_FLOAT, make stack frame ABI compliant.
mips.md (length): Don't use mips_fetch_insns for indexed loads and stores.
* config/mips/mips.md (length): Don't use mips_fetch_insns for indexed
loads and stores.
(*lwxc1_<mode>, *ldxc1_<mode>, *swxc1_<mode>, *sdxc1_<mode>): Name
formerly unnamed patterns. Redefine using :P for the address. Remove
explicit length attributes.
Zdenek Dvorak [Mon, 23 Aug 2004 08:17:20 +0000 (10:17 +0200)]
tree-ssa-loop-im.c (fem_single_reachable_address, [...]): New functions.
* tree-ssa-loop-im.c (fem_single_reachable_address, for_each_memref):
New functions.
(single_reachable_address): Use them.
(schedule_sm): Add dump.
(is_call_clobbered_ref): New function.
(determine_lsm_reg): Check whether the reference is call clobbered.
Only work for gimple_reg_type values.
mips.md (UNSPEC_[LS][WD][LR]): Delete in favor of...
* config/mips/mips.md (UNSPEC_[LS][WD][LR]): Delete in favor of...
(UNSPEC_{LOAD,STORE}_{LEFT,RIGHT}): ...these new constants. Shuffle
later constants to cover the gap.
(load, store): New mode attributes.
(mov_l[wd]l, mov_l[wd]r, mov_s[wd]l, mov_s[wd]r): Redefine using :GPR.
Use new unspec constants.
* config/mips/mips.md (one_cmpl[sd]i2): Redefine using :GPR.
(and[sd]3, ior[sd]i3, xor[sd]i3): Likewise. Change 32-bit patterns
to use register_operand rather than uns_arith_operand as the predicate
for operand 1. Remove redundant MIPS16 force_reg() for operand 1.
(*and[sd]i3, *ior[sd]i3, *xor[sd]i3): Name formerly unnamed patterns.
Redefine using :GPR. Make same predicate change here. Extend the
commutativity of operands 1 and 2 from the SImode version to the
DImode one.
(*and[sd]i3_mips16, *ior[sd]i3_mips16, *xor[sd]i3_mips16): Likewise,
but with no predicate changes.
(*nor[sd]i3): Redefine using :GPR.
* config/mips/mips.h (ISA_HAS_DCLZ_DCLO): Delete.
* config/mips/mips.md (abs[sd]i2): Redefine using :GPR. Only use
branch-likely insns for absdi2 if GENERATE_BRANCHLIKELY. Use "%."
rather than "%z2" (with a fake const0_rtx for operand 2).
(ffs[sd]i2): Redefine using :GPR.
(clz[sd]i2): Likewise. Use ISA_HAS_CLO_CLZ for the 64-bit case.
* config/mips/mips.md (any_extend): New code macro.
(u, su): New code attributes.
({,u}mulsidi3, {,u}mulsidi3_32bit_internal, {,u}mulsidi3_32bit_r4000)
({u,s}mulsi3_highpart, {u,s}mulsi3_highpart_internal)
({u,s}mulsi3_highpart_mulhi_internal, {s,u}muldi3_highpart)
(*{s,u}mul_acc_di): Redefine using any_extend.
(*{,u}muls_di, *{s,u}msac_di): Likewise. Change names of patterns
to reflect real insn names.
(*mulsidi3_64bit, *mulsidi3_64bit_parts): Replace use of match_operator
with an any_extend template.
({u,s}mulsi3_highpart_neg_mulhi_internal): Redefine using any_extend.
Add '*' to name.
config.gcc (mips-*-*): Remove definitions of MASK_GAS and OBJECT_FORMAT_ELF.
* config.gcc (mips-*-*): Remove definitions of MASK_GAS and
OBJECT_FORMAT_ELF. Set MASK_SPLIT_ADDR by default if using GNU ld.
* config/mips/mips.h (MASK_GAS): Delete. Shuffle later masks down.
(TARGET_GAS, TARGET_MIPS_AS): Delete.
(TARGET_GPWORD): Define to true for n32 on IRIX.
(TARGET_SWITCHES): Remove -mmips-as. Turn -mgas into a no-op.
(MIPS_AS_ASM_SPEC, SUBTARGET_MIPS_AS_ASM_SPEC): Delete.
(GAS_ASM_SPEC): Delete, folding into ASM_SPEC.
(ASM_ABI_DEFAULT_SPEC, TARGET_ASM_SPEC): Delete.
(MDEBUG_ASM_SPEC): Delete, folding into...
(SUBTARGET_ASM_DEBUGGING_SPEC): ...here.
(ASM_SPEC): Inline old GAS_ASM_SPEC. Use GNU names for ABI switches.
(EXTRA_SPECS): Remove mips_as_asm_spec, gas_asm_spec, target_asm_spec,
subtarget_mips_as_asm_spec, mdebug_asm_spec. Use MULTILIB_ABI_DEFAULT
to define asm_abi_default_spec.
(ASM_STABS_OP, ASM_STABN_OP, ASM_STABD_OP): Delete.
(TARGET_ASM_SELECT_SECTION): Delete.
* config/mips/mips.c (MIPS_MAX_FIRST_STACK_STEP): Define to 0x7ff0
for non-mips16 code, removing previous workaround for SGI assemblers.
(TARGET_ASM_INTEGER, mips_assemble_integer): Delete.
(TARGET_ASM_ALIGNED_DI_OP): Define this instead.
(override_options): Remove !TARGET_GAS and !have_named_sections code.
(print_operand): Fold TARGET_GAS conditionals into asm strings.
(mips_output_filename): Remove !TARGET_GAS code. Replace use of
ASM_STABS_OP and ASM_STABN_OP.
(mips_file_start): Remove TARGET_MIPS_AS/TARGET_GAS checks.
(mips_output_aligned_decl_common): Remove mention of SGI o32 assembler.
(mips_output_function_prologue): Remove !TARGET_GAS code.
(mips_select_rtx_section): Remove !have_named_sections code.
(mips_select_section): Delete.
* config/mips/mips.md (trap): Remove !TARGET_GAS check.
* config/mips/linux.h (TARGET_DEFAULT): Remove use of MASK_GAS.
* config/mips/sdb.h (PUT_SDB_DEF, PUT_SDB_PLAIN_DEF): Delete.
(PUT_SDB_BLOCK_START, PUT_SDB_BLOCK_END): Fold TARGET_GAS conditional.
* config/mips/vxworks.h (ASM_SPEC): As for mips.h.
* config/mips/windiss.h (ASM_SPEC): Likewise.
testsuite/
* gcc.dg/special/mips-abi.exp: Expect gcc to pass the GNU ABI flags
to the assembler. Simplify test accordingly.
(asm_abi_flags): Use GNU names.
(check_mips_abi, default_abi): Use string matches against "-mabi=*"
to check for ABI flags.
* read-rtl.c (map_value, mapping, macro_group): New structures.
(BELLWETHER_CODE): New macro.
(modes, codes, bellwether_codes): New variables.
(find_mode, uses_mode_macro_p, apply_mode_macro, find_code)
(uses_code_macro_p, apply_code_macro, apply_macro_to_string)
(apply_macro_to_rtx, uses_macro_p, add_condition_to_string)
(add_condition_to_rtx, apply_macro_traverse, add_mapping)
(add_map_value, initialize_macros): New functions.
(def_hash, def_hash_eq_p): Generalize to anything that points to,
or starts with, a char * field.
(find_macro, read_mapping, check_code_macro): New functions.
(read_rtx_1): New, split out from read_rtx. Handle the new
define_{mode,code}_{macro,attr} constructs. Use find_macro
to parse the name of a code or mode. Use BELLWETHER_CODE to
extract the format and to choose a suitable code for rtx_alloc.
Modify recursive invocations to use read_rtx_1.
(read_rtx): Call initialize_macros. Apply code and mode macros
to the rtx returned by read_rtx_1. Cache everything after the
first macro expansion for subsequent read_rtx calls.
* doc/md.texi: Document new .md constructs.
* config/mips/mips.md (GPR): New mode macro.
(d, si8_di5): New mode attributes.
(any_cond): New code macro.
(add[sd]i3): Redefine using :GPR.
(*add[sd]i3): Likewise, renaming from add[sd]i3_internal.
(*add[sd]i3_sp[12], *add<mode>3_mips16): Redefine using :GPR, naming
previously unnamed MIPS16 patterns.
(*addsi3_extended): Renamed from addsi3_internal_2. Fix overly long
lines. Don't match (plus (const_int 0) ...).
(*addsi3_extended_mips16): Name previously unnamed MIPS16 pattern.
Use a define_split to generate the addition.
(sub[sd]i3): Redefine using :GPR. Turn subsi3 into a define_insn.
(subsi3_internal): Delete.
(*subsi3_extended): Renamed from subsi3_internal_2.
(bunordered, bordered, bunlt, bunge, buneq, bltgt, bunle, bungt)
(beq, bne, bgt, bge, blt, ble, bgtu, bgeu, bltu, bleu): Redefine
using an any_cond template.
Andrew Pinski [Mon, 23 Aug 2004 03:12:38 +0000 (03:12 +0000)]
re PR tree-optimization/15262 ([tree-ssa] Alias analyzer cannot handle addressable fields)
2004-08-22 Andrew Pinski <apinski@apple.com>
PR c/15262
* c-typeck.c (build_unary_op): Use &a.b if the foldded lowered
expression is not constant.
(c_finish_return): Do not go through INDIRECT_REF when looking
for the inner expression of an ADDR_EXPR for warning about.
2004-08-22 Andrew Pinski <apinski@apple.com>
* g++.dg/opt/pr14029.C: New test.
* gcc.c-torture/execute/pr15262.c: New test.
2004-08-22 Andrew Pinski <apinski@apple.com>
PR c++/14029
* typeck.c (build_unary_op): Use &a.b if the foldded lowered
expression is not constant.
re PR middle-end/17075 (miscompilation with tail calls in cfgexpand)
PR 17075
* cfgexpand.c (expand_gimple_tailcall): Detect when we can both
create new blocks and fall through.
(expand_gimple_basic_block): Update to match.
Ulrich Weigand [Sun, 22 Aug 2004 22:09:12 +0000 (22:09 +0000)]
reload.c (find_reloads_address): Make return value tri-state.
* reload.c (find_reloads_address): Make return value tri-state.
Return -1 if LEGITIMIZE_RELOAD_ADDRESS succeeded.
(find_reloads): Assume that reloaded addresses match 'o' or
EXTRA_MEMORY_CONSTRAINT constraints only if find_reloads_address
returned 1 (not -1). Omit optional reloads for address operands
only if find_reloads_address returned 1 (not -1).
* tree.h (SAVE_EXPR_RESOLVED_P): New.
* gimplify.c (gimplify_save_expr): Use it.
* expr.c (expand_expr_real_1): Likewise. Also set DECL_IGNORED_P
on the temporary variable.
Paolo Carlini [Sun, 22 Aug 2004 17:55:51 +0000 (17:55 +0000)]
locale_facets.tcc (num_put<>::do_put(bool)): Cast to a signed type, long according to the resolution of DR 359.
2004-08-22 Paolo Carlini <pcarlini@suse.de>
* include/bits/locale_facets.tcc (num_put<>::do_put(bool)): Cast
to a signed type, long according to the resolution of DR 359.
* testsuite/22_locale/num_put/put/char/9.cc: New.
* testsuite/22_locale/num_put/put/wchar_t/9.cc: New.
* include/bits/locale_facets.tcc (num_put<>::do_put(const void*)):
Simplify a bit: no need to clear showpos.