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[gcc.git] / gcc / config / riscv / riscv.cc

2023-05-22	Juzhe-Zhong	RISC-V: Reorganize the code of CONST_VECTOR handling...	blob \| commitdiff \| raw
2023-05-20	Die Li	Fix riscv_expand_conditional_move.	blob \| commitdiff \| raw \| diff to current
2023-05-19	Vineet Gupta	RISC-V: improve codegen for large constants with same...	blob \| commitdiff \| raw \| diff to current
2023-05-19	Robin Dapp	RISC-V: Allow more loading of const vectors.	blob \| commitdiff \| raw \| diff to current
2023-05-18	Bernhard Reutner...	gcc/config/*: use _P() defines from tree.h	blob \| commitdiff \| raw \| diff to current
2023-05-17	Jin Ma	RISC-V: Remove trailing spaces on lines.	blob \| commitdiff \| raw \| diff to current
2023-05-17	Juzhe-Zhong	RISC-V: Add mode switching target hook to insert roundi...	blob \| commitdiff \| raw \| diff to current
2023-05-16	Juzhe-Zhong	RISC-V: Add FRM and rounding mode operand into floating...	blob \| commitdiff \| raw \| diff to current
2023-05-15	Juzhe-Zhong	RISC-V: Add rounding mode operand for fixed-point patterns	blob \| commitdiff \| raw \| diff to current
2023-05-15	Juzhe-Zhong	RISC-V: Support TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGN...	blob \| commitdiff \| raw \| diff to current
2023-05-11	Robin Dapp	RISC-V: Allow vector constants in riscv_const_insns.	blob \| commitdiff \| raw \| diff to current
2023-05-11	Robin Dapp	RISC-V: Clarify vlmax and length handling.	blob \| commitdiff \| raw \| diff to current
2023-05-11	Juzhe-Zhong	RISC-V: Support const series vector for RVV auto-vector...	blob \| commitdiff \| raw \| diff to current
2023-05-10	Juzhe-Zhong	RISC-V: Fix incorrect implementation of TARGET_VECTORIZ...	blob \| commitdiff \| raw \| diff to current
2023-05-08	Juzhe-Zhong	RISC-V: Fix ugly && incorrect codes of RVV auto-vectori...	blob \| commitdiff \| raw \| diff to current
2023-05-06	Michael Collison	RISC-V:autovec: Add target vectorization hooks	blob \| commitdiff \| raw \| diff to current
2023-05-06	Juzhe-Zhong	RISC-V: Enable basic RVV auto-vectorization support.	blob \| commitdiff \| raw \| diff to current
2023-05-03	Ju-Zhe Zhong	RISC-V: Add tuple types support	blob \| commitdiff \| raw \| diff to current
2023-05-02	Patrick O'Neill	RISC-V: Weaken LR/SC pairs	blob \| commitdiff \| raw \| diff to current
2023-05-02	Patrick O'Neill	RISC-V: Eliminate AMO op fences	blob \| commitdiff \| raw \| diff to current
2023-05-02	Patrick O'Neill	RISC-V: Add AMO release bits	blob \| commitdiff \| raw \| diff to current
2023-05-02	Patrick O'Neill	RISC-V: Eliminate SYNC memory models	blob \| commitdiff \| raw \| diff to current
2023-04-29	Fei Gao	RISC-V: decouple stack allocation for rv32e w/o save...	blob \| commitdiff \| raw \| diff to current
2023-04-28	Matevos Mehrabyan	RISC-V: Add divmod expansion support	blob \| commitdiff \| raw \| diff to current
2023-04-26	Patrick O'Neill	RISC-V: Fix sync.md and riscv.cc whitespace errors	blob \| commitdiff \| raw \| diff to current
2023-04-26	Patrick O'Neill	RISCV: Inline subword atomic ops	blob \| commitdiff \| raw \| diff to current
2023-04-26	Pan Li	RISC-V: Legitimise the const0_rtx for RVV load/store...	blob \| commitdiff \| raw \| diff to current
2023-04-25	Vineet Gupta	riscv: relax splitter restrictions for creating pseudos	blob \| commitdiff \| raw \| diff to current
2023-04-19	Juzhe-Zhong	RISC-V: Support 128 bit vector chunk	blob \| commitdiff \| raw \| diff to current
2023-04-18	Fei Gao	RISC-V: make the stack manipulation codes more readable.	blob \| commitdiff \| raw \| diff to current
2023-04-17	Fei Gao	RISC-V: optimize stack manipulation in save-restore	blob \| commitdiff \| raw \| diff to current
2023-04-17	Fei Gao	RISC-V: add a new parameter in riscv_first_stack_step.	blob \| commitdiff \| raw \| diff to current
2023-04-16	Jeff Law	[committed] [PR target/109508] Adjust conditional move...	blob \| commitdiff \| raw \| diff to current
2023-04-11	Yanzhang Wang	RISC-V: Fix regression of -fzero-call-used-regs=all...	blob \| commitdiff \| raw \| diff to current
2023-04-05	Li Xu	RISC-V: Fix typos	blob \| commitdiff \| raw \| diff to current
2023-03-23	Pan Li	RISC-V: Bugfix for rvv bool mode size adjustment	blob \| commitdiff \| raw \| diff to current
2023-03-15	Christoph Müllner	riscv: thead: Add support for the XTheadMemPair ISA...	blob \| commitdiff \| raw \| diff to current
2023-03-15	Christoph Müllner	riscv: thead: Add support for the XTheadFmv ISA extension	blob \| commitdiff \| raw \| diff to current
2023-03-15	Christoph Müllner	riscv: thead: Add support for the XTheadCondMov ISA...	blob \| commitdiff \| raw \| diff to current
2023-03-15	Christoph Müllner	riscv: thead: Add support for the XTheadBb ISA extension	blob \| commitdiff \| raw \| diff to current
2023-03-15	Christoph Müllner	riscv: thead: Add support for the XTheadBs ISA extension	blob \| commitdiff \| raw \| diff to current
2023-03-10	Ju-Zhe Zhong	RISC-V: Add fault first load C/C++ support	blob \| commitdiff \| raw \| diff to current
2023-03-07	Pan Li	RISC-V: Bugfix for rvv bool mode precision adjustment	blob \| commitdiff \| raw \| diff to current
2023-03-05	Vineet Gupta	RISC-V: costs: miscomputed shiftadd_cost triggering...	blob \| commitdiff \| raw \| diff to current
2023-02-15	Ju-Zhe Zhong	RISC-V: Add integer compare C/C++ intrinsic support	blob \| commitdiff \| raw \| diff to current
2023-02-12	Jin Ma	RISC-V: Change the generation mode of ADJUST_SP_RTX...	blob \| commitdiff \| raw \| diff to current
2023-02-12	Ju-Zhe Zhong	RISC-V: Add vnsrl/vnsra/vncvt/vmerge/vmv C/C++ support	blob \| commitdiff \| raw \| diff to current
2023-02-03	Monk Chiang	RISC-V: Remove unnecessary register class.	blob \| commitdiff \| raw \| diff to current
2023-01-31	Ju-Zhe Zhong	RISC-V: Add integer binary vv C/C++ API support	blob \| commitdiff \| raw \| diff to current
2023-01-16	Jakub Jelinek	Update copyright years.	blob \| commitdiff \| raw \| diff to current
2022-12-27	Christoph Müllner	riscv: Restructure callee-saved register save/restore...	blob \| commitdiff \| raw \| diff to current
2022-12-19	Ju-Zhe Zhong	RISC-V: Change vlmul printing rule	blob \| commitdiff \| raw \| diff to current
2022-12-16	Palmer Dabbelt	RISC-V: Fix up some wording in the mcpu/mtune comment	blob \| commitdiff \| raw \| diff to current
2022-12-01	Ju-Zhe Zhong	RISC-V: Add attributes for VSETVL PASS	blob \| commitdiff \| raw \| diff to current
2022-12-01	Ju-Zhe Zhong	RISC-V: Add duplicate vector support.	blob \| commitdiff \| raw \| diff to current
2022-11-28	Sinan	riscv: improve cost model for loading 64bit constant...	blob \| commitdiff \| raw \| diff to current
2022-11-28	Maciej W. Rozycki	RISC-V: Avoid redundant sign-extension for SImode SGE...	blob \| commitdiff \| raw \| diff to current
2022-11-28	Fei Gao	RISC-V: fix stack access before allocation.	blob \| commitdiff \| raw \| diff to current
2022-11-22	Jeff Law	Fix recent rvv/base/spill testcase failures	blob \| commitdiff \| raw \| diff to current
2022-11-18	Philipp Tomsich	RISC-V: Optimize slli(.uw)? + addw + zext.w into sh...	blob \| commitdiff \| raw \| diff to current
2022-11-17	mtsamis	Enable shrink wrapping for the RISC-V target.	blob \| commitdiff \| raw \| diff to current
2022-11-17	Jia-Wei Chen	RISC-V: Optimize RVV epilogue logic.	blob \| commitdiff \| raw \| diff to current
2022-11-14	Philipp Tomsich	Revert "RISC-V: Add basic support for the Ventana-VT1...	blob \| commitdiff \| raw \| diff to current
2022-11-14	Philipp Tomsich	Revert "RISC-V: Add instruction fusion (for ventana...	blob \| commitdiff \| raw \| diff to current
2022-11-14	Philipp Tomsich	RISC-V: Add instruction fusion (for ventana-vt1)	blob \| commitdiff \| raw \| diff to current
2022-11-14	Philipp Tomsich	RISC-V: Add basic support for the Ventana-VT1 core	blob \| commitdiff \| raw \| diff to current
2022-11-13	Philipp Tomsich	RISC-V: costs: support shift-and-add in strength-reduction	blob \| commitdiff \| raw \| diff to current
2022-11-11	Ju-Zhe Zhong	RISC-V: Add RVV registers register spilling	blob \| commitdiff \| raw \| diff to current
2022-11-09	Philipp Tomsich	RISC-V: costs: handle BSWAP	blob \| commitdiff \| raw \| diff to current
2022-10-28	Joseph Myers	c: tree: target: C2x (...) function prototypes and...	blob \| commitdiff \| raw \| diff to current
2022-10-27	Jiawei	RISC-V: Limit regs use for z*inx extension.	blob \| commitdiff \| raw \| diff to current
2022-10-26	Ju-Zhe Zhong	RISC-V: Fix epilogue generation for barrier.	blob \| commitdiff \| raw \| diff to current
2022-10-26	Ju-Zhe Zhong	RISC-V: ADJUST_NUNITS according to -march.	blob \| commitdiff \| raw \| diff to current
2022-10-26	Ju-Zhe Zhong	RISC-V: Support load/store in mov<mode> pattern for...	blob \| commitdiff \| raw \| diff to current
2022-10-24	Kito Cheng	RISC-V: Support --target-help for -mcpu/-mtune	blob \| commitdiff \| raw \| diff to current
2022-10-24	Ju-Zhe Zhong	RISC-V: Support (set (mem) (const_poly_int))	blob \| commitdiff \| raw \| diff to current
2022-10-21	Ju-Zhe Zhong	RISC-V: Add RVV vsetvl/vsetvlmax intrinsics and tests.	blob \| commitdiff \| raw \| diff to current
2022-10-05	Ju-Zhe Zhong	RISC-V: Introduce RVV header to enable builtin types	blob \| commitdiff \| raw \| diff to current
2022-09-30	Palmer Dabbelt	RISC-V: Support -fexcess-precision=16	blob \| commitdiff \| raw \| diff to current
2022-09-30	Jiawei	RISC-V: Add '-m[no]-csr-check' option in gcc.	blob \| commitdiff \| raw \| diff to current
2022-09-28	Ju-Zhe Zhong	RISC-V: Add ABI-defined RVV types.	blob \| commitdiff \| raw \| diff to current
2022-09-23	zhongjuzhe	RISC-V: Support poly move manipulation and selftests.	blob \| commitdiff \| raw \| diff to current
2022-09-05	Kito Cheng	RISC-V: Fix division instructions for `m` with `zmmul...	blob \| commitdiff \| raw \| diff to current
2022-09-05	LiaoShihua	RISC-V: Support Zmmul extension	blob \| commitdiff \| raw \| diff to current
2022-09-01	zhongjuzhe	RISC-V: Add vector registers in TARGET_CONDITIONAL_REGI...	blob \| commitdiff \| raw \| diff to current
2022-09-01	zhongjuzhe	RISC-V: Add csrr vlenb instruction.	blob \| commitdiff \| raw \| diff to current
2022-09-01	zhongjuzhe	RISC-V: Fix riscv_vector_chunks configuration according...	blob \| commitdiff \| raw \| diff to current
2022-08-29	Kito Cheng	RISC-V: Suppress -Wclass-memaccess warning	blob \| commitdiff \| raw \| diff to current
2022-08-29	zhongjuzhe	RISC-V: Add RVV registers	blob \| commitdiff \| raw \| diff to current
2022-08-24	Andrew Pinski	[RISCV] Fix PR 106586: riscv32 vs ZBS	blob \| commitdiff \| raw \| diff to current
2022-08-24	Andrew Pinski	[RISCV] Add %~ to print w if TARGET_64BIT and use it	blob \| commitdiff \| raw \| diff to current
2022-08-24	Andrew Pinski	[RISCV] Add the list of operand modifiers to riscv...	blob \| commitdiff \| raw \| diff to current
2022-08-18	zhongjuzhe	RISC-V: Add runtime invariant support	blob \| commitdiff \| raw \| diff to current
2022-08-16	Kito Cheng	RISC-V: Support zfh and zfhmin extension	blob \| commitdiff \| raw \| diff to current
2022-08-16	Kito Cheng	RISC-V: Support _Float16 type.	blob \| commitdiff \| raw \| diff to current
2022-07-27	Maciej W. Rozycki	RISC-V: Add RTX costs for `if_then_else' expressions	blob \| commitdiff \| raw \| diff to current
2022-06-02	Philipp Tomsich	RISC-V: bitmanip: improve constant-loading for (1ULL...	blob \| commitdiff \| raw \| diff to current
2022-05-24	Vineet Gupta	RISC-V: Inhibit FP <--> int register moves via tune...	blob \| commitdiff \| raw \| diff to current
2022-05-23	Vineet Gupta	RISC-V: Enable TARGET_SUPPORTS_WIDE_INT	blob \| commitdiff \| raw \| diff to current
2022-03-15	Jakub Jelinek	riscv: Allow -Wno-psabi to turn off ABI warnings [PR91229]	blob \| commitdiff \| raw \| diff to current
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