From: Kazu Hirata <kazu@cs.umass.edu>
Date: Mon, 23 Jun 2003 03:37:36 +0000 (+0000)
Subject: h8300.c (output_simode_bld): Use rotxl.l to store into bit 0.
X-Git-Tag: releases/gcc-3.4.0~5553
X-Git-Url: https://gcc.gnu.org/git/?a=commitdiff_plain;ds=sidebyside;h=802a99073ffb4a56ad84ef91341815bdcf1580e4;p=gcc.git

h8300.c (output_simode_bld): Use rotxl.l to store into bit 0.

	* config/h8300/h8300.c (output_simode_bld): Use rotxl.l to
	store into bit 0.
	* config/h8300/h8300.md (*extzv_1_r_h8300hs): Change cc of the
	second alternative to set_znv.
	(*extzv_1_r_inv_h8300hs): Likewise.

From-SVN: r68358
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d26584afce82..c4cd71ea1f80 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2003-06-22  Kazu Hirata  <kazu@cs.umass.edu>
+
+	* config/h8300/h8300.c (output_simode_bld): Use rotxl.l to
+	store into bit 0.
+	* config/h8300/h8300.md (*extzv_1_r_h8300hs): Change cc of the
+	second alternative to set_znv.
+	(*extzv_1_r_inv_h8300hs): Likewise.
+
 2003-06-23  Hans-Peter Nilsson  <hp@bitrange.com>
 
 	* configure.in (in_tree_gas): Find out here whether GAS is ELF,
diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c
index d7a55f17cf27..e82ee9552b33 100644
--- a/gcc/config/h8300/h8300.c
+++ b/gcc/config/h8300/h8300.c
@@ -4039,7 +4039,7 @@ output_simode_bld (int bild, rtx operands[])
 	output_asm_insn ("xor.l\t%S0,%S0", operands);
 
       /* Perform the bit store.  */
-      output_asm_insn ("bst\t#0,%w0", operands);
+      output_asm_insn ("rotxl.l\t%S0", operands);
     }
 
   /* All done.  */
diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index cae57370bf0c..dc323bb92f0d 100644
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -2533,7 +2533,7 @@
   "(TARGET_H8300H || TARGET_H8300S)
    && INTVAL (operands[2]) < 16"
   "* return output_simode_bld (0, operands);"
-  [(set_attr "cc" "clobber,clobber")
+  [(set_attr "cc" "set_znv,set_znv")
    (set_attr "length" "8,6")])
 
 ;;
@@ -2563,7 +2563,7 @@
    && INTVAL (operands[2]) < 16
    && (1 << INTVAL (operands[2])) == INTVAL (operands[3])"
   "* return output_simode_bld (1, operands);"
-  [(set_attr "cc" "clobber,clobber")
+  [(set_attr "cc" "set_znv,set_znv")
    (set_attr "length" "8,6")])
 
 (define_expand "insv"