reload1.c (reload_cse_move2add): Use STRICT_LOW_PART if PLUS does not reduce the...

	* reload1.c (reload_cse_move2add): Use STRICT_LOW_PART if PLUS
	does not reduce the cost of SET.

From-SVN: r63426

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3bc23a7ecf4390e5aa57b9e8ba7d60fcd5e39109..d985ed55658b4222026049d8e8f26a34864f2fc5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2003-02-25  Kazu Hirata  <kazu@cs.umass.edu>
+
+       * reload1.c (reload_cse_move2add): Use STRICT_LOW_PART if PLUS
+       does not reduce the cost of SET.
+
 2003-02-25  Franz Sirl  <Franz.Sirl-kernel@lauterbach.com>
 
        PR target/9732

diff --git a/gcc/reload1.c b/gcc/reload1.c
index 441a447f01441768baefab7228b0f7bedaec437f..31ede252cfe94f97caee3184f59d23ee676c1b10 100644 (file)
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -9159,7 +9159,12 @@ reload_cse_move2add (first)
                 to
                                  (set (REGX) (CONST_INT A))
                                  ...
-                                 (set (REGX) (plus (REGX) (CONST_INT B-A)))  */
+                                 (set (REGX) (plus (REGX) (CONST_INT B-A)))
+                or
+                                 (set (REGX) (CONST_INT A))
+                                 ...
+                                 (set (STRICT_LOW_PART (REGX)) (CONST_INT B))
+             */
 
              if (GET_CODE (src) == CONST_INT && reg_base_reg[regno] < 0)
                {
@@ -9179,6 +9184,36 @@ reload_cse_move2add (first)
                           && have_add2_insn (reg, new_src))
                    success = validate_change (insn, &PATTERN (insn),
                                               gen_add2_insn (reg, new_src), 0);
+                 else
+                   {
+                     enum machine_mode narrow_mode;
+                     for (narrow_mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
+                          narrow_mode != GET_MODE (reg);
+                          narrow_mode = GET_MODE_WIDER_MODE (narrow_mode))
+                       {
+                         if (have_insn_for (STRICT_LOW_PART, narrow_mode)
+                             && ((reg_offset[regno]
+                                  & ~GET_MODE_MASK (narrow_mode))
+                                 == (INTVAL (src)
+                                     & ~GET_MODE_MASK (narrow_mode))))
+                           {
+                             rtx narrow_reg = gen_rtx_REG (narrow_mode,
+                                                           REGNO (reg));
+                             rtx narrow_src =
+                               GEN_INT (trunc_int_for_mode (INTVAL (src),
+                                                            narrow_mode));
+                             rtx new_set =
+                               gen_rtx_SET (VOIDmode,
+                                            gen_rtx_STRICT_LOW_PART (VOIDmode,
+                                                                     narrow_reg),
+                                            narrow_src);
+                             success = validate_change (insn, &PATTERN (insn),
+                                                        new_set, 0);
+                             if (success)
+                               break;
+                           }
+                       }
+                   }
                  reg_set_luid[regno] = move2add_luid;
                  reg_mode[regno] = GET_MODE (reg);
                  reg_offset[regno] = INTVAL (src);