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arm: [MVE intrinsics] factorize vfmaq vfmsq vfmasq
authorChristophe Lyon <christophe.lyon@arm.com>
Tue, 28 Feb 2023 14:36:42 +0000 (14:36 +0000)
committerChristophe Lyon <christophe.lyon@arm.com>
Fri, 12 May 2023 10:40:39 +0000 (12:40 +0200)
Factorize vmvnq builtins so that they use parameterized names.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
VFMSQ_M_F.
(MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
(MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
(mve_insn): Add vfma, vfmas, vfms.
* config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
into ...
(@mve_<mve_insn>q_f<mode>): ... this.
(mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
(@mve_<mve_insn>q_n_f<mode>): ... this.
(mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
@mve_<mve_insn>q_m_f<mode>.
(mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
@mve_<mve_insn>q_m_n_f<mode>.

gcc/config/arm/iterators.md patch | blob | blame | history
gcc/config/arm/mve.md patch | blob | blame | history

diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md
index 7fbfea49ff3d20a33b6a582c2700a9211d20688b..022744f04d9390d8f323d100da851667598aa780 100644 (file)
--- a/gcc/config/arm/iterators.md
+++ b/gcc/config/arm/iterators.md
@@ -577,6 +577,8 @@
 (define_int_iterator MVE_FP_M_BINARY   [
                     VABDQ_M_F
                     VADDQ_M_F
+                    VFMAQ_M_F
+                    VFMSQ_M_F
                     VMAXNMQ_M_F
                     VMINNMQ_M_F
                     VMULQ_M_F
@@ -592,6 +594,8 @@
 
 (define_int_iterator MVE_FP_M_N_BINARY [
                     VADDQ_M_N_F
+                    VFMAQ_M_N_F
+                    VFMASQ_M_N_F
                     VMULQ_M_N_F
                     VSUBQ_M_N_F
                     ])
@@ -659,6 +663,14 @@
                     VCMPNEQ_M_N_F
                     ])
 
+(define_int_iterator MVE_VFMxQ_F [
+                    VFMAQ_F VFMSQ_F
+                    ])
+
+(define_int_iterator MVE_VFMAxQ_N_F [
+                    VFMAQ_N_F VFMASQ_N_F
+                    ])
+
 (define_int_iterator MVE_VMAXVQ_VMINVQ [
                     VMAXAVQ_S
                     VMAXVQ_S VMAXVQ_U
@@ -917,6 +929,14 @@
                 (VDUPQ_M_N_S "vdup") (VDUPQ_M_N_U "vdup") (VDUPQ_M_N_F "vdup")
                 (VDUPQ_N_S "vdup") (VDUPQ_N_U "vdup") (VDUPQ_N_F "vdup")
                 (VEORQ_M_S "veor") (VEORQ_M_U "veor") (VEORQ_M_F "veor")
+                (VFMAQ_F "vfma")
+                (VFMAQ_M_F "vfma")
+                (VFMAQ_M_N_F "vfma")
+                (VFMAQ_N_F "vfma")
+                (VFMASQ_M_N_F "vfmas")
+                (VFMASQ_N_F "vfmas")
+                (VFMSQ_F "vfms")
+                (VFMSQ_M_F "vfms")
                 (VHADDQ_M_N_S "vhadd") (VHADDQ_M_N_U "vhadd")
                 (VHADDQ_M_S "vhadd") (VHADDQ_M_U "vhadd")
                 (VHADDQ_N_S "vhadd") (VHADDQ_N_U "vhadd")
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index 57ba65d3c76ca3a5a4687d6c16a88c0089b877ca..b87798730a2525f0cb805e5d05abdbe5e08892b1 100644 (file)
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -2246,65 +2246,36 @@
    (set_attr "length""8")])
 
 ;;
-;; [vfmaq_f])
+;; [vfmaq_f]
+;; [vfmsq_f]
 ;;
-(define_insn "mve_vfmaq_f<mode>"
+(define_insn "@mve_<mve_insn>q_f<mode>"
   [
    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
        (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
                       (match_operand:MVE_0 2 "s_register_operand" "w")
                       (match_operand:MVE_0 3 "s_register_operand" "w")]
-        VFMAQ_F))
+        MVE_VFMxQ_F))
   ]
   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
-  "vfma.f%#<V_sz_elem> %q0, %q2, %q3"
+  "<mve_insn>.f%#<V_sz_elem>\t%q0, %q2, %q3"
   [(set_attr "type" "mve_move")
 ])
 
 ;;
-;; [vfmaq_n_f])
+;; [vfmaq_n_f]
+;; [vfmasq_n_f]
 ;;
-(define_insn "mve_vfmaq_n_f<mode>"
+(define_insn "@mve_<mve_insn>q_n_f<mode>"
   [
    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
        (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
                       (match_operand:MVE_0 2 "s_register_operand" "w")
                       (match_operand:<V_elem> 3 "s_register_operand" "r")]
-        VFMAQ_N_F))
+        MVE_VFMAxQ_N_F))
   ]
   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
-  "vfma.f%#<V_sz_elem> %q0, %q2, %3"
-  [(set_attr "type" "mve_move")
-])
-
-;;
-;; [vfmasq_n_f])
-;;
-(define_insn "mve_vfmasq_n_f<mode>"
-  [
-   (set (match_operand:MVE_0 0 "s_register_operand" "=w")
-       (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
-                      (match_operand:MVE_0 2 "s_register_operand" "w")
-                      (match_operand:<V_elem> 3 "s_register_operand" "r")]
-        VFMASQ_N_F))
-  ]
-  "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
-  "vfmas.f%#<V_sz_elem>        %q0, %q2, %3"
-  [(set_attr "type" "mve_move")
-])
-;;
-;; [vfmsq_f])
-;;
-(define_insn "mve_vfmsq_f<mode>"
-  [
-   (set (match_operand:MVE_0 0 "s_register_operand" "=w")
-       (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
-                      (match_operand:MVE_0 2 "s_register_operand" "w")
-                      (match_operand:MVE_0 3 "s_register_operand" "w")]
-        VFMSQ_F))
-  ]
-  "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
-  "vfms.f%#<V_sz_elem> %q0, %q2, %q3"
+  "<mve_insn>.f%#<V_sz_elem>\t%q0, %q2, %3"
   [(set_attr "type" "mve_move")
 ])
 
@@ -3196,6 +3167,8 @@
 ;;
 ;; [vabdq_m_f]
 ;; [vaddq_m_f]
+;; [vfmaq_m_f]
+;; [vfmsq_m_f]
 ;; [vmaxnmq_m_f]
 ;; [vminnmq_m_f]
 ;; [vmulq_m_f]
@@ -3219,6 +3192,8 @@
 ;; [vaddq_m_n_f]
 ;; [vsubq_m_n_f]
 ;; [vmulq_m_n_f]
+;; [vfmaq_m_n_f]
+;; [vfmasq_m_n_f]
 ;;
 (define_insn "@mve_<mve_insn>q_m_n_f<mode>"
   [
@@ -3230,7 +3205,7 @@
         MVE_FP_M_N_BINARY))
   ]
   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
-  "vpst\;<mve_insn>t.f%#<V_sz_elem>    %q0, %q2, %3"
+  "vpst\;<mve_insn>t.f%#<V_sz_elem>\t%q0, %q2, %3"
   [(set_attr "type" "mve_move")
    (set_attr "length""8")])
 
@@ -3441,74 +3416,6 @@
   [(set_attr "type" "mve_move")
    (set_attr "length""8")])
 
-;;
-;; [vfmaq_m_f])
-;;
-(define_insn "mve_vfmaq_m_f<mode>"
-  [
-   (set (match_operand:MVE_0 0 "s_register_operand" "=w")
-       (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
-                      (match_operand:MVE_0 2 "s_register_operand" "w")
-                      (match_operand:MVE_0 3 "s_register_operand" "w")
-                      (match_operand:<MVE_VPRED> 4 "vpr_register_operand" "Up")]
-        VFMAQ_M_F))
-  ]
-  "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
-  "vpst\;vfmat.f%#<V_sz_elem>  %q0, %q2, %q3"
-  [(set_attr "type" "mve_move")
-   (set_attr "length""8")])
-
-;;
-;; [vfmaq_m_n_f])
-;;
-(define_insn "mve_vfmaq_m_n_f<mode>"
-  [
-   (set (match_operand:MVE_0 0 "s_register_operand" "=w")
-       (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
-                      (match_operand:MVE_0 2 "s_register_operand" "w")
-                      (match_operand:<V_elem> 3 "s_register_operand" "r")
-                      (match_operand:<MVE_VPRED> 4 "vpr_register_operand" "Up")]
-        VFMAQ_M_N_F))
-  ]
-  "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
-  "vpst\;vfmat.f%#<V_sz_elem>  %q0, %q2, %3"
-  [(set_attr "type" "mve_move")
-   (set_attr "length""8")])
-
-;;
-;; [vfmasq_m_n_f])
-;;
-(define_insn "mve_vfmasq_m_n_f<mode>"
-  [
-   (set (match_operand:MVE_0 0 "s_register_operand" "=w")
-       (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
-                      (match_operand:MVE_0 2 "s_register_operand" "w")
-                      (match_operand:<V_elem> 3 "s_register_operand" "r")
-                      (match_operand:<MVE_VPRED> 4 "vpr_register_operand" "Up")]
-        VFMASQ_M_N_F))
-  ]
-  "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
-  "vpst\;vfmast.f%#<V_sz_elem> %q0, %q2, %3"
-  [(set_attr "type" "mve_move")
-   (set_attr "length""8")])
-
-;;
-;; [vfmsq_m_f])
-;;
-(define_insn "mve_vfmsq_m_f<mode>"
-  [
-   (set (match_operand:MVE_0 0 "s_register_operand" "=w")
-       (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
-                      (match_operand:MVE_0 2 "s_register_operand" "w")
-                      (match_operand:MVE_0 3 "s_register_operand" "w")
-                      (match_operand:<MVE_VPRED> 4 "vpr_register_operand" "Up")]
-        VFMSQ_M_F))
-  ]
-  "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
-  "vpst\;vfmst.f%#<V_sz_elem>  %q0, %q2, %q3"
-  [(set_attr "type" "mve_move")
-   (set_attr "length""8")])
-
 ;;
 ;; [vornq_m_f])
 ;;
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