")
(define_insn "call_value"
- [(set (match_operand 0 "" "rf")
+ [(set (match_operand 0 "" "=rf")
(call (match_operand 1 "memory_operand" "m")
(match_operand 2 "general_operand" "g")))
(clobber (reg:SI 14))]
"neg.b %0")
(define_insn "negsf2"
- [(set (match_operand:SF 0 "general_operand" "f")
+ [(set (match_operand:SF 0 "general_operand" "=f")
(neg:SF (match_operand:SF 1 "general_operand" "fmF")))]
"TARGET_FPU"
"fneg.s %f1,%0")
(define_insn "negdf2"
- [(set (match_operand:DF 0 "general_operand" "f")
+ [(set (match_operand:DF 0 "general_operand" "=f")
(neg:DF (match_operand:DF 1 "general_operand" "fmF")))]
"TARGET_FPU"
"fneg.d %f1,%0")
;; Absolute value instructions
(define_insn "abssf2"
- [(set (match_operand:SF 0 "general_operand" "f")
+ [(set (match_operand:SF 0 "general_operand" "=f")
(abs:SF (match_operand:SF 1 "general_operand" "fmF")))]
"TARGET_FPU"
"fabs.s %f1,%0")
(define_insn "absdf2"
- [(set (match_operand:DF 0 "general_operand" "f")
+ [(set (match_operand:DF 0 "general_operand" "=f")
(abs:DF (match_operand:DF 1 "general_operand" "fmF")))]
"TARGET_FPU"
"fabs.d %f1,%0")
(define_peephole
[(set (reg:SI 15) (plus:SI (reg:SI 15) (const_int 4)))
- (set (match_operand:DF 0 "register_operand" "f")
+ (set (match_operand:DF 0 "register_operand" "=f")
(match_operand:DF 1 "register_operand" "r"))]
"FPU_REG_P (operands[0]) && ! FPU_REG_P (operands[1])"
"*
; for the call = number bytes for args + 4
(define_insn "call_value"
- [(set (match_operand 0 "" "g")
+ [(set (match_operand 0 "" "=g")
(call (match_operand:QI 1 "memory_operand" "m")
(match_operand:QI 2 "general_operand" "g")))]
""