testsuite/116654 - adjust gcc.target/powerpc/p9-vec-length-full-8.c

gcc.target/powerpc/p9-vec-length-full-8.c was expecting all loops to
use -with-len fully masked vectorization to avoid epilogues because
the loops needed peeling for gaps.  With SLP we have improved things
here and the loops using V2D[IF]mode no longer need peeling for gaps
since the target can compose those vectors from two scalars and
in turn we generate better code and not need an epilogue either
(the iteration count divides by the VF).

	PR testsuite/116654
	* gcc.target/powerpc/p9-vec-length-full-8.c: Adjust.

diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-8.c b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-8.c
index 53fa8ebc3ff54b32ed3e47b619b8eed97b75f8a9..8b303841aea7a0df936c683e0fb339db5d493eb7 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-8.c
+++ b/gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-8.c
@@ -9,9 +9,10 @@
 /* { dg-require-effective-target powerpc_vsx } */
 
 /* Test for fully with length, the loop body uses vector access with length,
-   there should not be any epilogues.  */
+   there should not be any epilogues.  Note for [u]int64_t and double we
+   can avoid peeling for gaps and do not require with-len.  */
 
 #include "p9-vec-length-8.h"
 
-/* { dg-final { scan-assembler-times {\mlxvl\M} 30 } } */
-/* { dg-final { scan-assembler-times {\mstxvl\M} 10 } } */
+/* { dg-final { scan-assembler-times {\mlxvl\M} 21 } } */
+/* { dg-final { scan-assembler-times {\mstxvl\M} 7 } } */