re PR target/10242 ([ARM] subsequent use of plus and minus operators could be improved)

	PR target/10242
	* arm.md (arm_addsi3): Don't try to split an add with an
	eliminable register until after reload has completed.

From-SVN: r148156

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c2cac32adff2c9366dab70ab1d09d618a0f2d476..997ec4174c4b6ec53573a8aff57b0838ef87cf98 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2009-06-04  Richard Earnshaw  <rearnsha@arm.com>
+
+       PR target/10242
+       * arm.md (arm_addsi3): Don't try to split an add with an
+       eliminable register until after reload has completed.
+
 2009-06-03  Ian Lance Taylor  <iant@google.com>
 
        * dummy-checksum.c (executable_checksum): Use EXPORTED_CONST.
@@ -225,7 +231,7 @@
 
        * arm.c (arm_get_frame_offsets): Prefer using r3 for padding a
        push/pop multiple to 8-byte alignment.
-       
+
 2009-06-01  Jakub Jelinek  <jakub@redhat.com>
 
        * config/i386/i386.c (queued_cfa_restores): New static variable.

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index de78d2866f87061433bae1e71d2ca2c91e22891c..5f3a5e0e96f3bd084688322109b94a2b44d4fa1d 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -620,10 +620,11 @@
    sub%?\\t%0, %1, #%n2
    sub%?\\t%0, %1, #%n2
    #"
-  "TARGET_32BIT &&
-   GET_CODE (operands[2]) == CONST_INT
+  "TARGET_32BIT
+   && GET_CODE (operands[2]) == CONST_INT
    && !(const_ok_for_arm (INTVAL (operands[2]))
-        || const_ok_for_arm (-INTVAL (operands[2])))"
+        || const_ok_for_arm (-INTVAL (operands[2])))
+   && (reload_completed || !arm_eliminable_register (operands[1]))"
   [(clobber (const_int 0))]
   "
   arm_split_constant (PLUS, SImode, curr_insn,