]> gcc.gnu.org Git - gcc.git/commitdiff
* combine.c (can_combine_p): Handle USEs in PARALLELs.
authorJ"orn Rennecke <amylaar@cygnus.co.uk>
Fri, 13 Feb 1998 02:26:25 +0000 (02:26 +0000)
committerJoern Rennecke <amylaar@gcc.gnu.org>
Fri, 13 Feb 1998 02:26:25 +0000 (02:26 +0000)
From-SVN: r17899

gcc/ChangeLog
gcc/combine.c

index 9c2828f8c47dcff4f86156359fdc28aa924cd6cd..60da151fc97b3cd9185beefba9c99990224d5da9 100644 (file)
@@ -1,3 +1,7 @@
+Fri Feb 13 10:21:41 1998  J"orn Rennecke <amylaar@cygnus.co.uk>
+
+        * combine.c (can_combine_p): Handle USEs in PARALLELs.
+
 Fri Feb 13 01:34:14 1998  H.J. Lu  (hjl@gnu.org)
 
        * config/linux.h (LIB_SPEC): Add -lc for -shared if
index 0bf6712b4099a99382b7ddf8fa25b290fd345dca..615a28b07148625d191d508a54a669a10907dae6 100644 (file)
@@ -860,6 +860,43 @@ can_combine_p (insn, i3, pred, succ, pdest, psrc)
 
          switch (GET_CODE (elt))
            {
+           /* This is important to combine floating point insns
+              for the SH4 port.  */
+           case USE:
+             /* Combining an isolated USE doesn't make sense.
+                We depend here on combinable_i3_pat to reject them.  */
+             /* The code below this loop only verifies that the inputs of
+                the SET in INSN do not change.  We call reg_set_between_p
+                to verify that the REG in the USE does not change betweeen
+                I3 and INSN.
+                If the USE in INSN was for a pseudo register, the matching
+                insn pattern will likely match any register; combining this
+                with any other USE would only be safe if we knew that the
+                used registers have identical values, or if there was
+                something to tell them apart, e.g. different modes.  For
+                now, we forgo such compilcated tests and simply disallow
+                combining of USES of pseudo registers with any other USE.  */
+             if (GET_CODE (XEXP (elt, 0)) == REG
+                 && GET_CODE (PATTERN (i3)) == PARALLEL)
+               {
+                 rtx i3pat = PATTERN (i3);
+                 int i = XVECLEN (i3pat, 0) - 1;
+                 int regno = REGNO (XEXP (elt, 0));
+                 do
+                   {
+                     rtx i3elt = XVECEXP (i3pat, 0, i);
+                     if (GET_CODE (i3elt) == USE
+                         && GET_CODE (XEXP (i3elt, 0)) == REG
+                         && (REGNO (XEXP (i3elt, 0)) == regno
+                             ? reg_set_between_p (XEXP (elt, 0),
+                                                  PREV_INSN (insn), i3)
+                             : regno >= FIRST_PSEUDO_REGISTER))
+                       return 0;
+                   }
+                 while (--i >= 0);
+               }
+             break;
+
              /* We can ignore CLOBBERs.  */
            case CLOBBER:
              break;
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