Add -mcpu=power11 support.

This patch adds the power11 option to the -mcpu= and -mtune= switches.

This patch treats the power11 like a power10 in terms of costs and reassociation
width.

This patch issues a ".machine power11" to the assembly file if you use
-mcpu=power11.

This patch defines _ARCH_PWR11 if the user uses -mcpu=power11.

This patch allows GCC to be configured with the --with-cpu=power11 and
--with-tune=power11 options.

This patch passes -mpwr11 to the assembler if the user uses -mcpu=power11.

This patch adds support for using "power11" in the __builtin_cpu_is built-in
function.

2024-03-18  Michael Meissner  <meissner@linux.ibm.com>

gcc/

	* config.gcc (rs6000*-*-*, powerpc*-*-*): Add support for power11.
	* config/rs6000/aix71.h (ASM_CPU_SPEC): Add support for -mcpu=power11.
	* config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
	* config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
	* config/rs6000/driver-rs6000.cc (asm_names): Likewise.
	* config/rs6000/ppc-auxv.h (PPC_PLATFORM_POWER11): New define.
	* config/rs6000/rs6000-builtin.cc (cpu_is_info): Add power11.
	* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
	_ARCH_PWR11 if -mcpu=power11.
	* config/rs6000/rs6000-cpus.def (ISA_POWER11_MASKS_SERVER): New define.
	(POWERPC_MASKS): Add power11 isa bit.
	(power11 cpu): Add power11 definition.
	* config/rs6000/rs6000-opts.h (PROCESSOR_POWER11): Add power11 processor.
	* config/rs6000/rs6000-string.cc (expand_compare_loop): Likewise.
	* config/rs6000/rs6000-tables.opt: Regenerate.
	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Add power11
	support.
	(rs6000_machine_from_flags): Likewise.
	(rs6000_reassociation_width): Likewise.
	(rs6000_adjust_cost): Likewise.
	(rs6000_issue_rate): Likewise.
	(rs6000_sched_reorder): Likewise.
	(rs6000_sched_reorder2): Likewise.
	(rs6000_register_move_cost): Likewise.
	(rs6000_opt_masks): Likewise.
	* config/rs6000/rs6000.h (ASM_CPU_SPEC): Likewise.
	* config/rs6000/rs6000.md (cpu attribute): Add power11.
	* config/rs6000/rs6000.opt (-mpower11): Add internal power11 ISA flag.
	* doc/invoke.texi (RS/6000 and PowerPC Options): Document -mcpu=power11.

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 040afabd9ece03241ad2a802ca0ae620f279d149..f8036b6476e0d9591d91eb2c5e9a5c0b79665939 100644 (file)
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -531,7 +531,9 @@ powerpc*-*-*)
        extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h si2vmx.h"
        extra_headers="${extra_headers} amo.h"
        case x$with_cpu in
-           xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower10|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
+           xpowerpc64 | xdefault64 | x6[23]0 | x970 | xG5 | xpower[3456789] \
+           | xpower1[01] | xpower6x | xrs64a | xcell | xa2 | xe500mc64 \
+           | xe5500 | xe6500)
                cpu_is_64bit=yes
                ;;
        esac
@@ -5566,7 +5568,7 @@ case "${target}" in
                                eval "with_$which=405"
                                ;;
                        "" | common | native \
-                       | power[3456789] | power10 | power5+ | power6x \
+                       | power[3456789] | power1[01] | power5+ | power6x \
                        | powerpc | powerpc64 | powerpc64le \
                        | rs64 \
                        | 401 | 403 | 405 | 405fp | 440 | 440fp | 464 | 464fp \

diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h
index 24bc301e37d6a47091b35b216f81b2209c3cb260..41037b3852d74eeb88c2d59bfdaf25d997198acb 100644 (file)
--- a/gcc/config/rs6000/aix71.h
+++ b/gcc/config/rs6000/aix71.h
@@ -79,6 +79,7 @@ do {                                                                  \
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
   mcpu=power8: -mpwr8; \

diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h
index c43974f577afd44b3d350309a1e396c8e65509f2..fe59f8319b48c022b2d11183661fccc4f31d59a7 100644 (file)
--- a/gcc/config/rs6000/aix72.h
+++ b/gcc/config/rs6000/aix72.h
@@ -79,6 +79,7 @@ do {                                                                  \
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
   mcpu=power8: -mpwr8; \

diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h
index b1572bde81f963592d1cffd9fac2fbed579e4da9..1318b0b3662d1ba0a380965e6949fb8e6be9d5e9 100644 (file)
--- a/gcc/config/rs6000/aix73.h
+++ b/gcc/config/rs6000/aix73.h
@@ -79,6 +79,7 @@ do {                                                                  \
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
   mcpu=power8: -mpwr8; \

diff --git a/gcc/config/rs6000/driver-rs6000.cc b/gcc/config/rs6000/driver-rs6000.cc
index 3ebbaa42622ab24edbc7d6f34a89f26f8ee34886..f4900724b98a2b374bc0cd0e8aa032bccf392c0e 100644 (file)
--- a/gcc/config/rs6000/driver-rs6000.cc
+++ b/gcc/config/rs6000/driver-rs6000.cc
@@ -451,6 +451,7 @@ static const struct asm_name asm_names[] = {
   { "power8",  "-mpwr8" },
   { "power9",  "-mpwr9" },
   { "power10", "-mpwr10" },
+  { "power11", "-mpwr11" },
   { "powerpc", "-mppc" },
   { "rs64",    "-mppc" },
   { "603",     "-m603" },
@@ -479,6 +480,7 @@ static const struct asm_name asm_names[] = {
   { "power8",  "-mpower8" },
   { "power9",  "-mpower9" },
   { "power10", "-mpower10" },
+  { "power11", "-mpower11" },
   { "a2",      "-ma2" },
   { "powerpc", "-mppc" },
   { "powerpc64", "-mppc64" },

diff --git a/gcc/config/rs6000/ppc-auxv.h b/gcc/config/rs6000/ppc-auxv.h
index 364bba427d14bb811d8ce6505eadc09e12d256a1..ed269e3b72b38cc7f59b37c13fd32f56183d1f62 100644 (file)
--- a/gcc/config/rs6000/ppc-auxv.h
+++ b/gcc/config/rs6000/ppc-auxv.h
@@ -47,9 +47,8 @@
 #define PPC_PLATFORM_PPC476            12
 #define PPC_PLATFORM_POWER8            13
 #define PPC_PLATFORM_POWER9            14
-
-/* This is not yet official.  */
 #define PPC_PLATFORM_POWER10           15
+#define PPC_PLATFORM_POWER11           16
 
 /* AT_HWCAP bits.  These must match the values defined in the Linux kernel.  */
 #define PPC_FEATURE_32              0x80000000

diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index 6698274031b903447187b98153fa20342e2d51e4..f3ba1eccdbdc4a0acb392d4ee784b3d447edf014 100644 (file)
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -2493,6 +2493,7 @@ static const struct
   const char *cpu;
   unsigned int cpuid;
 } cpu_is_info[] = {
+  { "power11",    PPC_PLATFORM_POWER11 },
   { "power10",    PPC_PLATFORM_POWER10 },
   { "power9",     PPC_PLATFORM_POWER9 },
   { "power8",     PPC_PLATFORM_POWER8 },

diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index ce0b14a8d373da9e8191eeffdae9858f453ed2cd..ebed8b9554a7d71d37927646d105f0ace4be595c 100644 (file)
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -447,6 +447,8 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags)
     rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9");
   if ((flags & OPTION_MASK_POWER10) != 0)
     rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
+  if ((flags & OPTION_MASK_POWER11) != 0)
+    rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
   if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
     rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
   if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)

diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 28249600318fd93ef76a7aedccfad75695265d69..3237a5ada3055927115de9ed2e2d36667db8ff55 100644 (file)
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -86,6 +86,9 @@
                                 | OPTION_MASK_POWER10                  \
                                 | OTHER_POWER10_MASKS)
 
+#define ISA_POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER                 \
+                                 | OPTION_MASK_POWER11)
+
 /* Flags that need to be turned off if -mno-vsx.  */
 #define OTHER_VSX_VECTOR_MASKS (OPTION_MASK_EFFICIENT_UNALIGNED_VSX    \
                                 | OPTION_MASK_FLOAT128_KEYWORD         \
@@ -125,6 +128,7 @@
                                 | OPTION_MASK_FLOAT128_KEYWORD         \
                                 | OPTION_MASK_FPRND                    \
                                 | OPTION_MASK_POWER10                  \
+                                | OPTION_MASK_POWER11                  \
                                 | OPTION_MASK_P10_FUSION               \
                                 | OPTION_MASK_HTM                      \
                                 | OPTION_MASK_ISEL                     \
@@ -257,3 +261,4 @@ RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, OPTION_MASK_PPC_GFXOPT
 RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64
            | ISA_2_7_MASKS_SERVER | OPTION_MASK_HTM)
 RS6000_CPU ("rs64", PROCESSOR_RS64A, OPTION_MASK_PPC_GFXOPT | MASK_POWERPC64)
+RS6000_CPU ("power11", PROCESSOR_POWER11, MASK_POWERPC64 | ISA_POWER11_MASKS_SERVER)

diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h
index 33fd0efc936fe98a71777040cbd538ff1e677206..4f5af57ae1a6db12d0ffef15e09e5cea3807af1b 100644 (file)
--- a/gcc/config/rs6000/rs6000-opts.h
+++ b/gcc/config/rs6000/rs6000-opts.h
@@ -67,7 +67,8 @@ enum processor_type
    PROCESSOR_MPCCORE,
    PROCESSOR_CELL,
    PROCESSOR_PPCA2,
-   PROCESSOR_TITAN
+   PROCESSOR_TITAN,
+   PROCESSOR_POWER11
 };
 
 

diff --git a/gcc/config/rs6000/rs6000-string.cc b/gcc/config/rs6000/rs6000-string.cc
index 917f5572a6d344bd7a8ce8aa15e5e9ec2ec1709b..9c8a81172e33abf754fdc9d574ddd81575d77bb6 100644 (file)
--- a/gcc/config/rs6000/rs6000-string.cc
+++ b/gcc/config/rs6000/rs6000-string.cc
@@ -964,6 +964,7 @@ expand_compare_loop (rtx operands[])
       break;
     case PROCESSOR_POWER9:
     case PROCESSOR_POWER10:
+    case PROCESSOR_POWER11:
       if (bytes_is_const)
        max_bytes = 191;
       else

diff --git a/gcc/config/rs6000/rs6000-tables.opt b/gcc/config/rs6000/rs6000-tables.opt
index 65f46709716f1b66f058cc1071d5fed010d14a7c..7e5bb6e7658ba05901c533d6624ac9c8025e424e 100644 (file)
--- a/gcc/config/rs6000/rs6000-tables.opt
+++ b/gcc/config/rs6000/rs6000-tables.opt
@@ -197,3 +197,6 @@ Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(55)
 EnumValue
 Enum(rs6000_cpu_opt_value) String(rs64) Value(56)
 
+EnumValue
+Enum(rs6000_cpu_opt_value) String(power11) Value(57)
+

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 6ba9df4f02e769664f28f1bc263f10d8b675f039..b718b9cf0bc93ace422d366e2ff17d5269ccf400 100644 (file)
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -1067,7 +1067,7 @@ struct processor_costs power9_cost = {
   COSTS_N_INSNS (3),   /* SF->DF convert */
 };
 
-/* Instruction costs on POWER10 processors.  */
+/* Instruction costs on POWER10/POWER11 processors.  */
 static const
 struct processor_costs power10_cost = {
   COSTS_N_INSNS (2),   /* mulsi */
@@ -4379,7 +4379,8 @@ rs6000_option_override_internal (bool global_init_p)
      generating power10 instructions.  */
   if (!(rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION))
     {
-      if (rs6000_tune == PROCESSOR_POWER10)
+      if (rs6000_tune == PROCESSOR_POWER10
+         || rs6000_tune == PROCESSOR_POWER11)
        rs6000_isa_flags |= OPTION_MASK_P10_FUSION;
       else
        rs6000_isa_flags &= ~OPTION_MASK_P10_FUSION;
@@ -4408,6 +4409,7 @@ rs6000_option_override_internal (bool global_init_p)
                        && rs6000_tune != PROCESSOR_POWER8
                        && rs6000_tune != PROCESSOR_POWER9
                        && rs6000_tune != PROCESSOR_POWER10
+                       && rs6000_tune != PROCESSOR_POWER11
                        && rs6000_tune != PROCESSOR_PPCA2
                        && rs6000_tune != PROCESSOR_CELL
                        && rs6000_tune != PROCESSOR_PPC476);
@@ -4422,6 +4424,7 @@ rs6000_option_override_internal (bool global_init_p)
                                 || rs6000_tune == PROCESSOR_POWER8
                                 || rs6000_tune == PROCESSOR_POWER9
                                 || rs6000_tune == PROCESSOR_POWER10
+                                || rs6000_tune == PROCESSOR_POWER11
                                 || rs6000_tune == PROCESSOR_PPCE500MC
                                 || rs6000_tune == PROCESSOR_PPCE500MC64
                                 || rs6000_tune == PROCESSOR_PPCE5500
@@ -4721,6 +4724,7 @@ rs6000_option_override_internal (bool global_init_p)
        break;
 
       case PROCESSOR_POWER10:
+      case PROCESSOR_POWER11:
        rs6000_cost = &power10_cost;
        break;
 
@@ -5880,6 +5884,8 @@ rs6000_machine_from_flags (void)
   /* Disable the flags that should never influence the .machine selection.  */
   flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL);
 
+  if ((flags & (ISA_POWER11_MASKS_SERVER & ~ISA_3_1_MASKS_SERVER)) != 0)
+    return "power11";
   if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)
     return "power10";
   if ((flags & (ISA_3_0_MASKS_SERVER & ~ISA_2_7_MASKS_SERVER)) != 0)
@@ -10126,6 +10132,7 @@ rs6000_reassociation_width (unsigned int opc ATTRIBUTE_UNUSED,
     case PROCESSOR_POWER8:
     case PROCESSOR_POWER9:
     case PROCESSOR_POWER10:
+    case PROCESSOR_POWER11:
       if (DECIMAL_FLOAT_MODE_P (mode))
        return 1;
       if (VECTOR_MODE_P (mode))
@@ -18207,7 +18214,8 @@ rs6000_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost,
 
        /* Separate a load from a narrower, dependent store.  */
        if ((rs6000_sched_groups || rs6000_tune == PROCESSOR_POWER9
-            || rs6000_tune == PROCESSOR_POWER10)
+            || rs6000_tune == PROCESSOR_POWER10
+            || rs6000_tune == PROCESSOR_POWER11)
            && GET_CODE (PATTERN (insn)) == SET
            && GET_CODE (PATTERN (dep_insn)) == SET
            && MEM_P (XEXP (PATTERN (insn), 1))
@@ -18246,6 +18254,7 @@ rs6000_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost,
                 || rs6000_tune == PROCESSOR_POWER8
                 || rs6000_tune == PROCESSOR_POWER9
                 || rs6000_tune == PROCESSOR_POWER10
+                || rs6000_tune == PROCESSOR_POWER11
                  || rs6000_tune == PROCESSOR_CELL)
                 && recog_memoized (dep_insn)
                 && (INSN_CODE (dep_insn) >= 0))
@@ -18820,6 +18829,7 @@ rs6000_issue_rate (void)
   case PROCESSOR_POWER9:
     return 6;
   case PROCESSOR_POWER10:
+  case PROCESSOR_POWER11:
     return 8;
   default:
     return 1;
@@ -19535,8 +19545,10 @@ rs6000_sched_reorder (FILE *dump ATTRIBUTE_UNUSED, int sched_verbose,
   if (rs6000_tune == PROCESSOR_POWER6)
     load_store_pendulum = 0;
 
-  /* Do Power10 dependent reordering.  */
-  if (rs6000_tune == PROCESSOR_POWER10 && last_scheduled_insn)
+  /* Do Power10/power11 dependent reordering.  */
+  if (last_scheduled_insn
+      && (rs6000_tune == PROCESSOR_POWER10
+         || rs6000_tune == PROCESSOR_POWER11))
     power10_sched_reorder (ready, n_ready - 1);
 
   return rs6000_issue_rate ();
@@ -19560,8 +19572,10 @@ rs6000_sched_reorder2 (FILE *dump, int sched_verbose, rtx_insn **ready,
       && recog_memoized (last_scheduled_insn) >= 0)
     return power9_sched_reorder2 (ready, *pn_ready - 1);
 
-  /* Do Power10 dependent reordering.  */
-  if (rs6000_tune == PROCESSOR_POWER10 && last_scheduled_insn)
+  /* Do Power10/power11 dependent reordering.  */
+  if (last_scheduled_insn
+      && (rs6000_tune == PROCESSOR_POWER10
+         || rs6000_tune == PROCESSOR_POWER11))
     return power10_sched_reorder (ready, *pn_ready - 1);
 
   return cached_can_issue_more;
@@ -22778,7 +22792,8 @@ rs6000_register_move_cost (machine_mode mode,
                 allocation a move within the same class might turn
                 out to be a nop.  */
              if (rs6000_tune == PROCESSOR_POWER9
-                 || rs6000_tune == PROCESSOR_POWER10)
+                 || rs6000_tune == PROCESSOR_POWER10
+                 || rs6000_tune == PROCESSOR_POWER11)
                ret = 3 * hard_regno_nregs (FIRST_GPR_REGNO, mode);
              else
                ret = 4 * hard_regno_nregs (FIRST_GPR_REGNO, mode);
@@ -24437,6 +24452,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "float128-hardware",       OPTION_MASK_FLOAT128_HW,        false, true  },
   { "fprnd",                   OPTION_MASK_FPRND,              false, true  },
   { "power10",                 OPTION_MASK_POWER10,            false, true  },
+  { "power11",                 OPTION_MASK_POWER11,            false, false },
   { "hard-dfp",                        OPTION_MASK_DFP,                false, true  },
   { "htm",                     OPTION_MASK_HTM,                false, true  },
   { "isel",                    OPTION_MASK_ISEL,               false, true  },

diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 68bc45d65baaa8198c6a5f6984102a13f4860d35..407cb379a0cfc7c8cdc585958d2d0d6432496f9c 100644 (file)
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -106,6 +106,7 @@
    you make changes here, make them also there.  */
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=power11: -mpower11; \
   mcpu=power10: -mpower10; \
   mcpu=power9: -mpower9; \
   mcpu=power8|mcpu=powerpc64le: -mpower8; \

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index bc8bc6ab060bf93cb8b006e258ede3fc90e9557d..ea4add5b2839771ddef0f32a4d8480af61b1f880 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -351,7 +351,7 @@
    ppc403,ppc405,ppc440,ppc476,
    ppc8540,ppc8548,ppce300c2,ppce300c3,ppce500mc,ppce500mc64,ppce5500,ppce6500,
    power4,power5,power6,power7,power8,power9,power10,
-   rs64a,mpccore,cell,ppca2,titan"
+   rs64a,mpccore,cell,ppca2,titan,power11"
   (const (symbol_ref "(enum attr_cpu) rs6000_tune")))
 
 ;; The ISA we implement.

diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 83197681b661a5551edf30508787a935b876fb9e..e7a4e4a2ddd7475bc8e8785991cf75ae038894b1 100644 (file)
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -581,6 +581,9 @@ Target Undocumented Var(rs6000_speculate_indirect_jumps) Init(1) Save
 mpower10
 Target Undocumented Mask(POWER10) Var(rs6000_isa_flags) WarnRemoved
 
+mpower11
+Target Undocumented Mask(POWER11) Var(rs6000_isa_flags) Warn(Do not use %<-mpower11>)
+
 mprefixed
 Target Mask(PREFIXED) Var(rs6000_isa_flags)
 Generate (do not generate) prefixed memory instructions.

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index b446b2905c72571e8c4b1a01888b45865e6a4524..a092d95e8f437aba07b539b706ff9e1e6a4b052b 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -31169,8 +31169,9 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403},
 @samp{e6500}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5},
 @samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+},
 @samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8},
-@samp{power9}, @samp{power10}, @samp{powerpc}, @samp{powerpc64},
-@samp{powerpc64le}, @samp{rs64}, and @samp{native}.
+@samp{power9}, @samp{power10}, @samp{power11},
+@samp{powerpc}, @samp{powerpc64}, @samp{powerpc64le},
+@samp{rs64}, and @samp{native}.
 
 @option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and
 @option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either