target-support.exp (check_ultrasparc_hw_available): New function.

	* lib/target-support.exp (check_ultrasparc_hw_available):
	New function.
	(is-effective-target): Check $arg for ultrasparc_hw.
	(is-effective-target-keyword): Likewise.
	* gcc.dg/vect/vect.exp: Call check_effective_target_ultrasparc_hw
	when determining what to do on sparc platforms.
	* gcc.dg/20001013-1.c: Check for an ultrasparc_hw target.
	* gcc.dg/20001101-1.c: Likewise.
	* gcc.dg/20001101-2.c: Likewise.
	* gcc.dg/ultrasp9.c: Likewise.
	* gcc.dg/ultrasp10.c: Likewise.
	* gcc.target/sparc/pdist-3.c: Likewise.

From-SVN: r126589

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 49e718eabaf177c56f96939ea19ccb8e658ff5f4..9a1145a20640459fb8d5139cd047c2e0dc503dd2 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,18 @@
+2007-07-12  Nathan Froyd  <froydnj@codesourcery.com>
+
+       * lib/target-support.exp (check_ultrasparc_hw_available):
+       New function.
+       (is-effective-target): Check $arg for ultrasparc_hw.
+       (is-effective-target-keyword): Likewise.
+       * gcc.dg/vect/vect.exp: Call check_effective_target_ultrasparc_hw
+       when determining what to do on sparc platforms.
+       * gcc.dg/20001013-1.c: Check for an ultrasparc_hw target.
+       * gcc.dg/20001101-1.c: Likewise.
+       * gcc.dg/20001101-2.c: Likewise.
+       * gcc.dg/ultrasp9.c: Likewise.
+       * gcc.dg/ultrasp10.c: Likewise.
+       * gcc.target/sparc/pdist-3.c: Likewise.
+
 2007-07-12  Daniel Jacobowitz  <dan@codesourcery.com>
 
        * gcc.target/mips/save-restore-5.c: Add -mno-abicalls.

diff --git a/gcc/testsuite/gcc.dg/20001013-1.c b/gcc/testsuite/gcc.dg/20001013-1.c
index 371672cab759051465c9cd1b7e7dd085ea4d5bf5..8634a1928200f669aa6cfb54d9d5b0013fd5c084 100644 (file)
--- a/gcc/testsuite/gcc.dg/20001013-1.c
+++ b/gcc/testsuite/gcc.dg/20001013-1.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target sparc*-*-* } } */
+/* { dg-do run { target { sparc*-*-* && ultrasparc_hw } } } */
 /* { dg-options "-O2 -mcpu=ultrasparc -mvis" } */
 
 extern void abort (void);

diff --git a/gcc/testsuite/gcc.dg/20001101-1.c b/gcc/testsuite/gcc.dg/20001101-1.c
index d0eb6e23ce0a4e56db36add6bb140da162a97a47..151a6cc19debfa1c27533bce76edc4226c0e7e1d 100644 (file)
--- a/gcc/testsuite/gcc.dg/20001101-1.c
+++ b/gcc/testsuite/gcc.dg/20001101-1.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target sparc*-*-* } } */
+/* { dg-do run { target { sparc*-*-* && ultrasparc_hw } } } */
 /* { dg-options "-O2 -mcpu=ultrasparc -mvis" } */
 
 extern void abort (void);

diff --git a/gcc/testsuite/gcc.dg/20001102-1.c b/gcc/testsuite/gcc.dg/20001102-1.c
index c976dad45b251dfc7891d01f5a994bd49e824803..62266a38164de5012945fc6d056f16cfc82ed838 100644 (file)
--- a/gcc/testsuite/gcc.dg/20001102-1.c
+++ b/gcc/testsuite/gcc.dg/20001102-1.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target sparc*-*-* } } */
+/* { dg-do run { target { sparc*-*-* && ultrasparc_hw } } } */
 /* { dg-options "-O2 -mcpu=ultrasparc -mvis" } */
 
 extern void abort (void);

diff --git a/gcc/testsuite/gcc.dg/ultrasp10.c b/gcc/testsuite/gcc.dg/ultrasp10.c
index ffa3229fa4f26f4c00115095c37e51d4807870e3..7cc5c93aaf7de155bda9b69ef0680f5231e84b15 100644 (file)
--- a/gcc/testsuite/gcc.dg/ultrasp10.c
+++ b/gcc/testsuite/gcc.dg/ultrasp10.c
@@ -1,6 +1,6 @@
 /* PR target/11965 */
 /* Originator: <jk@tools.de> */
-/* { dg-do run { target sparc*-*-* } } */
+/* { dg-do run { target { sparc*-*-* && ultrasparc_hw } } } */
 /* { dg-options "-O -mcpu=ultrasparc" } */
 
 /* This used to fail on 32-bit Ultrasparc because GCC emitted

diff --git a/gcc/testsuite/gcc.dg/ultrasp9.c b/gcc/testsuite/gcc.dg/ultrasp9.c
index 885420e0509c31110c0842dcd84699c0a9f177f7..0af2c7e860153c59687e0aca623071be689464a2 100644 (file)
--- a/gcc/testsuite/gcc.dg/ultrasp9.c
+++ b/gcc/testsuite/gcc.dg/ultrasp9.c
@@ -1,6 +1,6 @@
 /* PR optimization/11018 */
 /* Originator: <partain@dcs.gla.ac.uk> */
-/* { dg-do run { target sparc*-*-* } } */
+/* { dg-do run { target { sparc*-*-* && ultrasparc_hw } } } */
 /* { dg-options "-O2 -mcpu=ultrasparc" } */
 
 /* This used to fail on 32-bit Ultrasparc because

diff --git a/gcc/testsuite/gcc.dg/vect/vect.exp b/gcc/testsuite/gcc.dg/vect/vect.exp
index 6f3303a85e63a0aeef55cd973fe580d66c85d14d..6ad377bdcdf204c8e52eddb2569faff4f3df4e7b 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/vect.exp
+++ b/gcc/testsuite/gcc.dg/vect/vect.exp
@@ -63,7 +63,11 @@ if [istarget "powerpc*-*-*"] {
     set dg-do-what-default run
 } elseif [istarget "sparc*-*-*"] {
     lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
-    set dg-do-what-default run
+    if [check_effective_target_ultrasparc_hw] {
+       set dg-do-what-default run
+    } else {
+       set dg-do-what-default compile
+    }
 } elseif [istarget "alpha*-*-*"] {
     # Alpha's vectorization capabilities are extremely limited.
     # It's more effort than its worth disabling all of the tests

diff --git a/gcc/testsuite/gcc.target/sparc/pdist-3.c b/gcc/testsuite/gcc.target/sparc/pdist-3.c
index e4d6cb53ed078d7ff33b6ef4cb756fc3d18078ea..03df4d96dc40ec6a5de59c355f397eca1ff6e97c 100644 (file)
--- a/gcc/testsuite/gcc.target/sparc/pdist-3.c
+++ b/gcc/testsuite/gcc.target/sparc/pdist-3.c
@@ -1,4 +1,5 @@
 /* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_hw } */
 /* { dg-options "-mcpu=ultrasparc -mvis -O1" } */
 
 typedef long long int64_t;

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index ccb6356ccf973769f30377e83229b94ca7fd2e66..028cb34e56dfbc32857f2d672941f0c90f63b48e 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -1528,6 +1528,51 @@ proc check_effective_target_powerpc_altivec { } {
     }
 }
 
+# The VxWorks SPARC simulator accepts only EM_SPARC executables and
+# chokes on EM_SPARC32PLUS or EM_SPARCV9 executables.  Return 1 if the
+# test environment appears to run executables on such a simulator.
+
+proc check_effective_target_ultrasparc_hw { } {
+    global et_ultrasparc_hw_saved
+    global tool
+
+    if [info exists et_ultrasparc_hw_saved] {
+       verbose "check_ultrasparc_hw_available returning saved $et_ultrasparc_hw_saved" 2
+    } else {
+       set et_ultrasparc_hw_saved 0
+
+       # Set up, compile, and execute a simple test program.  The
+       # program will be compiled with -mcpu=ultrasparc to instruct the
+       # assembler to produce EM_SPARC32PLUS executables.
+       set src svect[pid].c
+       set exe svect[pid].x
+
+       set f [open $src "w"]
+       puts $f "int main() { return 0; }"
+       close $f
+
+       verbose "check_ultrasparc_hw_available compiling testfile $src" 2
+       set lines [${tool}_target_compile $src $exe executable "additional_flags=-mcpu=ultrasparc"]
+       file delete $src
+
+       if [string match "" $lines] then {
+           # No error message, compilation succeeded.
+           set result [${tool}_load "./$exe" "" ""]
+           set status [lindex $result 0]
+           remote_file build delete $exe
+           verbose "check_ultrasparc_hw_available testfile status is <$status>" 2
+
+           if { $status == "pass" } then {
+               set et_ultrasparc_hw_saved 1
+           }
+       } else {
+           verbose "check_ultrasparc_hw_available testfile compilation failed" 2
+       }
+    }
+
+    return $et_ultrasparc_hw_saved
+}
+
 # Return 1 if the target supports hardware vector shift operation.
 
 proc check_effective_target_vect_shift { } {