Increase loop alignment on Cortex cores to 8 and set function alignment to 16.

This makes things consistent across big.LITTLE cores, improves performance of
benchmarks with tight loops and reduces performance variations due to small
changes in code layout.

    gcc/
        * config/aarch64/aarch64.c (cortexa53_tunings):
        Increase loop alignment to 8.  Set function alignment to 16.
        (cortexa35_tunings): Likewise.
        (cortexa57_tunings): Increase loop alignment to 8.
        (cortexa72_tunings): Likewise.
        (cortexa73_tunings): Likewise.

From-SVN: r237851

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cccf296932d18e6f14a8eeba8dfd61b6f6ea6db4..dc5b6814e2fafcee34fdfc711c37034e4949be3a 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2016-06-29  Wilco Dijkstra  <wdijkstr@arm.com>
+
+       * config/aarch64/aarch64.c (cortexa53_tunings):
+       Increase loop alignment to 8.  Set function alignment to 16.
+       (cortexa35_tunings): Likewise.
+       (cortexa57_tunings): Increase loop alignment to 8.
+       (cortexa72_tunings): Likewise.
+       (cortexa73_tunings): Likewise.
+
 2016-06-29  Matthew Wahab  <matthew.wahab@arm.com>
 
        * doc/sourcebuild.texi (Effective-Target keywords): Add entries

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 7617f9fb273d17653df95eaf22b3cbeae3862230..314deb5836d8ecca1df3a0db72b79e84e88a68c3 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -454,9 +454,9 @@ static const struct tune_params cortexa35_tunings =
   1, /* issue_rate  */
   (AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
    | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops  */
-  8,   /* function_align.  */
+  16,  /* function_align.  */
   8,   /* jump_align.  */
-  4,   /* loop_align.  */
+  8,   /* loop_align.  */
   2,   /* int_reassoc_width.  */
   4,   /* fp_reassoc_width.  */
   1,   /* vec_reassoc_width.  */
@@ -480,9 +480,9 @@ static const struct tune_params cortexa53_tunings =
   2, /* issue_rate  */
   (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
    | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops  */
-  8,   /* function_align.  */
+  16,  /* function_align.  */
   8,   /* jump_align.  */
-  4,   /* loop_align.  */
+  8,   /* loop_align.  */
   2,   /* int_reassoc_width.  */
   4,   /* fp_reassoc_width.  */
   1,   /* vec_reassoc_width.  */
@@ -508,7 +508,7 @@ static const struct tune_params cortexa57_tunings =
    | AARCH64_FUSE_MOVK_MOVK), /* fusible_ops  */
   16,  /* function_align.  */
   8,   /* jump_align.  */
-  4,   /* loop_align.  */
+  8,   /* loop_align.  */
   2,   /* int_reassoc_width.  */
   4,   /* fp_reassoc_width.  */
   1,   /* vec_reassoc_width.  */
@@ -534,7 +534,7 @@ static const struct tune_params cortexa72_tunings =
    | AARCH64_FUSE_MOVK_MOVK), /* fusible_ops  */
   16,  /* function_align.  */
   8,   /* jump_align.  */
-  4,   /* loop_align.  */
+  8,   /* loop_align.  */
   2,   /* int_reassoc_width.  */
   4,   /* fp_reassoc_width.  */
   1,   /* vec_reassoc_width.  */
@@ -560,7 +560,7 @@ static const struct tune_params cortexa73_tunings =
    | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops  */
   16,  /* function_align.  */
   8,   /* jump_align.  */
-  4,   /* loop_align.  */
+  8,   /* loop_align.  */
   2,   /* int_reassoc_width.  */
   4,   /* fp_reassoc_width.  */
   1,   /* vec_reassoc_width.  */