fde-glibc.c (find_fde_for_dso): Do a binary search on the unwind region section.

        * config/ia64/fde-glibc.c (find_fde_for_dso): Do a binary
        search on the unwind region section.

        * config/ia64/ia64.md (movbi): Add r/r alternative.
        (cmovdi_internal_astep): Describe all combinations of register
        classes for sources & destinations; remove matching constraints.
        (cmovdi_internal): Likewise.

From-SVN: r37309

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fd51ef0de3200fdd8c0cb77ff1a2d8e733caba37..c9403c3e7cac7536eea913b5e791a36bebd2cef2 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,13 @@
 2000-11-07  Richard Henderson  <rth@redhat.com>
 
+       * config/ia64/fde-glibc.c (find_fde_for_dso): Do a binary
+       search on the unwind region section.
+
+       * config/ia64/ia64.md (movbi): Add r/r alternative.
+       (cmovdi_internal_astep): Describe all combinations of register
+       classes for sources & destinations; remove matching constraints.
+       (cmovdi_internal): Likewise.
+
        * gcc.c (default_compilers) [@cpp-output]: Add -fpreprocessed.
 
 2000-11-07  Richard Henderson  <rth@redhat.com>

diff --git a/gcc/config/ia64/fde-glibc.c b/gcc/config/ia64/fde-glibc.c
index 094849562055b62f429cbeb4192ec0a73492ad66..8000be2f0a58bba62e3cbd0f5ca8f90ad2e9d5cb 100644 (file)
--- a/gcc/config/ia64/fde-glibc.c
+++ b/gcc/config/ia64/fde-glibc.c
@@ -54,7 +54,8 @@ find_fde_for_dso (Elf64_Addr pc, Elf64_Ehdr *ehdr)
   Elf64_Phdr *phdr, *p_unwind;
   long n, match;
   Elf64_Addr load_base, seg_base;
-  fde *f;
+  fde *f_base;
+  size_t lo, hi;
 
   /* Verify that we are looking at an ELF header.  */
   if (ehdr->e_ident[0] != 0x7f
@@ -88,14 +89,24 @@ find_fde_for_dso (Elf64_Addr pc, Elf64_Ehdr *ehdr)
     return NULL;
 
   /* Search for the FDE within the unwind segment.  */
-  /* ??? Ideally ld would have sorted this for us by address.  Until
-     that's fixed, we must do a linear search.  */
 
-  f = (fde *) (p_unwind->p_vaddr + load_base);
+  f_base = (fde *) (p_unwind->p_vaddr + load_base);
   seg_base = (Elf64_Addr) ehdr;
-  for (n = p_unwind->p_memsz / sizeof (fde); --n >= 0; ++f)
-    if (pc >= f->start_offset + seg_base && pc < f->end_offset + seg_base)
-      return f;
+  lo = 0;
+  hi = p_unwind->p_memsz / sizeof (fde);
+
+  while (lo < hi)
+    {
+      size_t mid = (lo + hi) / 2;
+      fde *f = f_base + mid;
+
+      if (pc < f->start_offset + seg_base)
+       hi = mid;
+      else if (pc >= f->end_offset + seg_base)
+       lo = mid + 1;
+      else
+        return f;
+    }
 
   return NULL;
 }

diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md
index cf6fdd2aec94e4bde19304f2ead424d7ea987481..5adc6462ab078d01bf34aee5d0f4778d3523ea0d 100644 (file)
--- a/gcc/config/ia64/ia64.md
+++ b/gcc/config/ia64/ia64.md
@@ -175,8 +175,8 @@
    (set_attr "predicable" "no")])
 
 (define_insn "movbi"
-  [(set (match_operand:BI 0 "nonimmediate_operand" "=c,c,?c,?*r, c,*r,*r,*m")
-       (match_operand:BI 1 "move_operand"         " O,n, c,  c,*r, n,*m,*r"))]
+  [(set (match_operand:BI 0 "nonimmediate_operand" "=c,c,?c,?*r, c,*r,*r,*m,*r")
+       (match_operand:BI 1 "move_operand"         " O,n, c,  c,*r, n,*m,*r,*r"))]
   ""
   "@
    cmp.ne %0, %I0 = r0, r0
@@ -186,8 +186,9 @@
    tbit.nz %0, %I0 = %1, 0
    adds %0 = %1, r0
    ld1%O1 %0 = %1%P1
-   st1%Q0 %0 = %1%P0"
-  [(set_attr "type" "A,A,unknown,unknown,I,A,M,M")])
+   st1%Q0 %0 = %1%P0
+   mov %0 = %1"
+  [(set_attr "type" "A,A,unknown,unknown,I,A,M,M,A")])
 
 (define_split
   [(set (match_operand:BI 0 "register_operand" "")
@@ -4556,16 +4557,16 @@
 ;; Errata 72 workaround.
 (define_insn "*cmovdi_internal_astep"
   [(set (match_operand:DI 0 "register_operand"
-               "=r,*f,*b,r,*f,*b,r,*f,*b")
+               "=r, r, r,   r, r, r,   r, r, r,   r,*f,*b,*d*e")
        (if_then_else:DI
          (match_operator 4 "predicate_operator"
            [(match_operand:BI 1 "register_operand"
-                              "c,c,c,c,c,c,c,c,c")
+               " c, c, c,   c, c, c,   c, c, c,   c, c, c,   c")
             (const_int 0)])
          (match_operand:DI 2 "move_operand"
-               "0,0,0,ri*f*b,rO,r,ri*f*b,rO,r")
+               "ri,*f,*b,*d*e,ri,ri,  ri,*f,*b,*d*e,rO,rO,  rK")
          (match_operand:DI 3 "move_operand"
-               "ri*f*b,rO,r,0,0,0,ri*f*b,rO,r")))]
+               "ri,ri,ri,  ri,*f,*b,*d*e,*f,*b,*d*e,rO,rO,  rK")))]
   "TARGET_A_STEP
    && ia64_move_ok (operands[0], operands[2])
    && ia64_move_ok (operands[0], operands[3])"
@@ -4574,16 +4575,16 @@
 
 (define_insn "*cmovdi_internal"
   [(set (match_operand:DI 0 "destination_operand"
-               "=r,m,*f,Q,*b,*d*e,r,m,*f,Q,*b,*d*e,r,m,*f,Q,*b,*d*e")
+          "= r,  r,  r,   r,  r,  r,   r, r, r,   r, m, Q, *f,*b,*d*e")
        (if_then_else:DI
          (match_operator 4 "predicate_operator"
            [(match_operand:BI 1 "register_operand"
-                              "c,c,c,c,c,c,c,c,c,c,c,c,c,c,c,c,c,c")
+               "c,c,c,c,c,c,c,c,c,c,c,c,c,c,c")
             (const_int 0)])
          (match_operand:DI 2 "move_operand"
-               "0,0,0,0,0,0,rim*f*b*d*e,rO,rOQ,*f,rO,rK,rim*f*b*d*e,rO,rOQ,*f,rO,rK")
+          "rim, *f, *b,*d*e,rim,rim, rim,*f,*b,*d*e,rO,*f,rOQ,rO,  rK")
          (match_operand:DI 3 "move_operand"
-               "rim*f*b*d*e,rO,rOQ,*f,rO,rK,0,0,0,0,0,0,rim*f*b*d*e,rO,rOQ,*f,rO,rK")))]
+          "rim,rim,rim, rim, *f, *b,*d*e,*f,*b,*d*e,rO,*f,rOQ,rO,  rK")))]
   "! TARGET_A_STEP
    && ia64_move_ok (operands[0], operands[2])
    && ia64_move_ok (operands[0], operands[3])"