"mul %0,%1,%2"
[(set_attr "type" "imul")])
-;; Loses for acvs/P60504.c (mod case) on 88110
-;; (define_insn "umulsidi3"
-;; [(set (match_operand:DI 0 "register_operand" "=r")
-;; (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "%r"))
-;; (zero_extend:DI (match_operand:SI 2 "register_operand" "r"))))]
-;; "TARGET_88110"
-;; "mulu.d %0,%1,%2"
-;; [(set_attr "type" "imul")])
+(define_insn "umulsidi3"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "%r"))
+ (zero_extend:DI (match_operand:SI 2 "register_operand" "r"))))]
+ "TARGET_88110"
+ "mulu.d %0,%1,%2"
+ [(set_attr "type" "imul")])
;; patterns for mixed mode floating point
;; Do not define patterns that utilize mixed mode arithmetic that result