mips.c (TARGET_ASM_UNALIGNED_DI_OP): Define as NULL.

	* config/mips/mips.c (TARGET_ASM_UNALIGNED_DI_OP) [TARGET_IRIX5 &&
	!TARGET_IRIX6]: Define as NULL.

From-SVN: r68077

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7b24d272b4042b4bbc4c2296d30963f823330413..114ffd81e487c7371c00da8328a57b6c373c2dc7 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2003-06-17  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
+
+       * config/mips/mips.c (TARGET_ASM_UNALIGNED_DI_OP) [TARGET_IRIX5 &&
+       !TARGET_IRIX6]: Define as NULL.
+
 2003-06-17  Eric Botcazou  <ebotcazou@libertysurf.fr>
 
        * config/sparc/sparc.c (sparc_va_arg): Don't align 16-byte+ structures.

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index c55d4480338e0494d092435b550d6f5cd9972906..78e2eee2d01f893bac24c189a2c2ffc6d6995dca 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -837,8 +837,10 @@ const struct mips_cpu_info mips_cpu_info_table[] = {
 #define TARGET_ASM_UNALIGNED_HI_OP "\t.align 0\n\t.half\t"
 #undef TARGET_ASM_UNALIGNED_SI_OP
 #define TARGET_ASM_UNALIGNED_SI_OP "\t.align 0\n\t.word\t"
+/* The IRIX 6 O32 assembler gives an error for `align 0; .dword', contrary
+   to the documentation, so disable it.  */
 #undef TARGET_ASM_UNALIGNED_DI_OP
-#define TARGET_ASM_UNALIGNED_DI_OP "\t.align 0\n\t.dword\t"
+#define TARGET_ASM_UNALIGNED_DI_OP NULL
 #endif
 
 #undef TARGET_ASM_FUNCTION_PROLOGUE