re PR target/27869 ("-O -fregmove" handles SSE scalar instructions incorrectly)

	PR target/27869
	* config/i386/sse.md
	(sse_vmaddv4sf3, sse_vmmulv4sf3): Remove '%' modifier.
	(sse_vmsmaxv4sf3_finite, sse_vmsminv4sf3_finite): Remove.
	(sse2_vmaddv2df3, sse2_vmmulv2df3): Remove '%' modifier.
	(sse2_vmsmaxv2df3_finite, sse2_vmsminv2df3_finite): Remove.

From-SVN: r123682

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 52134722695124fdba9c65f74c7a4d729a7d1b3a..62061c35fbd15fad700788abeb370743db34c6fe 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2007-04-09  Jan Hubicka  <jh@suse.cz>
+
+       PR target/27869
+       * config/i386/sse.md
+       (sse_vmaddv4sf3, sse_vmmulv4sf3): Remove '%' modifier.
+       (sse_vmsmaxv4sf3_finite, sse_vmsminv4sf3_finite): Remove.
+       (sse2_vmaddv2df3, sse2_vmmulv2df3): Remove '%' modifier.
+       (sse2_vmsmaxv2df3_finite, sse2_vmsminv2df3_finite): Remove.
+
 2007-04-09  Jan Hubicka  <jh@suse.cz>
 
        * tree-ssa-ccp (maybe_fold_offset_to_component_ref): Recurse into

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 4935653b17f9bbc6f3aebc763d090888f1e3bd2c..181dd1437f08dc7ee580be238839ae8af3b90171 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -351,7 +351,7 @@
 (define_insn "sse_vmaddv4sf3"
   [(set (match_operand:V4SF 0 "register_operand" "=x")
        (vec_merge:V4SF
-         (plus:V4SF (match_operand:V4SF 1 "nonimmediate_operand" "%0")
+         (plus:V4SF (match_operand:V4SF 1 "nonimmediate_operand" "0")
                     (match_operand:V4SF 2 "nonimmediate_operand" "xm"))
          (match_dup 1)
          (const_int 1)))]
@@ -407,7 +407,7 @@
 (define_insn "sse_vmmulv4sf3"
   [(set (match_operand:V4SF 0 "register_operand" "=x")
        (vec_merge:V4SF
-         (mult:V4SF (match_operand:V4SF 1 "nonimmediate_operand" "%0")
+         (mult:V4SF (match_operand:V4SF 1 "nonimmediate_operand" "0")
                     (match_operand:V4SF 2 "nonimmediate_operand" "xm"))
          (match_dup 1)
          (const_int 1)))]
@@ -539,19 +539,6 @@
   [(set_attr "type" "sse")
    (set_attr "mode" "V4SF")])
 
-(define_insn "*sse_vmsmaxv4sf3_finite"
-  [(set (match_operand:V4SF 0 "register_operand" "=x")
-       (vec_merge:V4SF
-        (smax:V4SF (match_operand:V4SF 1 "nonimmediate_operand" "%0")
-                   (match_operand:V4SF 2 "nonimmediate_operand" "xm"))
-        (match_dup 1)
-        (const_int 1)))]
-  "TARGET_SSE && flag_finite_math_only
-   && ix86_binary_operator_ok (SMAX, V4SFmode, operands)"
-  "maxss\t{%2, %0|%0, %2}"
-  [(set_attr "type" "sse")
-   (set_attr "mode" "SF")])
-
 (define_insn "sse_vmsmaxv4sf3"
   [(set (match_operand:V4SF 0 "register_operand" "=x")
        (vec_merge:V4SF
@@ -594,19 +581,6 @@
   [(set_attr "type" "sse")
    (set_attr "mode" "V4SF")])
 
-(define_insn "*sse_vmsminv4sf3_finite"
-  [(set (match_operand:V4SF 0 "register_operand" "=x")
-       (vec_merge:V4SF
-        (smin:V4SF (match_operand:V4SF 1 "nonimmediate_operand" "%0")
-                   (match_operand:V4SF 2 "nonimmediate_operand" "xm"))
-        (match_dup 1)
-        (const_int 1)))]
-  "TARGET_SSE && flag_finite_math_only
-   && ix86_binary_operator_ok (SMIN, V4SFmode, operands)"
-  "minss\t{%2, %0|%0, %2}"
-  [(set_attr "type" "sse")
-   (set_attr "mode" "SF")])
-
 (define_insn "sse_vmsminv4sf3"
   [(set (match_operand:V4SF 0 "register_operand" "=x")
        (vec_merge:V4SF
@@ -1481,7 +1455,7 @@
 (define_insn "sse2_vmaddv2df3"
   [(set (match_operand:V2DF 0 "register_operand" "=x")
        (vec_merge:V2DF
-         (plus:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "%0")
+         (plus:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "0")
                     (match_operand:V2DF 2 "nonimmediate_operand" "xm"))
          (match_dup 1)
          (const_int 1)))]
@@ -1537,7 +1511,7 @@
 (define_insn "sse2_vmmulv2df3"
   [(set (match_operand:V2DF 0 "register_operand" "=x")
        (vec_merge:V2DF
-         (mult:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "%0")
+         (mult:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "0")
                     (match_operand:V2DF 2 "nonimmediate_operand" "xm"))
          (match_dup 1)
          (const_int 1)))]
@@ -1627,19 +1601,6 @@
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V2DF")])
 
-(define_insn "*sse2_vmsmaxv2df3_finite"
-  [(set (match_operand:V2DF 0 "register_operand" "=x")
-       (vec_merge:V2DF
-         (smax:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "%0")
-                    (match_operand:V2DF 2 "nonimmediate_operand" "xm"))
-         (match_dup 1)
-         (const_int 1)))]
-  "TARGET_SSE2 && flag_finite_math_only
-   && ix86_binary_operator_ok (SMAX, V2DFmode, operands)"
-  "maxsd\t{%2, %0|%0, %2}"
-  [(set_attr "type" "sseadd")
-   (set_attr "mode" "DF")])
-
 (define_insn "sse2_vmsmaxv2df3"
   [(set (match_operand:V2DF 0 "register_operand" "=x")
        (vec_merge:V2DF
@@ -1682,19 +1643,6 @@
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V2DF")])
 
-(define_insn "*sse2_vmsminv2df3_finite"
-  [(set (match_operand:V2DF 0 "register_operand" "=x")
-       (vec_merge:V2DF
-         (smin:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "%0")
-                    (match_operand:V2DF 2 "nonimmediate_operand" "xm"))
-         (match_dup 1)
-         (const_int 1)))]
-  "TARGET_SSE2 && flag_finite_math_only
-   && ix86_binary_operator_ok (SMIN, V2DFmode, operands)"
-  "minsd\t{%2, %0|%0, %2}"
-  [(set_attr "type" "sseadd")
-   (set_attr "mode" "DF")])
-
 (define_insn "sse2_vmsminv2df3"
   [(set (match_operand:V2DF 0 "register_operand" "=x")
        (vec_merge:V2DF