sparc.c (eligible_for_epilogue_delay): Accept floating point instructions for epilogu...

	* config/sparc/sparc.c (eligible_for_epilogue_delay): Accept
	floating point instructions for epilogue delay.

From-SVN: r32362

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8a98ec8094ca16391c420cbd4c34da890f4f844b..4cffd3b817e6a38636ef883cbe4b0dcdc1658254 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2000-03-06  Jakub Jelinek  <jakub@redhat.com>
+
+       * config/sparc/sparc.c (eligible_for_epilogue_delay): Accept
+       floating point instructions for epilogue delay.
+
 2000-03-06  Mark Mitchell  <mark@codesourcery.com>
 
        * function.c (free_temps_for_rtl_expr): Don't free slots

diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 4045db26f0b4cc903bf1c2df7e02648722e1e3c4..d6dbb9737e8a96264f2b25c24a679c067774ea92 100644 (file)
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -2394,10 +2394,20 @@ eligible_for_epilogue_delay (trial, slot)
   /* Otherwise, only operations which can be done in tandem with
      a `restore' or `return' insn can go into the delay slot.  */
   if (GET_CODE (SET_DEST (pat)) != REG
-      || REGNO (SET_DEST (pat)) >= 32
       || REGNO (SET_DEST (pat)) < 24)
     return 0;
 
+  /* If this instruction sets up floating point register and we have a return
+     instruction, it can probably go in.  But restore will not work
+     with FP_REGS.  */
+  if (REGNO (SET_DEST (pat)) >= 32)
+    {
+      if (TARGET_V9 && ! epilogue_renumber (&pat, 1)
+         && (get_attr_in_uncond_branch_delay (trial) == IN_BRANCH_DELAY_TRUE))
+       return 1;
+      return 0;
+    }
+
   /* The set of insns matched here must agree precisely with the set of
      patterns paired with a RETURN in sparc.md.  */