[(match_operand:GPR 1 "memory_operand" "A")
(match_operand:SI 2 "const_int_operand")] ;; model
UNSPEC_ATOMIC_LOAD))]
- "TARGET_ATOMIC && !TARGET_ZTSO"
+ "!TARGET_ZTSO"
{
enum memmodel model = (enum memmodel) INTVAL (operands[2]);
model = memmodel_base (model);
[(match_operand:GPR 1 "reg_or_0_operand" "rJ")
(match_operand:SI 2 "const_int_operand")] ;; model
UNSPEC_ATOMIC_STORE))]
- "TARGET_ATOMIC && !TARGET_ZTSO"
+ "!TARGET_ZTSO"
{
enum memmodel model = (enum memmodel) INTVAL (operands[2]);
model = memmodel_base (model);
[(match_operand:GPR 1 "memory_operand" "A")
(match_operand:SI 2 "const_int_operand")] ;; model
UNSPEC_ATOMIC_LOAD))]
- "TARGET_ATOMIC && TARGET_ZTSO"
+ "TARGET_ZTSO"
{
enum memmodel model = (enum memmodel) INTVAL (operands[2]);
model = memmodel_base (model);
[(match_operand:GPR 1 "reg_or_0_operand" "rJ")
(match_operand:SI 2 "const_int_operand")] ;; model
UNSPEC_ATOMIC_STORE))]
- "TARGET_ATOMIC && TARGET_ZTSO"
+ "TARGET_ZTSO"
{
enum memmodel model = (enum memmodel) INTVAL (operands[2]);
model = memmodel_base (model);
[(match_operand:GPR 0 "register_operand")
(match_operand:GPR 1 "memory_operand")
(match_operand:SI 2 "const_int_operand")] ;; model
- "TARGET_ATOMIC"
+ ""
{
if (TARGET_ZTSO)
emit_insn (gen_atomic_load_ztso<mode> (operands[0], operands[1],
[(match_operand:GPR 0 "memory_operand")
(match_operand:GPR 1 "reg_or_0_operand")
(match_operand:SI 2 "const_int_operand")] ;; model
- "TARGET_ATOMIC"
+ ""
{
if (TARGET_ZTSO)
emit_insn (gen_atomic_store_ztso<mode> (operands[0], operands[1],