WIP amdgcn: use unsigned extend for lshiftrt

This fixes a wrong-code logic error in a previous patch.
Detected by gcc.c-torture/execute/pr53645-2.c.

2020-05-15  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b66cb8a477bd517f7df155fb63d9e55b794b81ea..31fd653d55fe78c3a47947c69fcf92f09649bb5c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2020-05-15  Andrew Stubbs  <ams@codesourcery.com>
+
+       * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
+
 2020-05-15  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/95133

diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md
index a43d6b6c6f374ad65a62a257750ac2dbd7a48623..d31fe5063b95c3a6587940be9cb2f7c729355a9d 100644 (file)
--- a/gcc/config/gcn/gcn-valu.md
+++ b/gcc/config/gcn/gcn-valu.md
@@ -2113,7 +2113,7 @@
   ""
   {
     enum {ashift, lshiftrt, ashiftrt};
-    bool unsignedp = (<code> == ashift || <code> == ashiftrt);
+    bool unsignedp = (<code> == lshiftrt);
     rtx insi1 = gen_reg_rtx (<VnSI>mode);
     rtx insi2 = gen_reg_rtx (<VnSI>mode);
     rtx outsi = gen_reg_rtx (<VnSI>mode);