unsigned HOST_WIDE_INT last_set_nonzero_bits;
char last_set_sign_bit_copies;
- ENUM_BITFIELD(machine_mode) last_set_mode : 8;
+ ENUM_BITFIELD(machine_mode) last_set_mode : MACHINE_MODE_BITSIZE;
/* Set nonzero if references to register n in expressions should not be
used. last_set_invalid is set nonzero when this register is being
truncation if we know that value already contains a truncated
value. */
- ENUM_BITFIELD(machine_mode) truncated_to_mode : 8;
+ ENUM_BITFIELD(machine_mode) truncated_to_mode : MACHINE_MODE_BITSIZE;
};
rtx comparison_const;
int comparison_qty;
unsigned int first_reg, last_reg;
- /* The sizes of these fields should match the sizes of the
- code and mode fields of struct rtx_def (see rtl.h). */
- ENUM_BITFIELD(rtx_code) comparison_code : 16;
- ENUM_BITFIELD(machine_mode) mode : 8;
+ ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
+ ENUM_BITFIELD(rtx_code) comparison_code : RTX_CODE_BITSIZE;
};
/* The table of all qtys, indexed by qty number. */
struct table_elt *related_value;
int cost;
int regcost;
- /* The size of this field should match the size
- of the mode field of struct rtx_def (see rtl.h). */
- ENUM_BITFIELD(machine_mode) mode : 8;
+ ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
char in_memory;
char is_const;
char flag;
/* Nonzero if the SET_SRC contains something
whose value cannot be predicted and understood. */
char src_volatile;
- /* Original machine mode, in case it becomes a CONST_INT.
- The size of this field should match the size of the mode
- field of struct rtx_def (see rtl.h). */
- ENUM_BITFIELD(machine_mode) mode : 8;
+ /* Original machine mode, in case it becomes a CONST_INT. */
+ ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
/* Hash value of constant equivalent for SET_SRC. */
unsigned src_const_hash;
/* A constant equivalent for SET_SRC, if any. */
#else\n\
extern __inline__ __attribute__((__always_inline__, __gnu_inline__))\n\
#endif\n\
-unsigned char\n\
+unsigned short\n\
mode_inner_inline (machine_mode mode)\n\
{\n\
- extern const unsigned char mode_inner[NUM_MACHINE_MODES];\n\
+ extern const unsigned short mode_inner[NUM_MACHINE_MODES];\n\
gcc_assert (mode >= 0 && mode < NUM_MACHINE_MODES);\n\
switch (mode)\n\
{");
int c;
struct mode_data *m;
- print_decl ("unsigned char", "mode_next", "NUM_MACHINE_MODES");
+ print_decl ("unsigned short", "mode_next", "NUM_MACHINE_MODES");
for_all_modes (c, m)
tagged_printf ("E_%smode",
m->name);
print_closer ();
- print_decl ("unsigned char", "mode_wider", "NUM_MACHINE_MODES");
+ print_decl ("unsigned short", "mode_wider", "NUM_MACHINE_MODES");
for_all_modes (c, m)
{
}
print_closer ();
- print_decl ("unsigned char", "mode_2xwider", "NUM_MACHINE_MODES");
+ print_decl ("unsigned short", "mode_2xwider", "NUM_MACHINE_MODES");
for_all_modes (c, m)
{
int c;
struct mode_data *m;
- print_decl ("unsigned char", "mode_complex", "NUM_MACHINE_MODES");
+ print_decl ("unsigned short", "mode_complex", "NUM_MACHINE_MODES");
for_all_modes (c, m)
tagged_printf ("E_%smode",
int c;
struct mode_data *m;
- print_decl ("unsigned char", "mode_inner", "NUM_MACHINE_MODES");
+ print_decl ("unsigned short", "mode_inner", "NUM_MACHINE_MODES");
for_all_modes (c, m)
tagged_printf ("E_%smode",
{
int c;
- print_decl ("unsigned char", "class_narrowest_mode", "MAX_MODE_CLASS");
+ print_decl ("unsigned short", "class_narrowest_mode", "MAX_MODE_CLASS");
for (c = 0; c < MAX_MODE_CLASS; c++)
{
progname = "genopinit";
- if (NUM_OPTABS > 0xffff || MAX_MACHINE_MODE >= 0xff)
+ if (NUM_OPTABS > 0xffff
+ || MAX_MACHINE_MODE >= ((1 << MACHINE_MODE_BITSIZE) - 1))
fatal ("genopinit range assumptions invalid");
if (!init_rtx_reader_args_cb (argc, argv, handle_arg))
int regno;
/* Mode of the allocno which is the mode of the corresponding
pseudo-register. */
- ENUM_BITFIELD (machine_mode) mode : 8;
+ ENUM_BITFIELD (machine_mode) mode : MACHINE_MODE_BITSIZE;
/* Widest mode of the allocno which in at least one case could be
for paradoxical subregs where wmode > mode. */
- ENUM_BITFIELD (machine_mode) wmode : 8;
+ ENUM_BITFIELD (machine_mode) wmode : MACHINE_MODE_BITSIZE;
/* Register class which should be used for allocation for given
allocno. NO_REGS means that we should use memory. */
ENUM_BITFIELD (reg_class) aclass : 16;
+ /* Hard register assigned to given allocno. Negative value means
+ that memory was allocated to the allocno. During the reload,
+ spilled allocno has value equal to the corresponding stack slot
+ number (0, ...) - 2. Value -1 is used for allocnos spilled by the
+ reload (at this point pseudo-register has only one allocno) which
+ did not get stack slot yet. */
+ signed int hard_regno : 16;
/* A bitmask of the ABIs used by calls that occur while the allocno
is live. */
unsigned int crossed_calls_abis : NUM_ABI_IDS;
This is only ever true for non-cap allocnos. */
unsigned int might_conflict_with_parent_p : 1;
- /* Hard register assigned to given allocno. Negative value means
- that memory was allocated to the allocno. During the reload,
- spilled allocno has value equal to the corresponding stack slot
- number (0, ...) - 2. Value -1 is used for allocnos spilled by the
- reload (at this point pseudo-register has only one allocno) which
- did not get stack slot yet. */
- signed int hard_regno : 16;
- /* Allocnos with the same regno are linked by the following member.
- Allocnos corresponding to inner loops are first in the list (it
- corresponds to depth-first traverse of the loops). */
- ira_allocno_t next_regno_allocno;
- /* There may be different allocnos with the same regno in different
- regions. Allocnos are bound to the corresponding loop tree node.
- Pseudo-register may have only one regular allocno with given loop
- tree node but more than one cap (see comments above). */
- ira_loop_tree_node_t loop_tree_node;
/* Accumulated usage references of the allocno. Here and below,
word 'accumulated' means info for given region and all nested
subregions. In this case, 'accumulated' means sum of references
register class living at the point than number of hard-registers
of the class available for the allocation. */
int excess_pressure_points_num;
+ /* The number of objects tracked in the following array. */
+ int num_objects;
+ /* Accumulated frequency of calls which given allocno
+ intersects. */
+ int call_freq;
+ /* Accumulated number of the intersected calls. */
+ int calls_crossed_num;
+ /* The number of calls across which it is live, but which should not
+ affect register preferences. */
+ int cheap_calls_crossed_num;
+ /* Allocnos with the same regno are linked by the following member.
+ Allocnos corresponding to inner loops are first in the list (it
+ corresponds to depth-first traverse of the loops). */
+ ira_allocno_t next_regno_allocno;
+ /* There may be different allocnos with the same regno in different
+ regions. Allocnos are bound to the corresponding loop tree node.
+ Pseudo-register may have only one regular allocno with given loop
+ tree node but more than one cap (see comments above). */
+ ira_loop_tree_node_t loop_tree_node;
/* Allocno hard reg preferences. */
ira_pref_t allocno_prefs;
/* Copies to other non-conflicting allocnos. The copies can
/* It is a link to allocno (cap) on lower loop level represented by
given cap. Null if given allocno is not a cap. */
ira_allocno_t cap_member;
- /* The number of objects tracked in the following array. */
- int num_objects;
/* An array of structures describing conflict information and live
ranges for each object associated with the allocno. There may be
more than one such object in cases where the allocno represents a
multi-word register. */
ira_object_t objects[2];
- /* Accumulated frequency of calls which given allocno
- intersects. */
- int call_freq;
- /* Accumulated number of the intersected calls. */
- int calls_crossed_num;
- /* The number of calls across which it is live, but which should not
- affect register preferences. */
- int cheap_calls_crossed_num;
/* Registers clobbered by intersected calls. */
HARD_REG_SET crossed_calls_clobbered_regs;
/* Array of usage costs (accumulated and the one updated during
extern CONST_MODE_SIZE poly_uint16_pod mode_size[NUM_MACHINE_MODES];
extern CONST_MODE_PRECISION poly_uint16_pod mode_precision[NUM_MACHINE_MODES];
-extern const unsigned char mode_inner[NUM_MACHINE_MODES];
+extern const unsigned short mode_inner[NUM_MACHINE_MODES];
extern CONST_MODE_NUNITS poly_uint16_pod mode_nunits[NUM_MACHINE_MODES];
extern CONST_MODE_UNIT_SIZE unsigned char mode_unit_size[NUM_MACHINE_MODES];
extern const unsigned short mode_unit_precision[NUM_MACHINE_MODES];
-extern const unsigned char mode_next[NUM_MACHINE_MODES];
-extern const unsigned char mode_wider[NUM_MACHINE_MODES];
-extern const unsigned char mode_2xwider[NUM_MACHINE_MODES];
+extern const unsigned short mode_next[NUM_MACHINE_MODES];
+extern const unsigned short mode_wider[NUM_MACHINE_MODES];
+extern const unsigned short mode_2xwider[NUM_MACHINE_MODES];
template<typename T>
struct mode_traits
|| CLASS == MODE_ACCUM \
|| CLASS == MODE_UACCUM)
+/* The MACHINE_MODE_BITSIZE should be exactly aligned with the type of the
+ machine_mode array in the machmode.h and genmodes.cc. For example as below.
+ +------------------------+-------+
+ | MACHINE_MODE_BITSIZE | 16 |
+ +------------------------+-------+
+ | mode_inter[] | short |
+ | mode_next[] | short |
+ | mode_wider[] | short |
+ | mode_2xwider[] | short |
+ | mode_complex[] | short |
+ | class_narrowest_mode[] | short |
+ +------------------------+-------+
+ */
+#define MACHINE_MODE_BITSIZE 16
+
/* An optional T (i.e. a T or nothing), where T is some form of mode class. */
template<typename T>
class opt_mode
}
/* Get the complex mode from the component mode. */
-extern const unsigned char mode_complex[NUM_MACHINE_MODES];
+extern const unsigned short mode_complex[NUM_MACHINE_MODES];
#define GET_MODE_COMPLEX_MODE(MODE) ((machine_mode) mode_complex[MODE])
/* Represents a machine mode that must have a fixed size. The main
/* For each class, get the narrowest mode in that class. */
-extern const unsigned char class_narrowest_mode[MAX_MODE_CLASS];
+extern const unsigned short class_narrowest_mode[MAX_MODE_CLASS];
#define GET_CLASS_NARROWEST_MODE(CLASS) \
((machine_mode) class_narrowest_mode[CLASS])
EXT_MODIFIED_SEXT
};
-struct ATTRIBUTE_PACKED ext_modified
+struct ext_modified
{
/* Mode from which ree has zero or sign extended the destination. */
- ENUM_BITFIELD(machine_mode) mode : 8;
+ ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
/* Kind of modification of the insn. */
ENUM_BITFIELD(ext_modified_kind) kind : 2;
// The values returned by the accessors above.
unsigned int m_regno;
- access_kind m_kind : 8;
+ machine_mode m_mode : MACHINE_MODE_BITSIZE;
+ access_kind m_kind : 2;
protected:
// The value returned by the accessors above.
// Indicates that this access has been allocated on the function_info's
// temporary obstack and so is not (yet) part of the proper SSA form.
unsigned int m_is_temp : 1;
-
- // Bits for future expansion.
- unsigned int m_spare : 2;
-
- // The value returned by the accessor above.
- machine_mode m_mode : 8;
};
// A contiguous array of access_info pointers. Used to represent a
// Construct a new access with the given resource () and kind () values.
inline access_info::access_info (resource_info resource, access_kind kind)
: m_regno (resource.regno),
+ m_mode (resource.mode),
m_kind (kind),
m_is_artificial (false),
m_is_set_with_nondebug_insn_uses (false),
m_is_last_nondebug_insn_use (false),
m_is_in_debug_insn_or_phi (false),
m_has_been_superceded (false),
- m_is_temp (false),
- m_spare (0),
- m_mode (resource.mode)
+ m_is_temp (false)
{
}
# define NON_GENERATOR_NUM_RTX_CODE ((int) MATCH_OPERAND)
#endif
+#define RTX_CODE_BITSIZE 8
+
/* Register Transfer Language EXPRESSIONS CODE CLASSES */
enum rtx_class {
struct GTY((desc("0"), tag("0"),
chain_next ("RTX_NEXT (&%h)"),
chain_prev ("RTX_PREV (&%h)"))) rtx_def {
- /* The kind of expression this is. */
- ENUM_BITFIELD(rtx_code) code: 16;
-
/* The kind of value the expression has. */
- ENUM_BITFIELD(machine_mode) mode : 8;
+ ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
+
+ /* The kind of expression this is. */
+ ENUM_BITFIELD(rtx_code) code: RTX_CODE_BITSIZE;
/* 1 in a MEM if we should keep the alias set for this mem unchanged
when we access a component.
inline unsigned HOST_WIDE_INT
subreg_shape::unique_id () const
{
- { STATIC_ASSERT (MAX_MACHINE_MODE <= 256); }
+ { STATIC_ASSERT (MAX_MACHINE_MODE <= (1 << MACHINE_MODE_BITSIZE)); }
{ STATIC_ASSERT (NUM_POLY_INT_COEFFS <= 3); }
{ STATIC_ASSERT (sizeof (offset.coeffs[0]) <= 2); }
int res = (int) inner_mode + ((int) outer_mode << 8);
/* The mode of the reference. If IS_MULTIREG, this is the mode of
REGNO - MULTIREG_OFFSET. */
- machine_mode mode : 8;
+ machine_mode mode : MACHINE_MODE_BITSIZE;
/* If IS_MULTIREG, the offset of REGNO from the start of the register. */
unsigned int multireg_offset : 8;
tree attributes;
unsigned int uid;
+ ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
+
unsigned int precision : 16;
- ENUM_BITFIELD(machine_mode) mode : 8;
unsigned lang_flag_0 : 1;
unsigned lang_flag_1 : 1;
unsigned lang_flag_2 : 1;
unsigned empty_flag : 1;
unsigned indivisible_p : 1;
unsigned no_named_args_stdarg_p : 1;
- unsigned spare : 9;
+ unsigned spare : 1;
alias_set_type alias_set;
tree pointer_to;
struct tree_decl_minimal common;
tree size;
- ENUM_BITFIELD(machine_mode) mode : 8;
+ ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
unsigned nonlocal_flag : 1;
unsigned virtual_flag : 1;
/* In FIELD_DECL, this is DECL_NOT_FLEXARRAY. */
unsigned int decl_not_flexarray : 1;
- /* 13 bits unused. */
+ /* 5 bits unused. */
/* UID for points-to sets, stable over copying from inlining. */
unsigned int pt_uid;