Daily bump.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3d9730364cd1d7560c58672b584455cdbef8f15d..186dd743c4346b98f3330f9baa17433d68d2085d 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,24 @@
+2024-02-23  Richard Earnshaw  <rearnsha@arm.com>
+
+       Backported from master:
+       2024-02-23  Richard Earnshaw  <rearnsha@arm.com>
+
+       PR target/108120
+       * config/arm/neon.md (div<VCVTF:mode>3): Rename from div<mode>3.
+       Gate with ARM_HAVE_NEON_<MODE>_ARITH.
+
+2024-02-23  Xi Ruoyao  <xry111@xry111.site>
+
+       * config/loongarch/genopts/loongarch.opt.in
+       (TARGET_EXPLICIT_RELOCS): Init to M_OPTION_NOT_SEEN.
+       * config/loongarch/loongarch.opt: Regenerate.
+       * config/loongarch/loongarch.cc
+       (loongarch_option_override_internal): Set the default of
+       TARGET_EXPLICIT_RELOCS to HAVE_AS_EXPLICIT_RELOCS
+       && !loongarch_mrelax.
+       * doc/invoke.texi (-m[no-]explicit-relocs): Update for
+       LoongArch.
+
 2024-02-22  Andrew Pinski  <quic_apinski@quicinc.com>
 
        Backported from master:

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index bb29f6e6b704291e895043addf39fd593bcca37d..4e5d4ad243a9072b27d98d1fa19cacf49a054dbe 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240223
+20240224

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 472fd14ea0fe138126da9ec3fe069f9d9f24fec3..4283a49491e681574e968a5dd7bf32eb9e57450f 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,18 @@
+2024-02-23  Richard Earnshaw  <rearnsha@arm.com>
+
+       Backported from master:
+       2024-02-23  Richard Earnshaw  <rearnsha@arm.com>
+
+       PR target/108120
+       * gcc.target/arm/neon-recip-div-1.c: New file.
+
+2024-02-23  Kito Cheng  <kito.cheng@sifive.com>
+
+       Backported from master:
+       2023-04-20  Kito Cheng  <kito.cheng@sifive.com>
+
+       * gcc.target/riscv/arch-19.c: Add -misa-spec.
+
 2024-02-23  Marek Polacek  <polacek@redhat.com>
 
        Backported from master: