]> gcc.gnu.org Git - gcc.git/commitdiff
mips.md (extendsidi2): Tie the source and destination of the register alternative.
authorRichard Sandiford <rsandifo@redhat.com>
Fri, 28 May 2004 10:04:48 +0000 (10:04 +0000)
committerRichard Sandiford <rsandifo@gcc.gnu.org>
Fri, 28 May 2004 10:04:48 +0000 (10:04 +0000)
* config/mips/mips.md (extendsidi2): Tie the source and destination
of the register alternative.  Split it into nothing.

From-SVN: r82359

gcc/ChangeLog
gcc/config/mips/mips.md

index 618d6d4dc2dd831a993f34dbe1c600a5a287666b..31f9531ec62534bc0d4bdccbb02e363c7d17d408 100644 (file)
@@ -1,3 +1,8 @@
+2004-05-28  Richard Sandiford  <rsandifo@redhat.com>
+
+       * config/mips/mips.md (extendsidi2): Tie the source and destination
+       of the register alternative.  Split it into nothing.
+
 2004-05-28  Richard Sandiford  <rsandifo@redhat.com>
 
        * rtl.h (skip_consecutive_labels): Declare.
index 022562ddc85ce6bfe45cadfc56a8eb8fdc7254cf..3235ff58e99836b961c135d779c0caedc4c66250 100644 (file)
@@ -3405,16 +3405,29 @@ dsrl\t%3,%3,1\n\
 ;; Extension insns.
 ;; Those for integer source operand are ordered widest source type first.
 
-(define_insn "extendsidi2"
+;; When TARGET_64BIT, all SImode integer registers should already be in
+;; sign-extended form (see TRULY_NOOP_TRUNCATION and truncdisi2).  We can
+;; therefore get rid of register->register instructions if we constrain
+;; the source to be in the same register as the destination.
+;;
+;; The register alternative has type "arith" so that the pre-reload
+;; scheduler will treat it as a move.  This reflects what happens if
+;; the register alternative needs a reload.
+(define_insn_and_split "extendsidi2"
   [(set (match_operand:DI 0 "register_operand" "=d,d")
-        (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "d,m")))]
+        (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "0,m")))]
   "TARGET_64BIT"
   "@
-   sll\t%0,%1,0
+   #
    lw\t%0,%1"
-  [(set_attr "type" "shift,load")
-   (set_attr "mode" "DI")
-   (set_attr "extended_mips16" "yes,*")])
+  "&& reload_completed && register_operand (operands[1], VOIDmode)"
+  [(const_int 0)]
+{
+  emit_note (NOTE_INSN_DELETED);
+  DONE;
+}
+  [(set_attr "type" "arith,load")
+   (set_attr "mode" "DI")])
 
 ;; These patterns originally accepted general_operands, however, slightly
 ;; better code is generated by only accepting register_operands, and then
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