__builtin_neon_vst1q_x3v2di ((__builtin_neon_di *) __a, __bu.__o);
}
+__extension__ extern __inline void
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+vst1q_s8_x4 (int8_t * __a, int8x16x4_t __b)
+{
+ union { int8x16x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst1q_x4v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ extern __inline void
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+vst1q_s16_x4 (int16_t * __a, int16x8x4_t __b)
+{
+ union { int16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst1q_x4v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ extern __inline void
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+vst1q_s32_x4 (int32_t * __a, int32x4x4_t __b)
+{
+ union { int32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst1q_x4v4si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ extern __inline void
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+vst1q_s64_x4 (int64_t * __a, int64x2x4_t __b)
+{
+ union { int64x2x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst1q_x4v2di ((__builtin_neon_di *) __a, __bu.__o);
+}
+
__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vst1_s8_x3 (int8_t * __a, int8x8x3_t __b)
__builtin_neon_vst1q_x3v2di ((__builtin_neon_di *) __a, __bu.__o);
}
+__extension__ extern __inline void
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+vst1q_p64_x4 (poly64_t * __a, poly64x2x4_t __b)
+{
+ union { poly64x2x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst1q_x4v2di ((__builtin_neon_di *) __a, __bu.__o);
+}
+
#pragma GCC pop_options
__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__builtin_neon_vst1q_x3v4sf (__a, __bu.__o);
}
+#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+__extension__ extern __inline void
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+vst1q_f16_x4 (float16_t * __a, float16x8x4_t __b)
+{
+ union { float16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst1q_x4v8hf (__a, __bu.__o);
+}
+#endif
+
+__extension__ extern __inline void
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+vst1q_f32_x4 (float32_t * __a, float32x4x4_t __b)
+{
+ union { float32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst1q_x4v4sf (__a, __bu.__o);
+}
+
__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vst1q_u8 (uint8_t * __a, uint8x16_t __b)
__builtin_neon_vst1q_x3v2di ((__builtin_neon_di *) __a, __bu.__o);
}
+__extension__ extern __inline void
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+vst1q_u8_x4 (uint8_t * __a, uint8x16x4_t __b)
+{
+ union { uint8x16x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst1q_x4v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ extern __inline void
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+vst1q_u16_x4 (uint16_t * __a, uint16x8x4_t __b)
+{
+ union { uint16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst1q_x4v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
+__extension__ extern __inline void
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+vst1q_u32_x4 (uint32_t * __a, uint32x4x4_t __b)
+{
+ union { uint32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst1q_x4v4si ((__builtin_neon_si *) __a, __bu.__o);
+}
+
+__extension__ extern __inline void
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+vst1q_u64_x4 (uint64_t * __a, uint64x2x4_t __b)
+{
+ union { uint64x2x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst1q_x4v2di ((__builtin_neon_di *) __a, __bu.__o);
+}
+
__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vst1q_p8 (poly8_t * __a, poly8x16_t __b)
__builtin_neon_vst1q_x3v8hi ((__builtin_neon_hi *) __a, __bu.__o);
}
+__extension__ extern __inline void
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+vst1q_p8_x4 (poly8_t * __a, poly8x16x4_t __b)
+{
+ union { poly8x16x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst1q_x4v16qi ((__builtin_neon_qi *) __a, __bu.__o);
+}
+
+__extension__ extern __inline void
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+vst1q_p16_x4 (poly16_t * __a, poly16x8x4_t __b)
+{
+ union { poly16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst1q_x4v8hi ((__builtin_neon_hi *) __a, __bu.__o);
+}
+
__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vst1_lane_s8 (int8_t * __a, int8x8_t __b, const int __c)
__builtin_neon_vst1q_x3v8bf (__a, __bu.__o);
}
+__extension__ extern __inline void
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+vst1q_bf16_x4 (bfloat16_t * __a, bfloat16x8x4_t __b)
+{
+ union { bfloat16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
+ __builtin_neon_vst1q_x4v8bf (__a, __bu.__o);
+}
+
__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vst2_bf16 (bfloat16_t * __ptr, bfloat16x4x2_t __val)
VAR7 (STORE1, vst1_x3, v8qi, v4hi, v2si, di, v4hf, v2sf, v4bf)
VAR7 (STORE1, vst1q_x3, v16qi, v8hi, v4si, v2di, v8hf, v4sf, v8bf)
VAR7 (STORE1, vst1_x4, v8qi, v4hi, v2si, di, v4hf, v2sf, v4bf)
+VAR7 (STORE1, vst1q_x4, v16qi, v8hi, v4si, v2di, v8hf, v4sf, v8bf)
VAR14 (STORE1LANE, vst1_lane,
v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf, v2di, v4bf, v8bf)
VAR13 (LOAD1, vld2,
[(set_attr "type" "neon_store1_4reg<q>")]
)
+(define_expand "neon_vst1q_x4<mode>"
+ [(match_operand:XI 0 "neon_struct_operand")
+ (match_operand:XI 1 "s_register_operand")
+ (unspec:VQXBF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+ "TARGET_NEON"
+{
+ rtx mem = adjust_address (operands[0], OImode, 0);
+ emit_insn (gen_neon_vst1x4qa<mode> (mem, operands[1]));
+ mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode));
+ emit_insn (gen_neon_vst1x4qb<mode> (mem, operands[1]));
+ DONE;
+})
+
+(define_insn "neon_vst1x4qa<mode>"
+ [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
+ (unspec:OI [(match_operand:XI 1 "s_register_operand" "w")
+ (unspec:VQXBF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+ UNSPEC_VST1X4A))]
+ "TARGET_NEON"
+{
+ rtx ops[2];
+ ops[0] = operands[0];
+ ops[1] = gen_rtx_REG (OImode, REGNO (operands[1]));
+
+ output_asm_insn ("vst1.<V_sz_elem>\t%h1, %A0", ops);
+ return "";
+}
+ [(set_attr "type" "neon_store1_4reg<q>")]
+)
+
+(define_insn "neon_vst1x4qb<mode>"
+ [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
+ (unspec:OI [(match_operand:XI 1 "s_register_operand" "w")
+ (unspec:VQXBF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+ UNSPEC_VST1X4B))]
+ "TARGET_NEON"
+{
+ rtx ops[2];
+ ops[0] = operands[0];
+ ops[1] = gen_rtx_REG (OImode, REGNO (operands[1]) + 8);
+
+ output_asm_insn ("vst1.<V_sz_elem>\t%h1, %A0", ops);
+ return "";
+}
+ [(set_attr "type" "neon_store1_4reg<q>")]
+)
+
;; see comment on neon_vld1_lane for reason why the lane numbers are reversed
;; here on big endian targets.
(define_insn "neon_vst1_lane<mode>"
UNSPEC_VST1
UNSPEC_VST1X3A
UNSPEC_VST1X3B
+ UNSPEC_VST1X4A
+ UNSPEC_VST1X4B
UNSPEC_VST1_LANE
UNSPEC_VST2
UNSPEC_VST2_LANE
vst1q_p16_x3 (ptr, val);
}
+void test_vst1q_u8_x4 (uint8_t * ptr, uint8x16x4_t val)
+{
+ vst1q_u8_x4 (ptr, val);
+}
+
+void test_vst1q_u16_x4 (uint16_t * ptr, uint16x8x4_t val)
+{
+ vst1q_u16_x4 (ptr, val);
+}
+
+void test_vst1q_u32_x4 (uint32_t * ptr, uint32x4x4_t val)
+{
+ vst1q_u32_x4 (ptr, val);
+}
+
+void test_vst1q_u64_x4 (uint64_t * ptr, uint64x2x4_t val)
+{
+ vst1q_u64_x4 (ptr, val);
+}
+
+void test_vst1q_s8_x4 (int8_t * ptr, int8x16x4_t val)
+{
+ vst1q_s8_x4 (ptr, val);
+}
+
+void test_vst1q_s16_x4 (int16_t * ptr, int16x8x4_t val)
+{
+ vst1q_s16_x4 (ptr, val);
+}
+
+void test_vst1q_s32_x4 (int32_t * ptr, int32x4x4_t val)
+{
+ vst1q_s32_x4 (ptr, val);
+}
+
+void test_vst1q_s64_x4 (int64_t * ptr, int64x2x4_t val)
+{
+ vst1q_s64_x4 (ptr, val);
+}
+
+void test_vst1q_f32_x4 (float32_t * ptr, float32x4x4_t val)
+{
+ vst1q_f32_x4 (ptr, val);
+}
+
+void test_vst1q_p8_x4 (poly8_t * ptr, poly8x16x4_t val)
+{
+ vst1q_p8_x4 (ptr, val);
+}
+
+void test_vst1q_p16_x4 (poly16_t * ptr, poly16x8x4_t val)
+{
+ vst1q_p16_x4 (ptr, val);
+}
+
-/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
-/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]!\n} 3 } } */
+/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 9 } } */
+/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]!\n} 6 } } */
-/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
-/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]!\n} 3 } } */
+/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 9 } } */
+/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]!\n} 6 } } */
-/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
-/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]!\n} 3 } } */
+/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 9 } } */
+/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]!\n} 6 } } */
-/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 4 } } */
-/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]!\n} 2 } } */
+/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 6 } } */
+/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]!\n} 4 } } */
vst1q_bf16_x3 (ptr, val);
}
-/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */
-/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]!\n} 1 } } */
\ No newline at end of file
+void test_vst1q_bf16_x4 (bfloat16_t * ptr, bfloat16x8x4_t val)
+{
+ vst1q_bf16_x4 (ptr, val);
+}
+
+/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */
+/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]!\n} 2 } } */
vst1q_f16_x3 (ptr, val);
}
-/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */
-/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]!\n} 1 } } */
+void test_vst1q_f16_x4 (float16_t * ptr, float16x8x4_t val)
+{
+ vst1q_f16_x4 (ptr, val);
+}
+
+/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */
+/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]!\n} 2 } } */
#include "arm_neon.h"
-void test_vst1q_p64_x2 (poly64_t * ptr, poly64x2x2_t val)
+void test_vst1q_p64_x2(poly64_t *ptr, poly64x2x2_t val)
{
- vst1q_p64_x2 (ptr, val);
+ vst1q_p64_x2(ptr, val);
}
-void test_vst1q_p64_x3 (poly64_t * ptr, poly64x2x3_t val)
+void test_vst1q_p64_x3(poly64_t *ptr, poly64x2x3_t val)
{
- vst1q_p64_x3 (ptr, val);
+ vst1q_p64_x3(ptr, val);
}
-/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } } */
-/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]!\n} 1 } } */
+void test_vst1q_p64_x4(poly64_t *ptr, poly64x2x4_t val)
+{
+ vst1q_p64_x4(ptr, val);
+}
+
+/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 3 } } */
+/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]!\n} 2 } } */
git://gcc.gnu.org / gcc.git / commitdiff