]> gcc.gnu.org Git - gcc.git/commitdiff
aarch64-simd.md (aarch64_simd_vec_<su>mult_lo_<mode>, [...]): Separate instruction...
authorTejas Belagod <tejas.belagod@arm.com>
Tue, 8 Jan 2013 16:21:51 +0000 (16:21 +0000)
committerTejas Belagod <belagod@gcc.gnu.org>
Tue, 8 Jan 2013 16:21:51 +0000 (16:21 +0000)
2013-01-08  Tejas Belagod  <tejas.belagod@arm.com>

* config/aarch64/aarch64-simd.md (aarch64_simd_vec_<su>mult_lo_<mode>,
aarch64_simd_vec_<su>mult_hi_<mode>): Separate instruction and operand
with tab instead of space.

From-SVN: r195023

gcc/ChangeLog
gcc/config/aarch64/aarch64-simd.md

index 78eb7c07b206325eaeed4c64c0be93159d01862f..0862196b2a4b491b71a4298edc6d16fcacfb21c0 100644 (file)
@@ -1,3 +1,9 @@
+2013-01-08  Tejas Belagod  <tejas.belagod@arm.com>
+
+       * config/aarch64/aarch64-simd.md (aarch64_simd_vec_<su>mult_lo_<mode>,
+       aarch64_simd_vec_<su>mult_hi_<mode>): Separate instruction and operand
+       with tab instead of space.
+
 2013-01-08  Nick Clifton  <nickc@redhat.com>
 
        * config/rl78/rl78.c (rl78_expand_prologue): Always select
index e6655e8aa0494499a60b5b5d20ca9220bc4713a4..cbf8b885fb81700b60b329c08a41fecebc8625df 100644 (file)
                            (match_operand:VQW 2 "register_operand" "w")
                            (match_dup 3)))))]
   "TARGET_SIMD"
-  "<su>mull %0.<Vwtype>, %1.<Vhalftype>, %2.<Vhalftype>"
+  "<su>mull\\t%0.<Vwtype>, %1.<Vhalftype>, %2.<Vhalftype>"
   [(set_attr "simd_type" "simd_mull")
    (set_attr "simd_mode" "<MODE>")]
 )
                            (match_operand:VQW 2 "register_operand" "w")
                            (match_dup 3)))))]
   "TARGET_SIMD"
-  "<su>mull2 %0.<Vwtype>, %1.<Vtype>, %2.<Vtype>"
+  "<su>mull2\\t%0.<Vwtype>, %1.<Vtype>, %2.<Vtype>"
   [(set_attr "simd_type" "simd_mull")
    (set_attr "simd_mode" "<MODE>")]
 )
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